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31. 发明授权

US06618569B2 Image forming apparatus capable of forming two identical images on an intermediate transfer member 失效
标题翻译：能够在中间转印部件上形成两个相同图像的图像形成装置
公开(公告)号：US06618569B2
公开(公告)日：2003-09-09
申请号：US09840092
申请日：2001-04-24
申请人： Seiji Shiraki , Tomoyuki Yamada
发明人： Seiji Shiraki , Tomoyuki Yamada
IPC分类号： G03G1501
CPC分类号： H04N1/32486 , G03G15/0121 , G03G15/0173 , G03G2215/0177 , H04N1/3873 , H04N1/506 , H04N2201/0081 , H04N2201/0082
摘要： An image forming apparatus capable of forming two identical images on an intermediate transfer member is provided. Image data read by a reading portion is stored in a memory portion, and two identical images are formed on an intermediate transfer member in a period in which the intermediate transfer member makes one rotation.
摘要翻译：提供一种能够在中间转印部件上形成两个相同图像的图像形成装置。由读取部分读取的图像数据被存储在存储器部分中，并且在中间转印部件旋转一周期间，在中间转印部件上形成两个相同的图像。

32. 发明授权

US08981401B2 Package for optical semiconductor device, optical semiconductor device using the package, and methods for producing same 有权
标题翻译：用于光学半导体器件的封装，使用封装的光学半导体器件及其制造方法
公开(公告)号：US08981401B2
公开(公告)日：2015-03-17
申请号：US12933064
申请日：2009-09-30
申请人： Tomoyuki Yamada , Tomohiro Futagami
发明人： Tomoyuki Yamada , Tomohiro Futagami
IPC分类号： H01L33/00 , H01L33/60
CPC分类号： H01L33/60 , H01L2224/48091 , H01L2924/0002 , H01L2924/00014 , H01L2924/00
摘要： The present invention is a package for optical semiconductor devices, and an optical semiconductor device using the package, which can prevent discoloration of a plating layer formed on a lead frame even when a silicone resin is used as a sealing resin for an optical semiconductor device, and which enables high luminous efficiency for a long time.Specifically, in the package for semiconductor devices, a plating laminate 15, wherein a pure Ag plating layer 4, a thin reflective plating layer 6 serving as the uppermost layer for improving the light reflection ratio, and a resistant plating layer 5 serving as an intermediate layer therebetween and having chemical resistance against at least either metal chlorides or metal sulfides are laminated, is formed on at least the surface of a lead electrode. The reflective plating layer 4 is composed of a pure Ag thin film, and the resistant plating layer 5 is composed of a complete solid solution Au—Ag alloy plating layer.
摘要翻译：本发明是一种用于光半导体器件的封装件，以及使用该封装的光半导体器件，其即使当使用硅树脂作为光半导体器件的密封树脂时，也可防止形成在引线框架上的镀层的变色，并且能够长时间实现高发光效率。具体而言，在半导体装置用封装体中，使用纯Ag镀层4，作为提高光反射率的最上层的薄反射镀层6和作为中间体的耐电镀层5的电镀层叠体15 至少在引线电极的表面上形成层间并具有至少金属氯化物或金属硫化物的耐化学性的层。反射镀层4由纯Ag薄膜构成，耐镀层5由完全固溶Au-Ag合金镀层构成。

33. 发明授权

US08423937B2 Support program, design support device, and design support method 有权
标题翻译：支持程序，设计支持设备和设计支持方法
公开(公告)号：US08423937B2
公开(公告)日：2013-04-16
申请号：US12849337
申请日：2010-08-03
申请人： Toshio Hino , Tsuyoshi Sakata , Tomoyuki Yamada
发明人： Toshio Hino , Tsuyoshi Sakata , Tomoyuki Yamada
IPC分类号： G06F17/50 , G06F9/455
CPC分类号： G06F17/5068 , G06F2217/78
摘要： A design support program stored in a recording medium readable by a computer includes acquiring a first analysis result including information about an area included in circuit information of a design target circuit and a second analysis result relating to a path of the circuit information, the temperature of the area being equal to or higher than a certain temperature; determining an arbitrary cell on a non-critical path from among cells arranged in the area as a target cell for decreasing the area temperature; and outputting a result of the determination.
摘要翻译：存储在可由计算机读取的记录介质中的设计支持程序包括获取包括关于设计目标电路的电路信息中包括的区域的信息的第一分析结果和与电路信息的路径相关的第二分析结果，该面积等于或高于一定温度; 从布置在该区域中的小区之间的非关键路径上确定任意小区作为用于降低区域温度的目标小区; 并输出确定的结果。

34. 发明申请

US20120307739A1 SPATIAL MULTIPLEXING WIRELESS TRANSMISSION SYSTEM, SPATIAL MULTIPLEXING WIRELESS TRANSMISSION METHOD AND COMPUTER PROGRAM 有权
标题翻译：空间多路复用无线传输系统，空间多路复用无线传输方法和计算机程序
公开(公告)号：US20120307739A1
公开(公告)日：2012-12-06
申请号：US13579220
申请日：2011-02-24
申请人： Koichi Ishihara , Yasushi Takatori , Yusuke Asai , Riichi Kudo , Wenjie Jiang , Tomoyuki Yamada , Masato Mizoguchi
发明人： Koichi Ishihara , Yasushi Takatori , Yusuke Asai , Riichi Kudo , Wenjie Jiang , Tomoyuki Yamada , Masato Mizoguchi
IPC分类号： H04W4/00
CPC分类号： H04B7/0691 , H04B7/0452 , H04B7/0834 , H04B7/0874 , H04B7/0877 , H04B7/10
摘要： A spatial multiplexing wireless transmission system is formed by a base station, and by a plurality of terminal stations that are provided with a plurality of antennas. The base station is provided with an information signal generating portion, a control signal generating portion, a transmission frame generating portion, a multiple beamforming portion, a transmission/reception switching portion, a reception signal processing portion, a propagation environment estimating portion, and an antenna information generating portion. At least one of the terminal stations is provided with a transmission/reception switching portion, a reception signal processing portion, a decoding portion, an antenna information extracting portion, an antenna information generating portion, an transmitting portion, a battery, a remaining battery detecting portion, a transmission request extracting portion, and a propagation environment estimating portion.
摘要翻译：空间复用无线传输系统由基站和多个设置有多个天线的终端站形成。基站设置有信息信号生成部，控制信号生成部，发送帧生成部，多波束形成部，发送接收切换部，接收信号处理部，传播环境估计部以及天线信息生成部。至少一个终端站设置有发送/接收转换部分，接收信号处理部分，解码部分，天线信息提取部分，天线信息产生部分，发送部分，电池，剩余电池检测传输请求提取部分和传播环境估计部分。

35. 发明授权

US07995876B2 Arrayed waveguide grating circuit 有权
标题翻译：阵列波导光栅电路
公开(公告)号：US07995876B2
公开(公告)日：2011-08-09
申请号：US12158485
申请日：2006-12-21
申请人： Tomoyuki Yamada , Mitsuru Nagano , Mikitaka Ito , Toshio Watanabe , Takayuki Mizuno , Takashi Goh , Akimasa Kaneko
发明人： Tomoyuki Yamada , Mitsuru Nagano , Mikitaka Ito , Toshio Watanabe , Takayuki Mizuno , Takashi Goh , Akimasa Kaneko
IPC分类号： G02B6/12
CPC分类号： G02B6/12016 , G02B6/12014
摘要： Two AWG circuits are integrated while preventing degradation in quality of a multiplexing/demultiplexing function. An arrayed waveguide grating circuit includes: a first slab waveguide (52) connected to a first input waveguide (51a) and second output waveguides (55b); a second slab waveguide (54) connected to first output waveguides (55a) and a second input waveguide (51b); and an array waveguide (53) connecting the first slab waveguide (52) and the second slab waveguide (54), wherein the input waveguides (51a, 51b) are connected to the slab waveguides (52, 54) at an interval of 1.5× from the outermost second output waveguide out of the second output waveguides (55a, 55b) connected at an interval x depending on a wavelength.
摘要翻译：集成两个AWG电路，同时防止复用/解复用功能的质量下降。阵列波导光栅电路包括：连接到第一输入波导（51a）和第二输出波导（55b）的第一平板波导（52）; 连接到第一输出波导（55a）和第二输入波导（51b）的第二平板波导（54）; 以及连接第一平板波导（52）和第二平板波导（54）的阵列波导（53），其中输入波导（51a，51b）以1.5×的间隔连接到平板波导（52,54）从第二输出波导（55a，55b）的最外侧的第二输出波导输出，取决于波长以间隔x连接。

36. 发明授权

US07994616B2 Multilayered lead frame for a semiconductor light-emitting device 有权
标题翻译：用于半导体发光器件的多层引线框架
公开(公告)号：US07994616B2
公开(公告)日：2011-08-09
申请号：US12509065
申请日：2009-07-24
申请人： Hidekazu Tomohiro , Masayuki Fujii , Norio Satou , Tomoyuki Yamada , Tomio Kusano
发明人： Hidekazu Tomohiro , Masayuki Fujii , Norio Satou , Tomoyuki Yamada , Tomio Kusano
IPC分类号： H01L23/495
CPC分类号： H01L33/62 , H01L23/49582 , H01L24/48 , H01L2224/48091 , H01L2224/48247 , H01L2224/85439 , H01L2224/85464 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/12041 , H01L2224/45099 , H01L2924/00
摘要： A lead frame (100) for a semiconductor device is formed by applying nickel plating (102), palladium plating (103), and gold flash plating (104) substantially entirely to lead frame body (101) such as copper thin plate in this order, and further applying silver plating (105) selectively to part of an inner part that is to be enclosed with a package of the semiconductor device. The lead frame (100) may also include a base of the package. The silver plating contributes to an excellent light reflectance and wire bonding efficiency of the inner part, whereas the gold flash plating contributes to an excellent resistance to corrosion and soldering efficiency of an outer part that is outside the package.
摘要翻译：通过以大致整体的方式施加镀镍（102），镀钯（103）和镀金（104）的方式形成用于半导体器件的引线框架（100），以引导诸如铜薄板的框架体（101）并且进一步将银电镀（105）选择性地施加到将被半导体器件的封装封装的内部部分的一部分。引线框架（100）还可以包括封装的基部。镀银有助于内部部件的良好的光反射率和引线接合效率，而闪镀电镀有助于在封装外部的外部部件具有优异的耐腐蚀性和焊接效率。

37. 发明申请

US20100229134A1 LAYOUT VERIFICATION METHOD 审中-公开
标题翻译：布局验证方法
公开(公告)号：US20100229134A1
公开(公告)日：2010-09-09
申请号：US12700117
申请日：2010-02-04
申请人： Yutaka MIZUNO , Tomoyuki Yamada
发明人： Yutaka MIZUNO , Tomoyuki Yamada
IPC分类号： G06F17/50
CPC分类号： G06F17/5081
摘要： A layout verification method for verifying a layout of a semiconductor device by a computer having a memory storing layout data and information of operation conditions for a plurality of operation modes in which the semiconductor device is expected to assume during its testing and practical use, the semiconductor device including a semiconductor substrate of one conductivity type, a plurality of wells accommodating at least one of the circuit elements and being applicable to a plurality of different bias voltages in dependence of the operation modes, the method includes specifying combination of all the adjacent pairs of the wells located adjacently to each other within the semiconductor substrate, and the distance of each of all the adjacent pairs of the wells in reference to the layout data, determining, for each of the wells.
摘要翻译：一种用于通过计算机验证半导体器件的布局的布局验证方法，所述计算机具有存储布局数据的存储器以及半导体器件在其测试和实际应用期间期望呈现的多种操作模式的操作条件的信息，半导体包括一个导电类型的半导体衬底的器件，容纳至少一个电路元件的多个阱，并且可以根据操作模式应用于多个不同的偏置电压，该方法包括指定所有相邻对的组合在半导体衬底内彼此相邻的阱以及相对于布局数据的阱的所有相邻对中的每一个的距离，为每个阱确定。

38. 发明申请

US20090263084A1 ARRAYED WAVEGUIDE GRATING CIRCUIT 有权
标题翻译：阵列波导光栅电路
公开(公告)号：US20090263084A1
公开(公告)日：2009-10-22
申请号：US12158485
申请日：2006-12-21
申请人： Tomoyuki Yamada , Mitsuru Nagano , Mikitaka Ito , Toshio Watanabe , Takayuki Mizuno , Takashi Goh , Akimasa Kaneko
发明人： Tomoyuki Yamada , Mitsuru Nagano , Mikitaka Ito , Toshio Watanabe , Takayuki Mizuno , Takashi Goh , Akimasa Kaneko
IPC分类号： G02B6/34
CPC分类号： G02B6/12016 , G02B6/12014
摘要： Two AWG circuits are integrated while preventing degradation in quality of a multiplexing/demultiplexing function. An arrayed waveguide grating circuit includes: a first slab waveguide (52) connected to a first input waveguide (51a) and second output waveguides (55b); a second slab waveguide (54) connected to first output waveguides (55a) and a second input waveguide (51b); and an array waveguide (53) connecting the first slab waveguide (52) and the second slab waveguide (54), wherein the input waveguides (51a, 51b) are connected to the slab waveguides (52, 54) at an interval of 1.5× from the outermost second output waveguide out of the second output waveguides (55a, 55b) connected at an interval x depending on a wavelength.
摘要翻译：集成两个AWG电路，同时防止复用/解复用功能的质量下降。阵列波导光栅电路包括：连接到第一输入波导（51a）和第二输出波导（55b）的第一平板波导（52）; 连接到第一输出波导（55a）和第二输入波导（51b）的第二平板波导（54）; 以及连接第一平板波导（52）和第二平板波导（54）的阵列波导（53），其中输入波导（51a，51b）以1.5x的间隔连接到平板波导（52,54）从第二输出波导（55a，55b）的最外侧的第二输出波导输出，取决于波长以间隔x连接。

39. 发明申请

US20060064657A1 Layout verification method and device 有权
标题翻译：布局验证方法和设备
公开(公告)号：US20060064657A1
公开(公告)日：2006-03-23
申请号：US11224129
申请日：2005-09-13
申请人： Tomoyuki Yamada
发明人： Tomoyuki Yamada
IPC分类号： G06F17/50 , G06F9/45
CPC分类号： G06F17/5081
摘要： There is provided a layout verification method including a space acquisition step of, with a wiring connected to a gate through a via as a target wiring, acquiring a space between the target wiring and a wiring adjacent thereto, a calculation step of calculating an antenna ratio according to the space between the target wiring and the adjacent wiring, the area of the gate, and the area of the target wiring, and an output step of outputting an antenna damage error when the antenna ratio exceeds a predetermined value.
摘要翻译：提供了一种布局验证方法，包括：空间获取步骤，通过通孔作为目标布线连接到栅极的布线，获取目标布线和与其相邻的布线之间的空间;计算步骤，计算天线比根据目标布线和相邻布线之间的间隔，栅极的面积和目标布线的面积，以及当天线比超过预定值时输出天线损坏误差的输出步骤。

40. 发明申请

US20060032952A1 Milling and classifying apparatus, collision mill, air classifier, toner, and method for producing toner 有权
标题翻译：研磨和分级设备，碰撞磨机，空气分级机，调色剂和生产调色剂的方法
公开(公告)号：US20060032952A1
公开(公告)日：2006-02-16
申请号：US11178457
申请日：2005-07-12
申请人： Masahiro Kawamoto , Kohta Wakimoto , Kohji Kubota , Mamoru Kawaguchi , Yoshiyuki Okegawa , Hideyuki Ueda , Masayuki Kakimoto , Hiroaki Sugiyama , Tomoyuki Yamada , Yuuichi Kohyama , Masato Kobayashi , Fumio Nishide , Kenkoh Degura , Hirofumi Yamanaka , Tohru Suganuma , Shoji Watanabe , Ikuo Tasaki
发明人： Masahiro Kawamoto , Kohta Wakimoto , Kohji Kubota , Mamoru Kawaguchi , Yoshiyuki Okegawa , Hideyuki Ueda , Masayuki Kakimoto , Hiroaki Sugiyama , Tomoyuki Yamada , Yuuichi Kohyama , Masato Kobayashi , Fumio Nishide , Kenkoh Degura , Hirofumi Yamanaka , Tohru Suganuma , Shoji Watanabe , Ikuo Tasaki
IPC分类号： B02C21/00
CPC分类号： B02C23/12 , B02C19/066 , B07B7/086 , G03G9/0817
摘要： Disclosed is a milling and classifying apparatus, adapted to produce toner fine particles, comprising a collision mill, and an air classifier, wherein the collision mill comprises a jet nozzle room, a path, a collision plate, and a collision member mounted to a support of the collision plate at downstream of the collision plate, the air classifier comprises a dispersion room and a classification room, the classification room is disposed below the dispersion room, and a flow stabilizer is arranged at a central suction of the separator core to control swirl stream generated within the classification room so as to centrifuge the powder into coarse particles and fine particles by action of the swirl stream.
摘要翻译：公开了一种用于生产调色剂细颗粒的研磨和分级设备，包括碰撞磨机和空气分级机，其中所述碰撞磨机包括喷射喷嘴室，路径，碰撞板和安装到支撑件上的碰撞构件在空气分级器包括分散室和分类室，分级室设置在分散室下方，流动稳定器布置在分离器芯的中心抽吸处以控制涡流在分级室内产生的流，以便通过旋流流的作用将粉末离心成粗颗粒和细颗粒。

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