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31. 发明申请

US20100162262A1 Split Scheduler 有权
标题翻译：拆分计划程序
公开(公告)号：US20100162262A1
公开(公告)日：2010-06-24
申请号：US12338769
申请日：2008-12-18
申请人： Andrew J. Beaumont-Smith , Honkai Tam , Daniel C. Murray , John H. Mylius , Peter J. Bannon , Pradeep Kanapathipillai
发明人： Andrew J. Beaumont-Smith , Honkai Tam , Daniel C. Murray , John H. Mylius , Peter J. Bannon , Pradeep Kanapathipillai
IPC分类号： G06F9/46
CPC分类号： G06F9/3838 , G06F9/384 , G06F9/3857
摘要： In an embodiment, a scheduler implements a first dependency array that tracks dependencies on instruction operations (ops) within a distance N of a given op and which are short execution latency ops. Other dependencies are tracked in a second dependency array. The first dependency array may evaluate quickly, to support back-to-back issuance of short execution latency ops and their dependent ops. The second array may evaluate more slowly than the first dependency array.
摘要翻译：在一个实施例中，调度器实现第一依赖性数组，其跟踪给定操作的距离N内的指令操作（操作）的依赖性，并且其是短执行延迟操作。其他依赖关系在第二个依赖关系数组中被跟踪。第一个依赖数组可以快速评估，以支持短执行延迟操作及其依赖操作的背对背发布。第二个数组可能比第一个依赖数组慢得多。

32. 发明授权

US07743279B2 Program counter (PC) trace 失效
标题翻译：程序计数器（PC）跟踪
公开(公告)号：US07743279B2
公开(公告)日：2010-06-22
申请号：US11697428
申请日：2007-04-06
申请人： Kevin R. Walker , John H. Mylius
发明人： Kevin R. Walker , John H. Mylius
IPC分类号： G06F11/00
CPC分类号： G06F11/3636 , G06F11/3476
摘要： In one embodiment, an integrated circuit comprises a first processor configured to output program counter (PC) trace records, wherein PC trace records provide data indicating the PCs of instructions retired by the first processor. The integrated circuit further comprises a second source of trace records, and a trace unit coupled to receive the PC trace records from the first processor and the trace records from the second source. The trace unit comprises a trace memory into which the trace unit is configured to store the PC trace records and trace records from the second source. The trace unit is configured to interleave the PC trace records and the trace records from the second source in the trace memory according to the order of receipt of the records.
摘要翻译：在一个实施例中，集成电路包括被配置为输出程序计数器（PC）跟踪记录的第一处理器，其中PC跟踪记录提供指示由第一处理器退休的指令的PC的数据。集成电路还包括跟踪记录的第二源，以及耦合以从第一处理器接收PC跟踪记录和来自第二源的跟踪记录的跟踪单元。跟踪单元包括跟踪单元，跟踪单元被配置为存储来自第二个源的PC跟踪记录和跟踪记录。跟踪单元被配置为根据记录的接收顺序将跟踪记录和跟踪记录中的跟踪记录交错在跟踪存储器中。

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