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31. 发明申请

WO1996029727A1 LOW TEMPERATURE PROCESS FOR FABRICATING LAYERED SUPERLATTICE MATERIALS AND MAKING ELECTRONIC DEVICES INCLUDING SAME 审中-公开
标题翻译：用于制造层状超导材料的低温工艺和制造包括其的电子器件
公开(公告)号：WO1996029727A1
公开(公告)日：1996-09-26
申请号：PCT/US1996003522
申请日：1996-03-14
申请人： SYMETRIX CORPORATION , OLYMPUS OPTICAL CO., LTD.
发明人： SYMETRIX CORPORATION , OLYMPUS OPTICAL CO., LTD. , ITO, Takeshi , PAZ DE ARAUJO, Carlos, A. , WATANABE, Hitoshi , SCOTT, Michael, C.
IPC分类号： H01L21/3205
CPC分类号： C23C18/1295 , C23C16/45561 , C23C18/1216 , C23C18/1225 , C30B7/00 , C30B7/005 , C30B29/68 , H01C7/1013 , H01L21/314 , H01L21/31691 , H01L27/10805 , H01L27/11502 , H01L28/55 , H01L28/56 , H01L28/60
摘要： A liquid precursor containing a metal is applied to a first electrode, RTP backed at a temperature of 700 DEG C, and annealed at the same temperature from 3 to 5 hours to form a layered superlattice material. A second electrode is formed to form a capacitor, and a second anneal is performed at a temperature of 700 DEG C. If the material is strontium bismuth tantalate, the precursor contains u mole-equivalents of strontium, v mole-equivalents of bismuth, and w mole-equivalents of tantalum, where 0.8
摘要翻译：将含有金属的液体前体施加到第一电极，RTP在700℃的温度下反应，并在相同温度下退火3至5小时以形成层状超晶格材料。形成第二电极以形成电容器，并且在700℃的温度下进行第二次退火。如果该材料是钽酸铋锶，则该前体包含铀的锶摩尔当量，铋的摩尔当量铋和 w摩尔当量的钽，其中0.8≤0.02，2.0≤v≤2.3和1.9≤w≤2.1。

32. 发明申请

WO1995025340A1 THIN FILM CAPACITORS ON GALLIUM ARSENIDE SUBSTRATE AND PROCESS FOR MAKING THE SAME 审中-公开
标题翻译：亚硫酸铝基底上的薄膜电容器及其制造方法
公开(公告)号：WO1995025340A1
公开(公告)日：1995-09-21
申请号：PCT/US1995003254
申请日：1995-03-16
申请人： SYMETRIX CORPORATION , MATSUSHITA ELECTRONICS CORPORATION
发明人： SYMETRIX CORPORATION , MATSUSHITA ELECTRONICS CORPORATION , AZUMA, Masamichi , PAZ DE ARAUJO, Carlos, A. , SCOTT, Michael, C. , UEDA, Toshiyuki
IPC分类号： H01L21/3205
CPC分类号： C23C18/1225 , C23C18/1216 , H01L21/31691 , H01L28/55
摘要： A silicone nitride barrier layer (12) is deposited on a gallium arsenide substrate (11) to prevent evaporation of the substrate in subsequent heating steps. A silicon dioxide stress reduction layer (14) is deposited on the barrier layer. A first electrode (16) comprising an adhesion layer (18) and a second layer (20) is formed on the stress reduction layer. An essentially anhydrous alkoxycarboxylate liquid precursor is prepared, just before use a solvent exchange step is performed, then the precursor is spun on the first electrode, dried at 400 DEG C, and annealed at between 600 DEG C and 850 DEG C to form a BST capacitor dielectric (22). A second electrode (24) is deposited on the dielectric and annealed.
摘要翻译：将氮化硅阻挡层（12）沉积在砷化镓衬底（11）上，以防止随后的加热步骤中衬底的蒸发。二氧化硅应力减少层（14）沉积在阻挡层上。在应力降低层上形成包括粘合层（18）和第二层（20）的第一电极（16）。制备基本上无水的烷氧基羧酸盐液体前体，刚好在使用前进行溶剂交换步骤，然后将前体在第一电极上纺丝，在400℃下干燥，并在600℃和850℃之间退火以形成BST 电容电介质（22）。第二电极（24）沉积在电介质上并退火。

33. 发明申请

WO1994010084A1 PRECURSORS AND PROCESSES FOR MAKING METAL OXIDES 审中-公开
标题翻译：制造金属氧化物的前提和工艺
公开(公告)号：WO1994010084A1
公开(公告)日：1994-05-11
申请号：PCT/US1993010150
申请日：1993-10-21
申请人： SYMETRIX CORPORATION
发明人： SYMETRIX CORPORATION , SCOTT, Michael, E. , PAZ DE ARAUJO, Carlos, A. , McMILLAN, Larry, D.
IPC分类号： C01B13/32
CPC分类号： C23C16/4558 , C04B35/4682 , C04B35/6264 , C04B2235/3213 , C04B2235/3224 , C04B2235/3227 , C04B2235/3229 , C04B2235/3243 , C04B2235/3268 , C04B2235/441 , C04B2235/449 , C04B2235/72 , C23C16/4412 , C23C16/448 , C23C16/4486 , C23C16/45561 , C23C16/46 , C23C16/482 , C23C16/52 , C23C18/1216 , C23C18/1275 , C23C18/14 , C30B7/00 , C30B29/68 , H01C7/1013 , H01L21/314 , H01L21/31691 , H01L27/10805 , H01L27/11502 , H01L28/55 , H01L28/56 , H01L28/60
摘要： A first metal, an alcohol, and a carboxylic acid are reacted to form a metal alkoxycarboxylate which is then reacted with an alkoxide and/or a carboxylate of a second metal to form a precursor. Alternatively, a metal carboxylate and a metal alkoxide are combined and heated to form a precursor. In either alternative, the precursor includes all or most of the metal-oxygen-metal bonds of a desired metal oxide and a carboxylate ligand. The precursor is applied to a substrate (18, 38, 47, 75), dried and annealed to form the metal oxide (12, 30, 48, 60), such as BST. The metal-oxygen-metal bonds in the precursor permit the desired metal oxide (12, 30, 48, 60) to be formed from the precursor in one step, providing excellent thin films suitable for integrated circuits. The carboxylate ligand provides stability to the precursor allowing it to be stored for periods common in large scale manufacturing.
摘要翻译：使第一金属，醇和羧酸反应形成金属烷氧基羧酸盐，然后与第二金属的醇盐和/或羧酸盐反应形成前体。或者，将金属羧酸盐和金属醇盐组合并加热以形成前体。在任一替代方案中，前体包括所需金属氧化物和羧酸盐配体的全部或大部分金属 - 氧 - 金属键。将前体施加到基材（18,38,47,75）上，干燥并退火以形成诸如BST的金属氧化物（12,30,48,60）。前体中的金属 - 氧 - 金属键可以使所期望的金属氧化物（12,30,48,60）由前体在一个步骤中形成，从而提供适用于集成电路的优良薄膜。羧酸盐配体为前体提供了稳定性，使其能够在大规模制造中常见存储。

34. 发明申请

WO1993012538A1 PROCESS FOR FABRICATING LAYERED SUPERLATTICE MATERIALS 审中-公开
标题翻译：制备层状超导材料的方法
公开(公告)号：WO1993012538A1
公开(公告)日：1993-06-24
申请号：PCT/US1992010542
申请日：1992-12-08
申请人： SYMETRIX CORPORATION
发明人： SYMETRIX CORPORATION , PAZ DE ARAUJO, Carlos, A. , CUCHIARO, Joseph, D. , SCOTT, Michael, C. , MCMILLAN, Larry, D.
IPC分类号： H01L21/316
CPC分类号： H01L27/10805 , B05D1/00 , B05D1/60 , B05D3/0493 , C23C16/4412 , C23C16/4486 , C23C16/45561 , C23C16/4558 , C23C16/46 , C23C16/482 , C23C16/52 , C23C18/1216 , C23C18/1225 , C23C26/02 , C30B7/00 , C30B29/68 , H01C7/1013 , H01L21/314 , H01L21/31691 , H01L27/11502 , H01L28/55 , H01L28/56 , H01L28/60 , H01L41/316 , H01L41/318 , H05K3/105
摘要： A precursor comprising a metal 2-ethylhexanoate in a xylenes solvent is applied (P7) to an integrated circuit wafer (1, 20, 50). The wafer is baked (P9) to dry the precursor, annealed (P11) to form a layered superlattice material (12, 30, 60) on the wafer, then the integrated circuit (70) is completed. If the metal is titanium, the precursor comprises titanium 2-methoxyethoxide having at least a portion of its 2-methoxyethoxide ligands replaced by 2-ethylhexanoate. If the metal is a highly electropositive element, the solvent comprises 2-methoxyethanol. If the metal is lead, bismuth, thallium, or antinomy, 1 % to 75 % excess metal is included in the precursor to account for evaporation of the oxide during baking and annealing. The process provides ferroelectric devices having extremely low fatigue and high dielectric constant devices that do not degrade easily.
摘要翻译：将包含二甲苯溶剂中的2-乙基己酸金属的前体施加到集成电路晶片（1,50,50）（P7）。将晶片烘烤（P9）以干燥前体，退火（P11）以在晶片上形成层状超晶格材料（12,30,60），然后完成集成电路（70）。如果金属是钛，前体包括其2-甲氧基乙醇化物配体的至少一部分被2-乙基己酸酯取代的2-甲氧基乙氧基钛。如果金属是高电中性元素，则溶剂包括2-甲氧基乙醇。如果金属是铅，铋，铊或阴极，则前体中含有1％至75％的过量金属，以便在烘烤和退火过程中氧化物的蒸发。该方法提供具有非常低的疲劳和高介电常数装置的铁电体器件，其不会容易降解。

35. 发明申请

WO2004066307A2 STACKED MEMORY CELL HAVING DIFFUSION BARRIERS 审中-公开
标题翻译：堆叠的存储器单元具有扩散阻挡层
公开(公告)号：WO2004066307A2
公开(公告)日：2004-08-05
申请号：PCT/US2004/001391
申请日：2004-01-20
申请人： SYMETRIX CORPORATION
发明人： JOSHI, Vikram , SOLAYAPPAN, Narayan , PAZ DE ARAUJO, Carlos, A. , MCMILLAN, Larry, D.
IPC分类号： G11C
CPC分类号： H01L27/11502 , C30B29/32 , C30B29/68 , H01L23/642 , H01L27/11507 , H01L28/55 , H01L2924/0002 , H01L2924/00
摘要： A bottom electrode (238) and portion of an insulator layer (224) adjacent to the bottom electrode of a memory capacitor (540) are removed by etching to form sidewall (440) and a moat region (450) in the insulator. A nonconductive oxygen barrier layer (460) is deposited to cover the sidewall and bottom of the moat. The nonconductive oxygen barrier layer and a conductive diffusion barrier (444, 236) beneath the capacitor together provide a substantially continuous diffusion barrier between the capacitor and a switch (208). A nonconductive hydrogen barrier layer (508), the nonconductive oxygen barrier, and the conductive diffusion barrier substantially completely envelop the capacitor, in particular a ferroelectric thin film (490) in the capacitor.
摘要翻译：通过蚀刻去除下电极（238）和与存储电容器（540）的下电极相邻的绝缘体层（224）的部分以形成侧壁（440）和沟槽区域 450）在绝缘体中。沉积不导电的氧气阻隔层（460）以覆盖护城河的侧壁和底部。非导电氧阻挡层和位于电容器下方的导电扩散阻挡层（444,236）一起在电容器和开关（208）之间提供基本连续的扩散阻挡层。非导电氢阻挡层（508），非导电氧阻挡层和导电扩散阻挡层基本上完全包围电容器，特别是电容器中的铁电薄膜（490）。

36. 发明申请

WO2004049441A2 LOW THERMAL BUDGET FABRICATION OF FERROELECTRIC MEMORY USING RTP 审中-公开
标题翻译：利用RTP技术低温预热制备铁电记忆体
公开(公告)号：WO2004049441A2
公开(公告)日：2004-06-10
申请号：PCT/US2003/037501
申请日：2003-11-20
申请人： SYMETRIX CORPORATION
发明人： CELINSKA, Jolanta , JOSHI, Vikram , SOLAYAPPAN, Narayan , LIM, Myoungho , MCMILLAN, Larry, D. , PAZ DE ARAUJO, Carlos, A.
IPC分类号： H01L27/00
CPC分类号： H01L28/55 , C30B29/32 , C30B29/68
摘要： A layered superlattice material precursor is applied to a substrate (102). The precursor coating is rapid thermal processed (RTP) with a ramping rate of 100 °C/second at a hold temperature in a range of from 500 °C to 900 °C for a cumulative heating time not exceeding 30 minutes, and preferably less than 5 minutes. In fabricating a ferroelectric memory cell (100), the coating is heated in oxygen using RTP, then a top electrode layer (128) is formed, and then the substrate including the coating is heated using RTP in oxygen or in nonreactive gas after forming the top electrode layer. The thin film (126) preferably has a thickness in a range of from 25 nm to 120 nm. The process typically has a thermal budget value not exceeding 960,000 °C-sec, preferably less than 50,000 °C-sec.
摘要翻译：将分层超晶格材料前体涂覆到基底（102）上。在不超过30分钟的累计加热时间下，在500℃至900℃的保温温度下，以100℃/秒的升温速率对前体涂层进行快速热处理（RTP），以及优选少于5分钟。在制造铁电存储器单元（100）时，使用RTP在氧气中加热涂层，然后形成顶部电极层（128），然后在氧气或非反应气体中使用RTP加热包含涂层的衬底，顶部电极层。薄膜（126）优选具有25nm至120nm范围内的厚度。该过程典型地具有不超过960,000℃/秒，优选小于50,000℃/秒的热预算值。

37. 发明申请

WO1997044712A1 PHOTOSENSITIVE SOLUTIONS AND USE THEREOF IN MAKING THIN FILMS 审中-公开
标题翻译：敏感性解决方案及其在制作薄膜中的应用
公开(公告)号：WO1997044712A1
公开(公告)日：1997-11-27
申请号：PCT/US1997008955
申请日：1997-05-23
申请人： SYMETRIX CORPORATION
发明人： SYMETRIX CORPORATION , UCHIDA, Hiroto , SOYAMA, Nobuyuki , KAGEYAMA, Kensuke , OGI, Katsumi , SCOTT, Michael, C. , MCMILLAN, Larry, D. , PAZ DE ARAUJO, Carlos, A.
IPC分类号： G03F07/004
CPC分类号： H01L21/02172 , G03F7/0047 , H01L21/02282 , H01L21/312 , H01L21/31691 , H01L28/55
摘要： A photosensitive liquid solution (106) is used to make thin films for use in integrated circuits. The photosensitive liquid solution contains a photo initiator, and solvent, and a mixture of metals bonded to free-radical-susceptible monomers. The metals are mixed in amounts corresponding to the desired stoichiometry of a metal oxide thin film that derives from the solution. The photosensitive liquid solution is applied (P206) to a substrate (100), soft baked (P208), and exposed (P210) to ultraviolet radiation (116) under a photo mask (112). The ultraviolet radiation patterns the soft-baked film through a free radical polymerization chain reaction. A solvent etch (P212) is used to remove the unpolymerized portion of the polymerized film. The remaining thin film pattern is annealed to provide a patterned metal oxide film.
摘要翻译：使用感光性液体溶液（106）制造用于集成电路的薄膜。感光性液体溶液含有光引发剂和溶剂，以及与自由基易感单体结合的金属的混合物。金属以对应于从溶液衍生的金属氧化物薄膜的期望化学计量的量来混合。将光敏液体溶液（P206）施加到基材（100）上，软烘烤（P208），并在光掩模（112）下暴露（P210）至紫外线辐射（116）。紫外线辐射通过自由基聚合反应形成软烘烤膜。使用溶剂蚀刻（P212）去除聚合膜的未聚合部分。剩余的薄膜图案被退火以提供图案化的金属氧化物膜。

38. 发明申请

WO1996030938A2 PROCESS FOR FABRICATING LAYERED SUPERLATTICE MATERIALS AND MAKING ELECTRONIC DEVICES INCLUDING SAME 审中-公开
标题翻译：制造层状超导材料和制造包括其的电子器件的方法
公开(公告)号：WO1996030938A2
公开(公告)日：1996-10-03
申请号：PCT/US1996003367
申请日：1996-03-12
申请人： SYMETRIX CORPORATION , OLYMPUS OPTICAL CO., LTD.
发明人： SYMETRIX CORPORATION , OLYMPUS OPTICAL CO., LTD. , YOSHIMORI, Hiroyuki , PAZ DE ARAUJO, Carlos, A. , ITO, Takeshi , SCOTT, Michael, C. , MCMILLAN, Larry, D.
IPC分类号： H01L21/3205
CPC分类号： C23C18/1216 , B05D1/00 , B05D1/60 , B05D3/0493 , C23C16/4412 , C23C16/4486 , C23C16/45561 , C23C16/4558 , C23C16/46 , C23C16/482 , C23C16/52 , C23C18/1279 , C23C18/1283 , C23C18/1295 , C23C26/02 , C30B7/00 , C30B7/005 , C30B29/68 , H01C7/1013 , H01L21/314 , H01L21/31691 , H01L27/10805 , H01L27/11502 , H01L28/55 , H01L28/56 , H01L28/60 , H01L41/257 , H01L41/318 , H05K3/105
摘要： A liquid precursor containing a metal is applied to a substrate, RTP baked, and annealed to form a layered superlattice material. Special polyoxyalkylated precursor solutions are designed to optimize polarizability of the corresponding metal oxide materials by adding dopants including stoichiometric excess amounts of bismuth and tantalum. The RTP baking process is especially beneficial in optimizing the polarizability of the resultant metal oxide.
摘要翻译：将含有金属的液体前体施加到基底上，进行RTP烘烤并退火以形成层状超晶格材料。设计特殊的聚氧化烷基化前体溶液通过添加包括化学计量过量的铋和钽的掺杂剂来优化相应的金属氧化物材料的极化率。 RTP烘焙过程对于优化所得金属氧化物的极化率是特别有利的。

39. 发明申请

WO1996013860A1 FERROELECTRIC MEMORY 审中-公开
标题翻译：电磁记忆
公开(公告)号：WO1996013860A1
公开(公告)日：1996-05-09
申请号：PCT/US1995013379
申请日：1995-10-26
申请人： SYMETRIX CORPORATION , OLYMPUS OPTICAL CO., LTD.
发明人： SYMETRIX CORPORATION , OLYMPUS OPTICAL CO., LTD. , MIHARA, Takashi , WATANABE, Hitoshi , YOSHIMORI, Hiroyuki , PAZ DE ARAUJO, Carlos, A. , McMILLAN, Larry, D.
IPC分类号： H01L27/115
CPC分类号： H01L27/11502 , G11C11/22
摘要： A non-volatile integrated circuit memory (10, 11, 100, 200) in which the memory cell (10, 11) includes a first transistor gate (19, 36) overlying a first channel region (44A), a ferroelectric material (48) overlying a second channel region (44B), and a second transistor gate (23, 37) overlying a third channel region (44C). The channel regions (44A, 44B, 44C) are connected in series, and preferably are contiguous portions of a single semiconducting channel (44). The first channel (44A) is connected to a plate voltage that is 20 % to 50 % of the coercive voltage of the ferroelectric material. A sense amplifier (110) is connected to the third channel region (44C) via a bit line (108). The rise of the bit line after reading a logic "1" state of the cell is prevented from disturbing the ferroelectric material by shutting off the third channel before the sense amplifier rises.
摘要翻译：一种非易失性集成电路存储器（10,11,100,200），其中存储单元（10,11）包括覆盖第一沟道区（44A）的第一晶体管栅极（19,36），铁电材料（48））覆盖第二沟道区（44B），以及覆盖第三沟道区（44C）的第二晶体管栅极（23,37）。沟道区域（44A，44B，44C）串联连接，优选地是单个半导体沟道（44）的邻接部分。第一通道（44A）与铁电体的矫顽电压的20％〜50％的板电压连接。读出放大器（110）经由位线（108）连接到第三通道区域（44C）。在读出逻辑“1”状态之后，位线的上升通过在读出放大器上升之前关闭第三通道来防止铁电材料的干扰。

40. 发明申请

WO1996002067A1 INTEGRATED CIRCUIT CAPACITORS AND PROCESS FOR MAKING THE SAME 审中-公开
标题翻译：集成电路电容器及其制造方法
公开(公告)号：WO1996002067A1
公开(公告)日：1996-01-25
申请号：PCT/US1995008575
申请日：1995-07-10
申请人： SYMETRIX CORPORATION , MATSUSHITA ELECTRONICS CORPORATION
发明人： SYMETRIX CORPORATION , MATSUSHITA ELECTRONICS CORPORATION , AZUMA, Masamichi , PAZ DE ARAUJO, Carlos, A. , SCOTT, Michael, C. , CUCHIARO, Joseph, D.
IPC分类号： H01L21/3205
CPC分类号： H01L27/11502 , C04B35/4682 , C04B35/6264 , C04B2235/3213 , C04B2235/3224 , C04B2235/3227 , C04B2235/3229 , C04B2235/3243 , C04B2235/3268 , C04B2235/441 , C04B2235/449 , C04B2235/72 , C23C16/4412 , C23C16/448 , C23C16/4486 , C23C16/45561 , C23C16/4558 , C23C16/46 , C23C16/482 , C23C16/52 , C23C18/1216 , C23C18/1275 , C23C18/1295 , C23C18/14 , C30B7/00 , C30B29/68 , H01C7/1013 , H01L21/314 , H01L21/31691 , H01L27/10805 , H01L28/55 , H01L28/56 , H01L28/60
摘要： A xylene exchange (P44) is performed on a stock solution of BST of greater than 99.999 % purity dissolved in methoxyethanol, and a carboxylate of a dopant metal, such as magnesium 2-ethylhexanoate is added to form a precursor. The precursor is spun (P45) on a first electrode (14), dried (P46) at 400 DEG C for 2 minutes, then annealed (P47) at 750 DEG C to 800 DEG C for about an hour to form a layer (15) of accurately doped BST. A second electrode (16) is deposited (P48), patterned (P49), and annealed (P50) at between 750 DEG C to 800 DEG C for about 30 minutes. Excellent leakage current results if the dopant is magnesium of about 5 % molarity. For other dopants, such as Mg, Nb, Y, Bi, and Sn the preferred dopant range is 0.2 % to 0.3 % molarity. The magnesium-doped material is used as a buffer layer (25, 27) between the electrodes (24, 28) and BST dielectric (26) of an undoped BST capacitor (20).
摘要翻译：对溶解在甲氧基乙醇中的纯度大于99.999％的BST的原液进行二甲苯交换（P44），加入2-乙基己酸镁等掺杂剂金属的羧酸盐，形成前体。将前体在第一电极（14）上旋转（P45），在400℃下干燥（P46）2分钟，然后在750℃至800℃下退火（P47）约1小时以形成层（15 ）精确掺杂的BST。在750℃至800℃下沉积第二电极（P48），图案化（P49）和退火（P50）约30分钟。如果掺杂剂为约5％摩尔浓度的镁，则会产生优异的漏电流。对于其他掺杂剂如Mg，Nb，Y，Bi和Sn，优选的掺杂剂范围为0.2％至0.3％摩尔浓度。镁掺杂材料用作未掺杂的BST电容器（20）的电极（24,28）和BST电介质（26）之间的缓冲层（25,27）。

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