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    • 32. 发明授权
    • Adaptive equalizer compensating signal distortion on transmission path
    • 自适应均衡器在传输路径上补偿信号失真
    • US06349112B1
    • 2002-02-19
    • US09413685
    • 1999-10-07
    • Takayuki Shibata
    • Takayuki Shibata
    • H03K5159
    • H04L25/0202H04L25/03235
    • An adaptive equalizer includes an impulse response detecting section, a region specifying section, an adaptive control section and a delayed decision feedback sequence estimating section. The impulse response detecting section detects an impulse response of a transmission path from a training signal. A reception signal includes the training signal and a data signal following the training signal. The region specifying section outputs a region specifying signal used to specify a sequence estimation region and an adaptive control region of the detected impulse response. The adaptive control section updates the detected impulse response using an adaptive algorithm based on the data signal and an estimation result, and outputs the updated impulse response for the determined sequence estimation region. The delayed decision feedback sequence estimating section performs a sequence estimation based on the updated impulse response for the determined sequence estimation region and the data signal to produce the estimation result, and outputs the estimation result to the adaptive control section.
    • 自适应均衡器包括脉冲响应检测部分,区域指定部分,自适应控制部分和延迟判定反馈序列估计部分。 脉冲响应检测部分从训练信号检测传输路径的脉冲响应。 接收信号包括训练信号和训练信号之后的数据信号。 区域指定部分输出用于指定检测到的脉冲响应的序列估计区域和自适应控制区域的区域指定信号。 自适应控制部分使用基于数据信号的自适应算法和估计结果来更新检测到的脉冲响应,并输出所确定的序列估计区域的更新的脉冲响应。 延迟判定反馈序列估计部分基于所确定的序列估计区域和数据信号的更新的脉冲响应执行序列估计,以产生估计结果,并将估计结果输出到自适应控制部分。
    • 35. 发明授权
    • Digital modulator with digital power control circuit
    • 数字调制器与数字电源控制电路
    • US5293407A
    • 1994-03-08
    • US964841
    • 1992-10-22
    • Takayuki Shibata
    • Takayuki Shibata
    • H04L27/36H03G3/20H04L27/20H04L25/03
    • H03G3/3042H04L27/2071
    • A digital modulator comprises a power control circuit for producing a digital power control signal, first and second digital multipliers for multiplying digital signals having orthogonal phase relationships with the digital power control signal, and first and second digital-to-analog (D/A) converters for converting digital output signals from the first and second multipliers into analog signals. First and second low-pass filters are connected to outputs of the D/A converters, respectively, to filter out high frequency components. An orthogonal modulator is provided for mixing orthogonal phase carriers with the outputs of the first and second low-pass filters to produce first and second orthogonally modulated signals and combining the modulated signals to produce a transmit signal, which is amplified for transmission.
    • 数字调制器包括用于产生数字功率控制信号的功率控制电路,用于将具有正交相位关系的数字信号与数字功率控制信号相乘的第一和第二数字乘法器以及第一和第二数模(D / A) 转换器,用于将来自第一和第二乘法器的数字输出信号转换为模拟信号。 第一和第二低通滤波器分别连接到D / A转换器的输出,以滤除高频分量。 提供正交调制器用于将正交相位载波与第一和第二低通滤波器的输出混合以产生第一和第二正交调制信号,并组合调制信号以产生发送信号,其被放大以用于发送。
    • 38. 发明授权
    • Fluid control apparatus
    • 流体控制装置
    • US07048252B2
    • 2006-05-23
    • US10862343
    • 2004-06-08
    • Takayuki Shibata
    • Takayuki Shibata
    • F16K31/06
    • B60T8/3675B60T8/363
    • An elastic member made of rubber which urges a coil portion toward a cover is formed into a shape such that the elastic member can be deformed by bending. A rate of change in reaction force of the elastic member with respect to an amount of deformation in a bending deformation region is less than a case where the elastic member is subject to compressive deformation. Therefore, even in the case where the amount of deformation of the elastic member increases due to dimensional variation of a component part, the reaction force of the elastic member does not become excessively large.
    • 将由螺旋件构成的弹性构件形成为使得弹性构件能够通过弯曲而变形的形状。 弹性构件相对于弯曲变形区域的变形量的反作用力的变化率小于弹性构件经受压缩变形的情况。 因此,即使在弹性部件的变形量由于部件的尺寸变化而增大的情况下,弹性部件的反作用力也不会变得过大。
    • 39. 发明授权
    • Receiving device with demodulating function based on orthogonal detection and equalizing function based on maximum likelihood sequence estimation
    • 基于最大似然序列估计的基于正交检测和均衡功能的具有解调功能的接收装置
    • US06570939B1
    • 2003-05-27
    • US09371723
    • 1999-08-10
    • Takayuki Shibata
    • Takayuki Shibata
    • H03D100
    • H04L25/03273
    • In a receiving device, a mixer combines a frequency which is different from a carrier frequency by (2n+½)&ohgr;0 and a reception signal, provided that n is an integer, &ohgr;0=2Π/T, and T is a transmission rate of a base band signal, a filter takes out a base band signal of a center frequency of (2n+½)&ohgr;0 and removes a DC component, so as to sample the signal and put it through A/D conversion, a multiplier combines the signal and a polarity signal, so as to obtain an in-phase component p(nT) of the reception signal at time nT and an orthogonal component q[(n+½)T] of the reception signal at time (n+½)T. A branch metric is calculated and maximum likelihood sequence estimation is executed on the basis of those components and a replica signals pR(nT) and qR[(n+½)T], so as to estimate a signal sequence. Thus the receiving device exhibits improved performance as it is capable of eliminating any phase difference and amplitude difference between Ich and Qch and any DC offset, without requiring any large-scale additional circuit.
    • 在接收装置中,混合器将不同于载波频率的频率(2n + 1/2)ω0和接收信号相结合,条件是n是整数,ω= 2PI / T,T是传播速率 基带信号,滤波器取出中心频率为(2n +½)omega0的基带信号,并去除直流分量,以对信号进行采样并将其通过A / D转换,乘法器将信号和 极性信号,以便在时间nT获得接收信号的时间(n +½)T的接收信号的同相分量p(nT)和接收信号的正交分量q [(n +½)T]。 计算分支度量,并且基于这些分量和复制信号pR(nT)和qR [(n +½)T]来执行最大似然序列估计,以便估计信号序列。 因此,接收装置表现出改进的性能,因为它能够消除Ich和Qch之间的任何相位差和幅度差异以及任何DC偏移,而不需要任何大规模附加电路。
    • 40. 发明授权
    • Data demodulator
    • 数据解调器
    • US5412694A
    • 1995-05-02
    • US24227
    • 1993-03-01
    • Toshifumi SatoTakayuki ShibataHideo Ohmura
    • Toshifumi SatoTakayuki ShibataHideo Ohmura
    • H04L27/233H04L27/14H03D3/22
    • H04L27/2337
    • A data demodulator wholly consisting of digital circuits for time division multi-access (TDMA) signals subjected to differential phase-shift-keying (DPSK) is provided. The data demodulator generates a phase difference signal by subjecting .pi./4-shift quadrature phase-shift-keying (.pi./4 QPSK) signals to delayed detection of phase in synchronism with N-phase clock signals (where N is a positive integer), and reproduces a resulting phase difference signal into decision data. A first such data demodulator detects decision errors from the phase difference signal and decision data, and achieves symbol synchronism by sampling the decision data in a clock signal phase involving little decision error. A second such data demodulator supplies the phase difference signal after correcting its D.C. offset due to a frequency drift. In these two data demodulators, the formulas for computing said decision errors and correction values are flexibly varied according to preceding burst information.
    • 提供一种完全由经受差分相移键控(DPSK)的时分多址(TDMA)信号的数字电路组成的数据解调器。 数据解调器通过使π/ 4相移正交相移键控(pi / 4QPSK)信号与N相时钟信号(其中N是正整数)同步的相位延迟检测来产生相位差信号, 并将所得到的相位差信号再现成决策数据。 第一个这样的数据解调器从相位差信号和判决数据中检测出判决误差,并通过对涉及很少的判决误差的时钟信号相位中的判定数据进行采样来实现符号同步。 第二个这样的数据解调器在校正由于频率漂移引起的直流偏移量之后提供相位差信号。 在这两个数据解调器中,用于计算所述判定误差和校正值的公式根据先前的突发信息灵活地变化。