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    • 31. 发明申请
    • Flash memory system and operation method
    • 闪存系统和操作方法
    • US20100064095A1
    • 2010-03-11
    • US12382447
    • 2009-03-17
    • Ming-Dar ChenChuan-Sheng Lin
    • Ming-Dar ChenChuan-Sheng Lin
    • G06F12/08G06F12/00G06F12/02
    • G06F12/0866G06F12/0855G06F12/0868G06F2212/214G06F2212/7201
    • The present invention discloses a flash memory system comprising: a cache memory, a cache memory interface, a host interface, a flash memory interface, and a microprocessor The cache memory interface contains an arbitrator for performing data bus bandwidth time sharing process to access the cache memory The host interface is used for receiving data from a host system, and storing the data into the cache memory to form ready data The flash memory interface reads the ready data from the cache memory and stores it into at least one flash memory The microprocessor is used for controlling the host interface and the flash memory interface to access the cache memory Hence, the present invention can achieve the purpose of enhancing the access efficiency and increasing the life of the flash memory
    • 本发明公开了一种闪存系统,包括:高速缓冲存储器,高速缓冲存储器接口,主机接口,闪速存储器接口和微处理器。高速缓存存储器接口包含用于执行数据总线带宽时间共享处理以访问高速缓冲存储器的仲裁器 存储器主机接口用于从主机系统接收数据,并将数据存储到高速缓冲存储器中以形成就绪数据。闪存接口从缓存存储器中读取就绪数据,并将其存储到至少一个闪存中。微处理器 用于控制主机接口和闪存接口以访问高速缓冲存储器。因此,本发明可以实现提高存取效率并延长闪存的使用寿命的目的
    • 38. 发明授权
    • Flash memory device with wear-leveling mechanism and controlling method thereof
    • 具有磨损平衡机构的闪存装置及其控制方法
    • US08103821B2
    • 2012-01-24
    • US12396547
    • 2009-03-03
    • Li-Pin ChangMing-Dar ChenChien-Ting Huang
    • Li-Pin ChangMing-Dar ChenChien-Ting Huang
    • G06F12/02
    • G06F12/0246G06F2212/7211
    • A flash memory device with a wear-leveling mechanism includes at least one flash memory, a hot list, a bitmap, a source pointer, and a controller. The controller obtains a physical memory block with high erase count through the hot list, an erase count of the physical memory block, and an overall average erase count of the flash memory device. The controller further finds out a physical memory block which stores static data through managing the bitmap and the source pointer. The controller moves the static data to the physical memory block with high erase count, and releases the physical memory block which stores the static data to avoid the physical memory block with high erase count being worn down increasingly more seriously.
    • 具有磨损均衡机构的闪存装置包括至少一个闪存,热列表,位图,源指针和控制器。 控制器通过热列表获得具有高擦除次数的物理存储器块,物理存储块的擦除计数和闪存器件的总平均擦除次数。 控制器还通过管理位图和源指针找出存储静态数据的物理存储块。 控制器将静态数据移动到具有高擦除次数的物理存储块,并释放存储静态数据的物理存储块,以避免高擦除次数的物理存储块越来越严重。