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31. 发明申请

US20100296612A1 AUTOMATIC GAIN CONTROL CIRCUIT AND RECEIVER CIRCUIT 失效
标题翻译：自动增益控制电路和接收电路
公开(公告)号：US20100296612A1
公开(公告)日：2010-11-25
申请号：US12719327
申请日：2010-03-08
申请人： Takayuki Takida , Masanori Furuta
发明人： Takayuki Takida , Masanori Furuta
IPC分类号： H04L27/08 , H03F1/00
CPC分类号： H03F3/189 , H03F2200/294 , H03F2200/451 , H03F2200/78 , H03G3/3052 , H03G3/3089
摘要： An automatic gain control circuit configured so that a response time is reduced until a gain converges is disclosed. A variable gain amplifier is configured so that a gain is varied by a first control signal. A detector circuit detects an intensity of an output signal of the variable gain amplifier. A comparator compares an output signal of the detector circuit with a reference signal. An integrator integrates a signal corresponding to an output signal of the comparator, and outputs an integration result to the variable gain amplifier as the first control signal. A loop gain control unit, connected between the comparator and the integrator, is configured so that a loop gain is varied by a second control signal. A level detection unit detects an intensity of an output signal of the integrator and outputs a detection result to the loop gain control unit as the second control signal.
摘要翻译：公开了一种自动增益控制电路，其被配置为使得响应时间缩短直到增益收敛。可变增益放大器被配置为使得增益被第一控制信号改变。检测器电路检测可变增益放大器的输出信号的强度。比较器将检测器电路的输出信号与参考信号进行比较。积分器对与比较器的输出信号相对应的信号进行积分，并将积分结果输出到可变增益放大器作为第一控制信号。连接在比较器和积分器之间的环路增益控制单元被配置为使得环路增益被第二控制信号改变。电平检测单元检测积分器的输出信号的强度，并将检测结果输出到环路增益控制单元作为第二控制信号。

32. 发明授权

US07839676B2 Magnetic memory device 有权
标题翻译：磁存储器件
公开(公告)号：US07839676B2
公开(公告)日：2010-11-23
申请号：US12407156
申请日：2009-03-19
申请人： Daisuke Kurose , Masanori Furuta , Tsutomu Sugawara
发明人： Daisuke Kurose , Masanori Furuta , Tsutomu Sugawara
IPC分类号： G11C11/14
CPC分类号： G11C11/1693 , G11C11/1673 , G11C11/1675
摘要： A magnetic memory device includes a plurality of word lines, a plurality of bit lines arranged to intersect with the word lines, an MRAM cell array including a plurality of magnetic random access memory (MRAM) cells arranged at intersection portions between the word lines and the bit lines, a read current source which supplies a read current to the MRAM cells in a read mode, a sense amplifier which detects terminal voltages of the MRAM cells generated by the read current to generate a detection output signal, a latch circuit which latches the detection output signal to output read data, and a data write circuit which supplies a write current to the MRAM cells depending on write data in a write mode to perform writing and which supplies the write current to the MRAM cells depending on the read data in the read mode to perform rewriting.
摘要翻译：一种磁存储器件包括多个字线，多个位线布置成与字线相交，MRAM单元阵列包括多个磁性随机存取存储器（MRAM）单元，布置在字线和位线，以读取模式向MRAM单元提供读取电流的读取电流源，检测由读取电流产生的MRAM单元的端子电压以产生检测输出信号的读出放大器，锁存电路检测输出信号以输出读取数据;以及数据写入电路，其根据写入模式中的写入数据向MRAM单元提供写入电流，以执行写入，并根据读取的数据将写入电流提供给MRAM单元读取模式进行重写。

33. 发明申请

US20100142653A1 A/D CONVERSION APPARATUS, A/D CONVERSION METHOD, AND COMMUNICATION APPARATUS 有权
标题翻译： A / D转换装置，A / D转换方法和通信装置
公开(公告)号：US20100142653A1
公开(公告)日：2010-06-10
申请号：US12553315
申请日：2009-09-03
申请人： Masanori Furuta , Tomohiko Ito , Tetsuro Itakura
发明人： Masanori Furuta , Tomohiko Ito , Tetsuro Itakura
IPC分类号： H03M1/34 , H04L27/06
CPC分类号： H04L27/06 , H03M1/0682 , H03M1/468 , H03M1/804
摘要： An A/D conversion apparatus includes: a first and a second D/A converter to sample an analog signal and successively compare the analog signal and a reference signal to generate a first and a second comparison signal respectively; a first comparator to compare the first comparison signal generated by the first D/A converter with a benchmark signal; a second comparator to compare the second comparison signal generated by the second D/A converter with the benchmark signal; and a converter to convert the analog signal to a digital signal according to results of the comparisons by the first and second comparators.
摘要翻译： A / D转换装置包括：第一和第二D / A转换器，对模拟信号进行采样，并连续地比较模拟信号和参考信号，分别产生第一和第二比较信号; 第一比较器，用于将由第一D / A转换器产生的第一比较信号与基准信号进行比较; 第二比较器，用于将由第二D / A转换器产生的第二比较信号与基准信号进行比较; 以及根据第一和第二比较器的比较结果将模拟信号转换为数字信号的转换器。

34. 发明申请

US20100054034A1 READ CIRCUIT AND READ METHOD 有权
标题翻译：读取电路和读取方法
公开(公告)号：US20100054034A1
公开(公告)日：2010-03-04
申请号：US12547945
申请日：2009-08-26
申请人： Masanori Furuta , Daisuke KUROSE , Tsutomu SUGAWARA
发明人： Masanori Furuta , Daisuke KUROSE , Tsutomu SUGAWARA
IPC分类号： G11C11/14 , G11C7/22 , G11C7/06
CPC分类号： G11C29/12 , G11C11/1673 , G11C13/004 , G11C27/024 , G11C29/1201 , G11C29/50 , G11C2013/0057
摘要： In a read circuit, a write circuit writes a data to be stored and/or a test data to the memory cell. A control circuit controls the write circuit to write the test data to the memory cell in a first phase, and to write the test data which is same as the first phase to the memory cell in a second phase. An integrator integrates voltages at one terminal of the memory cell during the first phase to obtain a first integrated voltage, and integrates voltages at one terminal of the memory cell during the second phase to obtain a second integrated voltage. A buffer stores the first integrated voltage. A comparator compares the first integrated voltage from the buffer with the second integrated voltage from the integrator to obtain the data.
摘要翻译：在读取电路中，写入电路将要存储的数据和/或测试数据写入存储单元。控制电路控制写入电路，以第一阶段将测试数据写入存储单元，并将与第一阶段相同的测试数据写入第二阶段的存储单元。积分器在第一阶段中将存储单元的一个端子处的电压进行积分，以获得第一积分电压，并且在第二阶段期间对存储单元的一个端子处的电压进行积分，以获得第二积分电压。缓冲器存储第一集成电压。比较器比较来自缓冲器的第一集成电压和来自积分器的第二集成电压以获得数据。

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