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31. 外观设计

USD460059S1 Telephone handset 失效
公开(公告)号：USD460059S1
公开(公告)日：2002-07-09
申请号：US29125777
申请日：2000-06-29
申请人： Joseph Chan
设计人： Joseph Chan

32. 发明授权

US5974373A Method for reducing noise in speech signal and method for detecting noise domain 失效
标题翻译：用于降低语音信号噪声的方法和用于检测噪声域的方法
公开(公告)号：US5974373A
公开(公告)日：1999-10-26
申请号：US744918
申请日：1996-11-07
申请人： Joseph Chan , Masayuki Nishiguchi
发明人： Joseph Chan , Masayuki Nishiguchi
IPC分类号： G10L11/02 , G10L15/04 , G10L15/20 , G10L21/02 , G10L5/06
CPC分类号： G10L21/0208 , G10L25/78 , G10L2021/02168 , G10L2025/786 , G10L21/0216 , G10L21/0232
摘要： A method for reducing noise in an input speech signal by adaptively controlling a maximum likelihood filter that is provided to calculate speech components based on a probability of speech occurrence and on a calculated signal-to-noise ratio based on the input speech signal. The characteristics of the maximum likelihood filter are smoothed along both the frequency axis and along the time axis. In the case of the frequency axis, smoothing filtering is based upon a median value of characteristics of the filter in the frequency range under consideration and on the characteristics of the filter in neighboring left and right frequency ranges, and in the case of smoothing filtering along the time axis, smoothing is done both for signals of a speech part and of a noise part.
摘要翻译：一种通过自适应地控制基于语音发生的概率来计算语音分量并基于所输入的语音信号计算的信噪比的最大似然滤波器来减少输入语音信号中的噪声的方法。最大似然滤波器的特性沿频率轴和时间轴平滑。在频率轴的情况下，平滑滤波基于所考虑的频率范围内的滤波器的特性的中值和相邻的左右频率范围中的滤波器的特性，并且在平滑滤波的情况下时间轴，对语音部分和噪声部分的信号进行平滑化。

33. 发明授权

US5771486A Method for reducing noise in speech signal and method for detecting noise domain 失效
标题翻译：用于降低语音信号噪声的方法和用于检测噪声域的方法
公开(公告)号：US5771486A
公开(公告)日：1998-06-23
申请号：US744915
申请日：1996-11-07
申请人： Joseph Chan , Masayuki Nishiguchi
发明人： Joseph Chan , Masayuki Nishiguchi
IPC分类号： G10L11/02 , G10L15/04 , G10L15/20 , G10L21/02 , G10L9/00
CPC分类号： G10L21/0208 , G10L25/78 , G10L2021/02168 , G10L2025/786 , G10L21/0216 , G10L21/0232
摘要： A method for detecting a noise domain including steps of dividing an input speech signal on a frame basis, finding a Root Mean Square (RMS) value on the frame basis, and comparing the Root Mean Square value to a threshold Th.sub.1 for detecting the noise domain. The threshold value Th.sub.1 is found based on a comparison with a value th.sub.1 calculated using the RMS value for the current frame and the value th.sub.2 for the previous frame multiplied by a coefficient value a. The value Th.sub.1 is the RMS noise threshold and the values th are the minimum short-term RMS noise values, all on a frame basis.
摘要翻译：一种用于检测噪声域的方法，包括以帧为基础划分输入语音信号的步骤，基于帧寻找均方根（RMS）值，并将均方根值与用于检测噪声域的阈值Th1进行比较。基于与使用当前帧的RMS值计算的值th1和前一帧乘以系数值a的值th2进行比较来找到阈值Th1。值Th1是RMS噪声阈值，th值是最小的短期RMS噪声值，均基于一个帧。

34. 发明授权

US08944156B2 Hanger floating ring and seal assembly system and method 有权
标题翻译：衣架浮环和密封组装系统及方法
公开(公告)号：US08944156B2
公开(公告)日：2015-02-03
申请号：US13125569
申请日：2010-04-19
申请人： Lim Haw Keat , Joseph Chan
发明人： Lim Haw Keat , Joseph Chan
IPC分类号： E21B33/04 , E21B23/00
CPC分类号： E21B33/04
摘要： Systems and methods are provided for isolating a landing ring of a hanger from pressure inside a wellhead and sealing a portion of the hanger via a seal assembly. The hanger includes a floating ring axially interposed between the landing ring and the seal assembly, and between the landing ring and a shoulder of the hanger. The seal assembly includes one or more radially retractable elastomeric seals that are radially retracted during run in of the seal assembly. The radially retractable seals may be radially expanded via shearing of one or more shear pins by torque applied to the seal assembly. The seal assembly may also include one or more metal seals having a plurality of rings having a nib configuration that includes three smaller nibs for sealing and a larger flat nib for withstanding the energizing load on the seal assembly.
摘要翻译：提供了系统和方法，用于将衣架的着陆环与井口内的压力隔离，并通过密封组件密封衣架的一部分。悬挂件包括轴向插入在着陆环和密封组件之间以及在着陆环和吊架的肩部之间的浮动环。密封组件包括一个或多个可径向缩回的弹性体密封件，其在密封组件中运行期间径向缩回。通过施加到密封组件上的扭矩，通过一个或多个剪切销的剪切可以径向伸缩的密封件。密封组件还可以包括一个或多个金属密封件，其具有多个具有尖端构造的环，其具有包括用于密封的三个较小尖头和用于承受密封组件上的能量负载的较大平面笔尖。

35. 发明授权

US08619746B2 Channel estimation for multi-carrier communication 失效
标题翻译：多载波通信的信道估计
公开(公告)号：US08619746B2
公开(公告)日：2013-12-31
申请号：US11548050
申请日：2006-10-10
申请人： James Edward Beckman , Joseph Chan , Farrokh Abrishamkar , Matthias Brehler , Michael Leviant
发明人： James Edward Beckman , Joseph Chan , Farrokh Abrishamkar , Matthias Brehler , Michael Leviant
IPC分类号： H04B7/208
CPC分类号： H04L25/023 , H04L5/0048 , H04L25/0244 , H04L25/025
摘要： Techniques for deriving a channel estimate using a scattered pilot and a continual pilot are described. The scattered pilot is sent on different sets of carriers in different symbol periods. The continual pilot is sent in each symbol period on irregularly spaced carriers. The scattered pilot is used to identify the indices of channel taps of interest, e.g., L strongest channel taps. The continual pilot is used to determine the complex gains of these L channel taps. A receiver derives a channel impulse response estimate based on received pilot symbols for the scattered pilot, identifies the L strongest channel taps, and determines the indices of these L strongest channel taps. The receiver forms a Fourier sub-matrix based on the L tap indices and determines the gains of the L channel taps based on received pilot symbols for the continual pilot and the Fourier sub-matrix.
摘要翻译：描述了使用分散导频和连续导频来导出信道估计的技术。分散导频在不同符号周期的不同载波集上发送。连续飞行员在每个符号周期发送不规则的航空母舰。分散导频用于识别所关心的信道抽头的索引，例如L个最强的信道抽头。连续导频用于确定这些L信道分接头的复杂增益。接收机基于接收到的导频符号导出用于散射导频的信道脉冲响应估计，识别L个最强信道抽头，并且确定这些L个最强信道抽头的索引。接收器基于L抽头索引形成傅里叶子矩阵，并且基于用于连续导频和傅里叶子矩阵的接收导频符号确定L个信道抽头的增益。

36. 发明授权

US08098567B2 Timing adjustments for channel estimation in a multi carrier system 有权
标题翻译：多载波系统中信道估计的时序调整
公开(公告)号：US08098567B2
公开(公告)日：2012-01-17
申请号：US11777251
申请日：2007-07-12
申请人： Matthias Brehler , Joseph Chan
发明人： Matthias Brehler , Joseph Chan
IPC分类号： H04J11/00
CPC分类号： H04L27/2695 , H04L5/0007 , H04L5/0048 , H04L27/2665
摘要： Apparatus and methods are provided for making timing adjustments in a multi carrier communications system. In an aspect, a timing correction method is provided for a multi-carrier system. This includes adjusting the time basis of two or more pilot interlaces with respect to each other in order to account for timing differences between the interlaces when combining the interlaces, and then adjusting or matching the time bases of the combined interlaces with a symbol to be demodulated. The alignment and matching is performed in order to generate channel estimates for data demodulation. The channel estimates, thus generated, along with the timing alignment information are in turn used for determining timing corrections to be applied to demodulation of a particular symbol. Corresponding apparatus are also disclosed that implement the methodology.
摘要翻译：提供了用于在多载波通信系统中进行时序调整的装置和方法。在一方面，为多载波系统提供定时校正方法。这包括相对于彼此调整两个或多个导频交织的时间基准，以便在组合交织时考虑交织之间的定时差，然后将组合交织的时基与要解调的符号进行调整或匹配。执行对准和匹配以便产生用于数据解调的信道估计。由此产生的信道估计与定时对准信息一起用于确定要应用于特定符号的解调的定时校正。还公开了实现该方法的相应装置。

37. 发明申请

US20070164365A1 SINGLE STRESS LINER FOR MIGRATION STABILITY AND SPEED 审中-公开
标题翻译：用于移动稳定性和速度的单应力衬管
公开(公告)号：US20070164365A1
公开(公告)日：2007-07-19
申请号：US11306943
申请日：2006-01-17
申请人： Joseph Chan , Robert Wong
发明人： Joseph Chan , Robert Wong
IPC分类号： H01L29/94
CPC分类号： H01L27/1104 , H01L29/7843
摘要： A single stress liner is applied over different type semiconductor devices. The single stress liner avoids the problems of a dual/hybrid stress liner scheme by eliminating the meeting area. The single stress liner may be tensile or compressive. In one embodiment, the semiconductor device includes a static random access memory (SRAM) cell having numerous NFETs and PFETs. In this case, a compressive liner is placed over the SRAM cell, which is normally not ideal for the NFETs therein, but is desirable for the SRAM cell because continued miniaturization of the SRAMs typically requires slowing of the NFETs for the SRAM to maintain stabile. Where SRAM cells require increased speed, a single tensile stress liner can be implemented.
摘要翻译：单个应力衬垫施加在不同类型的半导体器件上。单应力衬垫通过消除会议面积避免双重/混合应力衬垫方案的问题。单个应力衬垫可以是拉伸或压缩的。在一个实施例中，半导体器件包括具有许多NFET和PFET的静态随机存取存储器（SRAM）单元。在这种情况下，压电衬垫放置在SRAM单元上，这对于其中的NFET通常不是理想的，但是对于SRAM单元来说是理想的，因为SRAM的继续小型化通常需要NSTS缓慢以使SRAM保持稳定。在SRAM单元需要增加速度的情况下，可以实现单个拉伸应力衬垫。

38. 发明授权

US06411665B1 Phase locked loop clock extraction 失效
标题翻译：锁相环时钟提取
公开(公告)号：US06411665B1
公开(公告)日：2002-06-25
申请号：US09268523
申请日：1999-03-11
申请人： Joseph Chan , Richard Francis Bastable
发明人： Joseph Chan , Richard Francis Bastable
IPC分类号： H03K1900
CPC分类号： H03L7/087 , H03L7/0895 , H03L7/113 , H04L7/033
摘要： A clock recovery circuit includes a phase locked loop in which the control voltage of a voltage controlled oscillator is controlled by a loop filter driven by the output of a phase comparator. During acquisition of the phase locked condition, a frequency error detector is used to detect frequency error and input a frequency error signal to a charge pump circuit associated with the loop filter. Frequency error is detected by a method of determining the phase quadrant of clock signal in which each transition of the data occurs, an algorithm implemented by logic circuit being utilized to selectively generate the frequency error signal only for certain defined transitions between phase quadrant values. Sampling of the phase quadrant values is effected by sampling sub-circuits using latched values of the clock and quadrature clock signals to obtain samples of the clock and quadrature clock signals for each transition, and subsequently determining the phase quadrant value by a logical combination of the samples. The method and apparatus have application in data recovery in optical communications systems operating in the GHz range.
摘要翻译：时钟恢复电路包括锁相环，其中压控振荡器的控制电压由相位比较器的输出驱动的环路滤波器控制。在获取锁相条件期间，使用频率误差检测器来检测频率误差，并将频率误差信号输入到与环路滤波器相关的电荷泵电路。通过确定数据发生的每个转换的时钟信号的相位象限的方法来检测频率误差，由逻辑电路实现的算法被用于仅针对相位象限值之间的某些定义的转换选择性地产生频率误差信号。相位象限值的采样通过使用锁存的时钟和正交时钟信号的值对子电路进行采样，以获得用于每个转换的时钟和正交时钟信号的采样，随后通过逻辑组合确定相位象限值样品。该方法和装置可用于在GHz范围内工作的光通信系统中的数据恢复。

39. 外观设计

USD427173S Telephone base 失效
公开(公告)号：USD427173S
公开(公告)日：2000-06-27
申请号：US77061
申请日：1997-09-25
申请人： Joseph Chan , Steve Hughes , Andrew Jones , Stascha Offenbeck
设计人： Joseph Chan , Steve Hughes , Andrew Jones , Stascha Offenbeck

40. 发明授权

US6002269A TTL logic driver circuit 失效
标题翻译： TTL逻辑驱动电路
公开(公告)号：US6002269A
公开(公告)日：1999-12-14
申请号：US996866
申请日：1997-12-23
申请人： Peter Dartnell , Joseph Chan
发明人： Peter Dartnell , Joseph Chan
IPC分类号： H03K19/013 , H03K19/018 , H03K19/0175 , H03K19/082
CPC分类号： H03K19/01806 , H03K19/0133
摘要： A bootstrap logic driver circuit operable from a low voltage power supply includes first and second bipolar transistors coupled between positive and negative voltage supplies and having a collector load comprising a first diode structure. A further transistor coupled between the voltage supplies has a collector load comprising a second diode structure. A bootstrap capacitor coupled between the diode structures stores charge when the circuit is in a first condition and is discharged when the circuit is in a second condition to provide an enhanced drive voltage for an output transistor.
摘要翻译：可从低电压电源工作的自举逻辑驱动器电路包括耦合在正电压和负电压源之间并具有包含第一二极管结构的集电极负载的第一和第二双极晶体管。耦合在电压源之间的另一个晶体管具有包括第二二极管结构的集电极负载。耦合在二极管结构之间的自举电容器在电路处于第一状态时存储电荷，并且当电路处于第二状态时放电，以为输出晶体管提供增强的驱动电压。

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