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31. 发明申请

US20060104342A1 Adaptive coefficient signal generator for adaptive signal equalizers with fractionally-spaced feedback 有权
$Adaptive coefficient signal generator for adaptive signal equalizers with fractionally-spaced feedback$
公开(公告)号：US20060104342A1
公开(公告)日：2006-05-18
申请号：US11284391
申请日：2005-11-21
申请人： Abhijit Shanbhag , Qian Yu , Abhijit Phanse , Jishnu Bhattacharjee , Debanjan Mukherjee , Fabian Giroud , Venugopal Balasubramonian
发明人： Abhijit Shanbhag , Qian Yu , Abhijit Phanse , Jishnu Bhattacharjee , Debanjan Mukherjee , Fabian Giroud , Venugopal Balasubramonian
IPC分类号： H03H7/30
CPC分类号： H04L25/03063 , H03H21/0012 , H03H2021/0096 , H04L25/0307 , H04L2025/0349 , H04L2025/03509 , H04L2025/03611
摘要： An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.

32. 发明授权

US07039104B2 Adaptive coefficient signal generator for adaptive signal equalizers with fractionally-spaced feedback 有权
$Adaptive coefficient signal generator for adaptive signal equalizers with fractionally-spaced feedback$
标题翻译：用于具有分数间隔反馈的自适应信号均衡器的自适应系数信号发生器
公开(公告)号：US07039104B2
公开(公告)日：2006-05-02
申请号：US10322024
申请日：2002-12-17
申请人： Abhijit G. Shanbhag , Qian Yu , Abhijit Phanse , Jishnu Bhattacharjee , Debanjan Mukherjee , Fabian Giroud , Venugopal Balasubramonian
发明人： Abhijit G. Shanbhag , Qian Yu , Abhijit Phanse , Jishnu Bhattacharjee , Debanjan Mukherjee , Fabian Giroud , Venugopal Balasubramonian
IPC分类号： H03H7/30 , H03H7/40 , H03K5/159
CPC分类号： H04L25/03063 , H03H21/0012 , H03H2021/0096 , H04L25/0307 , H04L2025/0349 , H04L2025/03509 , H04L2025/03611
摘要： An adaptive coefficient signal generator for use in an adaptive signal equalizer with fractionally-spaced feedback. The signals representing the feedback tap coefficients are generated in conjunction with a timing interpolation parameter such that the fractionally-spaced feedback circuitry dynamically emulates symbol-spaced feedback circuitry.
摘要翻译：一种用于具有分数间隔反馈的自适应信号均衡器中的自适应系数信号发生器。代表反馈抽头系数的信号与定时内插参数一起产生，使得分数间隔的反馈电路动态地仿真符号间隔反馈电路。

33. 发明申请

US20060083296A1 Method and apparatus for generating coefficients in continuous time equalizers 有权
标题翻译：用于在连续时间均衡器中产生系数的方法和装置
公开(公告)号：US20060083296A1
公开(公告)日：2006-04-20
申请号：US10970470
申请日：2004-10-20
申请人： Jishnu Bhattacharjee , Debanjan Mukherjee , Abhijit Phanse
发明人： Jishnu Bhattacharjee , Debanjan Mukherjee , Abhijit Phanse
IPC分类号： H03K5/159 , H04B1/10
CPC分类号： H04L25/03057 , H04L2025/03617
摘要： Systems and methods are disclosed to adaptively generate coefficients for continuous time least mean square error equalizers and to correct offset in high-gain amplifiers. An adaptive coefficient generator includes a bank of individual coefficient generators, each utilizing a first adaptive correction signal for a first correction and a second adaptive correction signal for a second more precise correction. The adaptive correction signals for offset correction can be a current or voltage. The first adaptive correction signal is set by maintaining the second adaptive correction signal constant, such as setting it to zero, and adjusting the first signal until the magnitude of the coefficient is minimized. The second adaptive correction signal is then set by maintaining the first adaptive correction signal at its set value by adjusting the second signal until the magnitude of the coefficient is again minimized.
摘要翻译：公开了系统和方法以自适应地生成用于连续时间最小均方误差均衡器的系数并且校正高增益放大器中的偏移。一种自适应系数发生器包括一组单独的系数发生器，每一组利用用于第一校正的第一自适应校正信号和用于第二更精确校正的第二自适应校正信号。用于偏移校正的自适应校正信号可以是电流或电压。通过使第二自适应校正信号保持恒定（例如将其设置为零）以及调整第一信号直到系数的幅度最小化来设定第一自适应校正信号。然后通过调整第二信号将第一自适应校正信号保持在其设定值，直到系数的幅度再次最小化来设定第二自适应校正信号。

34. 发明授权

US07016406B1 Adaptation structure and methods for analog continuous time equalizers 有权
标题翻译：模拟连续时间均衡器的适应结构和方法
公开(公告)号：US07016406B1
公开(公告)日：2006-03-21
申请号：US10426588
申请日：2003-04-29
申请人： Abhijit Phanse , Abhijit G. Shanbhag , Qian Yu , Venugopal Balasubramonian , Jishnu Bhattacharjee , Prashant Choudhary , Debanjan Mukherjee , Fabian Giroud , Edem Ibragimov
发明人： Abhijit Phanse , Abhijit G. Shanbhag , Qian Yu , Venugopal Balasubramonian , Jishnu Bhattacharjee , Prashant Choudhary , Debanjan Mukherjee , Fabian Giroud , Edem Ibragimov
IPC分类号： H03H7/40
CPC分类号： H04L25/03038 , H04L2025/03477 , H04L2025/03509 , H04L2025/03617
摘要： Tap coefficients for fractionally-spaced equalizers are updated iteratively using error statistics from an input bit stream and an output bit stream, such as from a forward error correction circuit. The process continues until the errors converge to a sufficiently small number. Knowledge of the error patterns are used apriori to adaptively change the tap coefficients in a feedforward filter.
摘要翻译：使用来自输入比特流和输出比特流（例如来自前向纠错电路）的误差统计来迭代地更新用于分数间隔均衡器的抽头系数。该过程继续，直到错误收敛到足够小的数量。使用错误模式的知识用于自适应地改变前馈滤波器中的抽头系数。

35. 发明授权

US06940352B2 Analog signal interpolation 有权
公开(公告)号：US06940352B2
公开(公告)日：2005-09-06
申请号：US10724561
申请日：2003-11-26
申请人： Jishnu Bhattacharjee , Debanjan Mukherjee , Abhijit Phanse
发明人： Jishnu Bhattacharjee , Debanjan Mukherjee , Abhijit Phanse
IPC分类号： G06G7/30 , H03F3/45
CPC分类号： G06G7/30 , H03F3/45183
摘要： A linear interpolator is provided that includes differential pairs of transistors biased such that a first input voltage may be multiplied by a factor r wherein 0≦r≦1 and such that a second input voltage may be multiplied by the complement factor (1−r). By combining the multiplied input voltages, a linear interpolation is provided based upon the factor r.

36. 发明申请

US20050104705A1 Multi-layer symmetric inductor 有权
标题翻译：多层对称电感
公开(公告)号：US20050104705A1
公开(公告)日：2005-05-19
申请号：US10718449
申请日：2003-11-19
申请人： Debanjan Mukherjee , Jishnu Bhattacharjee , Abhijit Phanse
发明人： Debanjan Mukherjee , Jishnu Bhattacharjee , Abhijit Phanse
IPC分类号： H01F17/00 , H01F5/00
CPC分类号： H01F17/0013 , H01F2017/0046 , Y10T29/4902
摘要： An integrated circuit including a differentially excited symmetric microstrip inductor formed over multiple layers while maintaining both electrical and geometrical symmetry.
摘要翻译：一种集成电路，其包括在多个层上形成的差分激励的对称微带电感器，同时保持电和几何对称性。

37. 发明授权

US6125470A Distributive encoder for encoding error signals which represent signal peak errors in data signals for correcting erroneous signal baseline conditions 有权
标题翻译：用于编码误差信号的分布式编码器，其表示用于校正错误信号基线条件的数据信号中的信号峰值误差
公开(公告)号：US6125470A
公开(公告)日：2000-09-26
申请号：US176633
申请日：1998-10-22
申请人： Wong Hee , Abhijit Phanse
发明人： Wong Hee , Abhijit Phanse
IPC分类号： G06F11/00 , H03N13/00
CPC分类号： H04L25/03019 , H04L2025/03356
摘要： A digital signal error detection circuit and method for identifying interruptions in respective occurrences of opposing signal states of an equalized digital data signal. Signal level status signals are monitored during a specified monitoring time period to determine whether the data signal being monitored contains at least one positive data pulse and at least one negative data pulse. If this condition is not met, then an error signal is generated for use in correcting the equalization of the original data signal.
摘要翻译：一种数字信号误差检测电路和方法，用于识别均衡数字数据信号的相对信号状态的相应出现中的中断。在指定的监视时间段期间监视信号电平状态信号，以确定被监视的数据信号是否包含至少一个正数据脉冲和至少一个负数据脉冲。如果不满足该条件，则产生用于校正原始数据信号的均衡的误差信号。

38. 发明授权

US08050318B2 Compensation circuit and method for reducing intersymbol interference products caused by signal transmission via dispersive media 有权
标题翻译：补偿电路和减少信号传输通过色散介质引起的符号间干扰产物的方法
公开(公告)号：US08050318B2
公开(公告)日：2011-11-01
申请号：US11553019
申请日：2006-10-26
申请人： Abhijit Phanse , Abhijit G. Shanbhag
发明人： Abhijit Phanse , Abhijit G. Shanbhag
IPC分类号： H03H7/30 , H03H7/40 , H03K5/159
CPC分类号： H04L25/03057 , H04B10/6971 , H04L25/03038 , H04L25/03878 , H04L2025/03624 , H04L2025/03656 , H04L2025/037
摘要： A compensation circuit and method for reducing ISI products within an electrical data signal corresponding to a detected data signal received via a signal transmission medium introduces distinct compensation effects for individual ISI products within the electrical data signal. Distinct data signal components within the detected data signal and corresponding to such ISI products can be selectively and individually compensated, thereby producing a compensated data signal in which each selected one of such individual data signal components is substantially removed. Individual data signal components or selected combinations of data signal components can be compensated as desired.
摘要翻译：用于减少与通过信号传输介质接收的检测数据信号相对应的电数据信号内的ISI产品的补偿电路和方法对电数据信号内的各个ISI产品引入不同的补偿效果。检测到的数据信号中对应于这种ISI产品的不同数据信号分量可以被选择性和单独地补偿，从而产生补偿数据信号，其中基本上去除了这些单个数据信号分量中的每一个。可以根据需要补偿单个数据信号分量或数据信号分量的选定组合。

39. 发明授权

US07130366B2 Compensation circuit and method for reducing intersymbol interference products caused by signal transmission via dispersive media 有权
公开(公告)号：US07130366B2
公开(公告)日：2006-10-31
申请号：US10290674
申请日：2002-11-08
申请人： Abhijit Phanse , Abhijit G. Shanbhag
发明人： Abhijit Phanse , Abhijit G. Shanbhag
IPC分类号： H04B1/00
CPC分类号： H04L25/03057 , H04B10/6971 , H04L25/03038 , H04L25/03878 , H04L2025/03624 , H04L2025/03656 , H04L2025/037
摘要： A compensation circuit and method for reducing ISI products within an electrical data signal corresponding to a detected data signal received via a signal transmission medium introduces distinct compensation effects for individual ISI products within the electrical data signal. Distinct data signal components within the detected data signal and corresponding to such ISI products can be selectively and individually compensated, thereby producing a compensated data signal in which each selected one of such individual data signal components is substantially removed. Individual data signal components or selected combinations of data signal components can be compensated as desired.

40. 发明授权

US06223325B1 Peak error detector 失效
标题翻译：峰值检测器
公开(公告)号：US06223325B1
公开(公告)日：2001-04-24
申请号：US09076186
申请日：1998-05-12
申请人： Wong Hee , Abhijit Phanse
发明人： Wong Hee , Abhijit Phanse
IPC分类号： G06F1100
CPC分类号： H04L1/20
摘要： A data signal peak error detector for monitoring and detecting undesired shifts in the peak levels of a multilevel data signal, such as an MLT3 Ethernet signal. A signal slicing circuit generates two signals: a data peak detection signal identifies occurrences of data signal peaks and is asserted when the input data signal level has transitioned beyond a value which is intermediate to preceding intermediate and peak (e.g., positive or negative) signal levels; and a data peak error signal identifies occurrences of data signal peak errors and is asserted when the input data signal level has transitioned beyond a value which corresponds to a preceding peak signal level. Assertion of the data peak detection signal initiates a count sequence by a counter. The count sequence is decoded to produce one or more signal pulses, each of which is provided at a respective time after assertion of the first data peak signal and identifies a valid state of the data peak error signal.
摘要翻译：数据信号峰值误差检测器，用于监测和检测多级数据信号（例如MLT3以太网信号）的峰值电平中的不期望的移位。信号分片电路产生两个信号：数据峰值检测信号识别数据信号峰值的出现，并且当输入数据信号电平已经转变到超过之前的中间值和峰值（例如，正或负）信号电平 ; 并且数据峰值误差信号识别数据信号峰值误差的出现，并且当输入数据信号电平已经转变超过对应于先前峰值信号电平的值时被断言。数据峰值检测信号的断言通过计数器启动计数序列。对计数序列进行解码以产生一个或多个信号脉冲，每个信号脉冲在确定第一数据峰值信号之后的相应时间处被提供，并且识别数据峰值误差信号的有效状态。

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