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31. 发明授权

US07099395B1 Reducing coupled noise in pseudo-differential signaling systems 失效
标题翻译：减少伪差分信号系统中的耦合噪声
公开(公告)号：US07099395B1
公开(公告)日：2006-08-29
申请号：US09708795
申请日：2000-11-07
申请人： Stefanos Sidiropoulos , Yingxuan Li , Mark A. Horowitz
发明人： Stefanos Sidiropoulos , Yingxuan Li , Mark A. Horowitz
IPC分类号： H04B3/00
CPC分类号： H04L25/0292 , H04L25/08
摘要： A pseudo-differential signaling system uses a plurality of signal lines and a single, common reference voltage. Signal line voltages are interpreted only in comparison to the reference line voltage. Within a receiving circuit, the reference line is buffered prior to its distribution to multiple comparators. The system utilizes an active buffer having a bandwidth that is significantly greater than the resonant input frequency of the receiving circuit. In an alternative embodiment, the signal lines are also buffered. In this embodiment, the buffers are implemented with transistor-based source-followers. The buffer associated with the reference line has a larger current capacity than the buffers associated with the signal lines. In yet another embodiment, a comparator produces a correction signal that is equal to the noise present on the signal lines. This noise is then subtracted from the signal voltages.
摘要翻译：伪差分信号系统使用多个信号线和单个公共参考电压。信号线电压仅与参考线电压相比较。在接收电路内，参考线在分配给多个比较器之前被缓冲。该系统利用具有明显大于接收电路的谐振输入频率的带宽的有源缓冲器。在替代实施例中，信号线也被缓冲。在本实施例中，缓冲器由基于晶体管的源极跟随器实现。与参考线相关联的缓冲器具有比与信号线相关联的缓冲器更大的电流容量。在另一个实施例中，比较器产生等于信号线上存在的噪声的校正信号。然后从信号电压中减去该噪声。

32. 发明授权

US09025678B2 Partial response receiver 有权
标题翻译：部分响应接收器
公开(公告)号：US09025678B2
公开(公告)日：2015-05-05
申请号：US13460732
申请日：2012-04-30
申请人： Vladimir M. Stojanovic , Mark A. Horowitz , Jared L. Zerbe , Anthony Bessios , Andrew C. C. Ho , Jason C. Wei , Grace Tsang , Bruno W. Garlepp
发明人： Vladimir M. Stojanovic , Mark A. Horowitz , Jared L. Zerbe , Anthony Bessios , Andrew C. C. Ho , Jason C. Wei , Grace Tsang , Bruno W. Garlepp
IPC分类号： H04B3/00 , H04L25/00 , H04L25/06 , H04L25/497
CPC分类号： H04L25/03057 , H04L7/0276 , H04L25/063 , H04L25/497 , H04L2025/03369 , H04L2025/03503
摘要： A signaling system is described. The signaling system comprises a transmit device, a receive device including a partial response receive circuit, and a signaling path coupling the transmit device and the receive device. The receive device observes an equalized signal from the signaling path, and includes circuitry to use feedback from the most recent previously resolved symbol to sample a currently incoming symbol. The transmit device equalizes transmit data to transmit the equalized signal, by applying weighting based on one or more data values not associated with the most recent previously resolved symbol value.
摘要翻译：描述信令系统。信令系统包括发送设备，包括部分响应接收电路的接收设备以及耦合发送设备和接收设备的信令路径。接收设备观察来自信令路径的均衡信号，并且包括使用来自最近先前解析的符号的反馈来采样当前输入符号的电路。发送装置通过基于与最近先前分辨的符号值不相关的一个或多个数据值应用加权来均衡发送数据以发送均衡信号。

33. 发明申请

US20120213267A1 PARTIAL RESPONSE RECEIVER 有权
标题翻译：部分响应接收者
公开(公告)号：US20120213267A1
公开(公告)日：2012-08-23
申请号：US13460732
申请日：2012-04-30
申请人： Vladimir M. Stojanovic , Mark A. Horowitz , Jared L. Zerbe , Anthony Bessios , Andrew C.C. Ho , Jason C. Wei , Grace Tsang , Bruno W. Garlepp
发明人： Vladimir M. Stojanovic , Mark A. Horowitz , Jared L. Zerbe , Anthony Bessios , Andrew C.C. Ho , Jason C. Wei , Grace Tsang , Bruno W. Garlepp
IPC分类号： H04L27/01 , H04L27/02 , H04L27/06
CPC分类号： H04L25/03057 , H04L7/0276 , H04L25/063 , H04L25/497 , H04L2025/03369 , H04L2025/03503
摘要： A signaling system is described. The signaling system comprises a transmit device, a receive device including a partial response receive circuit, and a signaling path coupling the transmit device and the receive device. The receive device observes an equalized signal from the signaling path, and includes circuitry to use feedback from the most recent previously resolved symbol to sample a currently incoming symbol. The transmit device equalizes transmit data to transmit the equalized signal, by applying weighting based on one or more data values not associated with the most recent previously resolved symbol value.
摘要翻译：描述信令系统。信令系统包括发送设备，包括部分响应接收电路的接收设备以及耦合发送设备和接收设备的信令路径。接收设备观察来自信令路径的均衡信号，并且包括使用来自最近先前解析的符号的反馈来采样当前输入符号的电路。发送装置通过基于与最近先前分辨的符号值不相关的一个或多个数据值应用加权来均衡发送数据以发送均衡信号。

34. 发明授权

US08428196B2 Equalizing receiver 有权
标题翻译：均衡接收机
公开(公告)号：US08428196B2
公开(公告)日：2013-04-23
申请号：US13469685
申请日：2012-05-11
申请人： Vladimir M. Stojanovic , Mark A. Horowitz , Jared L. Zerbe , Anthony Bessios , Andrew C. C. Ho , Jason C. Wei , Grace Tsang , Bruno W. Garlepp
发明人： Vladimir M. Stojanovic , Mark A. Horowitz , Jared L. Zerbe , Anthony Bessios , Andrew C. C. Ho , Jason C. Wei , Grace Tsang , Bruno W. Garlepp
IPC分类号： H04L27/06
CPC分类号： H04L25/03057 , H04L7/0276 , H04L25/063 , H04L25/497 , H04L2025/03369 , H04L2025/03503
摘要： A signaling system is described. The signaling system comprises a transmit device, a receive device including a partial response receive circuit, and a signaling path coupling the transmit device and the receive device. The receive device observes an equalized signal from the signaling path, and includes circuitry to use feedback from the most recent previously resolved symbol to sample a currently incoming symbol. The transmit device equalizes transmit data to transmit the equalized signal, by applying weighting based on one or more data values not associated with the most recent previously resolved symbol value.
摘要翻译：描述信令系统。信令系统包括发送设备，包括部分响应接收电路的接收设备以及耦合发送设备和接收设备的信令路径。接收设备观察来自信令路径的均衡信号，并且包括使用来自最近先前解析的符号的反馈来采样当前输入符号的电路。发送装置通过基于与最近先前分辨的符号值不相关的一个或多个数据值应用加权来均衡发送数据以发送均衡信号。

35. 发明申请

US20100142610A1 PARTIAL RESPONSE RECEIVER 有权
标题翻译：部分响应接收者
公开(公告)号：US20100142610A1
公开(公告)日：2010-06-10
申请号：US12710615
申请日：2010-02-23
申请人： Vladimir M. Stojanovic , Mark A. Horowitz , Jared L. Zerbe , Anthony Bessios , Andrew C.C. Ho , Jason C. Wei , Grace Tsang , Bruno W. Garlepp
发明人： Vladimir M. Stojanovic , Mark A. Horowitz , Jared L. Zerbe , Anthony Bessios , Andrew C.C. Ho , Jason C. Wei , Grace Tsang , Bruno W. Garlepp
IPC分类号： H04L27/01
CPC分类号： H04L25/03057 , H04L7/0276 , H04L25/063 , H04L25/497 , H04L2025/03369 , H04L2025/03503
摘要： A signaling system is described. The signaling system comprises a transmit device, a receive device including a partial response receive circuit, and a signaling path coupling the transmit device and the receive device. The receive device observes an equalized signal from the signaling path, and includes circuitry to use feedback from the most recent previously resolved symbol to sample a currently incoming symbol. The transmit device equalizes transmit data to transmit the equalized signal, by applying weighting based on one or more data values not associated with the most recent previously resolved symbol value.
摘要翻译：描述信令系统。信令系统包括发送设备，包括部分响应接收电路的接收设备以及耦合发送设备和接收设备的信令路径。接收设备观察来自信令路径的均衡信号，并且包括使用来自最近先前解析的符号的反馈来采样当前输入符号的电路。发送装置通过基于与最近先前分辨的符号值不相关的一个或多个数据值应用加权来均衡发送数据以发送均衡信号。

36. 发明申请

US20090285272A1 PARTIAL RESPONSE RECEIVER 有权
标题翻译：部分响应接收者
公开(公告)号：US20090285272A1
公开(公告)日：2009-11-19
申请号：US12508030
申请日：2009-07-23
申请人： Vladimir M. Stojanovic , Mark A. Horowitz , Jared L. Zerbe , Anthony Bessios , Andrew C.C. Ho , Jason C. Wei , Grace Tsang , Bruno W. Garlepp
发明人： Vladimir M. Stojanovic , Mark A. Horowitz , Jared L. Zerbe , Anthony Bessios , Andrew C.C. Ho , Jason C. Wei , Grace Tsang , Bruno W. Garlepp
IPC分类号： H04B1/38
CPC分类号： H04L25/03057 , H04L7/0276 , H04L25/063 , H04L25/497 , H04L2025/03369 , H04L2025/03503
摘要： An integrated circuit device having a receive circuit is disclosed. The receive circuit generates first and second sets of samples of incoming symbols during first and second time intervals, respectively. A select circuit selects, based at least in part on the first set of samples, at least one sample from the second set to be output as a received data value. The integrated circuit device further includes a transmit circuit to generate an output symbol during a third time interval. The output symbol has an amplitude based, at least in part, on a transmit data value for which an output symbol was generated during a time interval prior to the third time interval.
摘要翻译：公开了一种具有接收电路的集成电路装置。接收电路分别在第一和第二时间间隔期间产生输入符号的第一和第二组样本。选择电路至少部分地基于第一组采样选择要作为接收数据值输出的来自第二组的至少一个采样。集成电路装置还包括在第三时间间隔期间产生输出符号的发送电路。输出符号至少部分地基于在第三时间间隔之前的时间间隔期间产生输出符号的发送数据值。

37. 发明申请

US20100296566A1 METHOD AND APPARATUS FOR DETERMINING A CALIBRATION SIGNAL 有权
标题翻译：用于确定校准信号的方法和装置
公开(公告)号：US20100296566A1
公开(公告)日：2010-11-25
申请号：US12596133
申请日：2008-01-30
申请人： Wendemagegnehu Beyene , Kevin S. Donnelly , Mark A. Horowitz
发明人： Wendemagegnehu Beyene , Kevin S. Donnelly , Mark A. Horowitz
IPC分类号： H04B17/00
CPC分类号： G01R31/31708 , G01R31/3171 , G01R31/318342
摘要： Embodiments of a system for determining and optimizing the performance a signaling system are described. During operation, the system captures or measures a single-bit response (SBR) for the signaling system. Next, the system constructs an idealized inter-symbol-interference-free (ISI-free) SBR for the signaling system which is substantially free of inter-symbol-interference (ISI). The system then calculates an ISI-residual from the captured SBR and the idealized ISI-free SBR. Next, the system constructs a calibration bit pattern for the signaling system that is based substantially on the ISI-residual. Finally, the system uses the calibration bit pattern to calibrate, optimize and determine an aspect of the performance of the signaling system.
摘要翻译：描述了用于确定和优化信号系统的性能的系统的实施例。在操作期间，系统捕获或测量信令系统的单位响应（SBR）。接下来，该系统为基本上没有符号间干扰（ISI）的信令系统构建理想化的符号间无干扰（ISI-free）SBR。然后系统从捕获的SBR和理想的无ISI的SBR计算ISI残差。接下来，系统构建用于基本上基于ISI残差的信令系统的校准位模式。最后，系统使用校准位模式来校准，优化和确定信号系统性能的一个方面。

38. 发明授权

US07565468B2 Integrated circuit memory device and signaling method for adjusting drive strength based on topography of integrated circuit devices 有权
标题翻译：集成电路存储器件和基于集成电路器件形貌调整驱动强度的信令方法
公开(公告)号：US07565468B2
公开(公告)日：2009-07-21
申请号：US11929974
申请日：2007-10-30
申请人： Mark A. Horowitz , Richard M. Barth , Craig E. Hampel , Alfredo Moncayo , Kevin S. Donnelly , Jared L. Zerbe
发明人： Mark A. Horowitz , Richard M. Barth , Craig E. Hampel , Alfredo Moncayo , Kevin S. Donnelly , Jared L. Zerbe
IPC分类号： G06F13/00 , G05F1/10
CPC分类号： G06F13/4291 , G06F3/061 , G06F3/0611 , G06F3/0619 , G06F3/0658 , G06F3/0661 , G06F3/0679 , G06F3/0688 , G06F12/0246 , G06F12/1081 , G06F13/102 , G06F13/1689 , G06F13/364 , G06F13/4072 , G06F13/4086 , G06F13/4234 , G06F13/4243 , G06F2206/1014 , G06F2212/7201 , G11C5/04 , G11C5/063 , G11C7/1048 , G11C7/1072 , G11C7/22 , G11C7/222 , G11C16/32 , G11C19/00 , H03K19/00384 , H03K19/018585
摘要： An integrated circuit device includes an output driver, a first register to store a value representative of a drive strength setting of the output driver, wherein the value is determined based on information stored in a supplemental memory device external to the integrated circuit memory device, and a transmitter circuit configurable to receive the value representative of a drive strength setting of the output driver. The output driver is configurable to output data synchronously with respect to an external clock signal.
摘要翻译：集成电路装置包括输出驱动器，第一寄存器，用于存储代表输出驱动器的驱动强度设置的值，其中该值基于存储在集成电路存储器件外部的补充存储器件中的信息确定，以及发射机电路可配置为接收代表输出驱动器的驱动强度设置的值。输出驱动器可配置为相对于外部时钟信号同步输出数据。

39. 发明授权

US07174400B2 Integrated circuit device that stores a value representative of an equalization co-efficient setting 有权
标题翻译：集成电路装置，其存储代表均衡系数设定的值
公开(公告)号：US07174400B2
公开(公告)日：2007-02-06
申请号：US11181411
申请日：2005-07-13
申请人： Mark A. Horowitz , Richard M. Barth , Craig E. Hampel , Alfredo Moncayo , Kevin S. Donnelly , Jared L. Zerbe
发明人： Mark A. Horowitz , Richard M. Barth , Craig E. Hampel , Alfredo Moncayo , Kevin S. Donnelly , Jared L. Zerbe
IPC分类号： G06F13/00
CPC分类号： G06F13/4291 , G06F3/061 , G06F3/0611 , G06F3/0619 , G06F3/0658 , G06F3/0661 , G06F3/0679 , G06F3/0688 , G06F12/0246 , G06F12/1081 , G06F13/102 , G06F13/1689 , G06F13/364 , G06F13/4072 , G06F13/4086 , G06F13/4234 , G06F13/4243 , G06F2206/1014 , G06F2212/7201 , G11C5/04 , G11C5/063 , G11C7/1048 , G11C7/1072 , G11C7/22 , G11C7/222 , G11C16/32 , G11C19/00 , H03K19/00384 , H03K19/018585
摘要： An integrated circuit device is described. The integrated circuit device includes a transmitter circuit having an output driver to output data, and a register to store a value representative of an equalization co-efficient setting of the output driver. The value may be determined based on information stored in a supplemental memory device.
摘要翻译：描述集成电路器件。集成电路装置包括具有用于输出数据的输出驱动器的发送器电路和用于存储表示输出驱动器的均衡均衡设置的值的寄存器。该值可以基于存储在补充存储器件中的信息来确定。

40. 发明授权

US07051129B2 Memory device having programmable drive strength setting 有权
标题翻译：具有可编程驱动强度设置的存储器
公开(公告)号：US07051129B2
公开(公告)日：2006-05-23
申请号：US10881433
申请日：2004-06-29
申请人： Mark A. Horowitz , Richard M. Barth , Craig E. Hampel , Alfredo Moncayo , Kevin S. Donnelly , Jared L. Zerbe
发明人： Mark A. Horowitz , Richard M. Barth , Craig E. Hampel , Alfredo Moncayo , Kevin S. Donnelly , Jared L. Zerbe
IPC分类号： G06F13/00
CPC分类号： G06F13/4291 , G06F3/061 , G06F3/0611 , G06F3/0619 , G06F3/0658 , G06F3/0661 , G06F3/0679 , G06F3/0688 , G06F12/0246 , G06F12/1081 , G06F13/102 , G06F13/1689 , G06F13/364 , G06F13/4072 , G06F13/4086 , G06F13/4234 , G06F13/4243 , G06F2206/1014 , G06F2212/7201 , G11C5/04 , G11C5/063 , G11C7/1048 , G11C7/1072 , G11C7/22 , G11C7/222 , G11C16/32 , G11C19/00 , H03K19/00384 , H03K19/018585
摘要： Bus communications are optimized by adjusting signal characteristics in accordance with one or more topography dependent parameters. In a bus transmitter, a transmit signal characteristic is adjusted in accordance with a topography dependent parameter. A port in the bus transmitter receives the topography dependent parameter for later use by the parameter adjustment circuitry. The parameter adjustment circuitry adjusts a parameter control signal in accordance with the topography dependent parameter, which is coupled to the output driver. Prior to driving an output signal onto a bus, the output driver adjusts the transmit signal characteristic in accordance with the parameter control signal. Similarly, in a bus receiver, a receive signal characteristic is adjusted in response to a topography dependent parameter.
摘要翻译：通过根据一个或多个地形相关参数调整信号特性来优化总线通信。在总线发送器中，根据地形相关参数来调整发送信号特性。总线发射器中的端口接收地形相关参数，供以后由参数调整电路使用。参数调整电路根据与输出驱动器耦合的地形相关参数来调整参数控制信号。在将输出信号驱动到总线之前，输出驱动器根据参数控制信号调整发送信号特性。类似地，在总线接收器中，响应于地形相关参数来调整接收信号特性。

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