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    • 31. 发明申请
    • Interference Signal Avoiding Device of a Frequency Hopping Spread System and Method Thereof
    • 跳频传播系统的干扰信号避免装置及其方法
    • US20130251001A1
    • 2013-09-26
    • US13990745
    • 2011-12-01
    • Yong-Hwan LeeSeung-Hwan LeeJin-Seok Han
    • Yong-Hwan LeeSeung-Hwan LeeJin-Seok Han
    • H04B1/715
    • H04B1/715H04B2001/7154H04W28/18
    • An interference signal avoiding device of a frequency hopping spread system and a method thereof are disclosed. A method of transmitting/receiving an interference signal avoiding signal according to the present invention includes: determining a frequency hopping channel set and a parameter of an interference signal detector in consideration of characteristics of an interference signal; detecting whether there is an interference signal with respect to frequency hopping candidate channels that are to be used for the next frequency hopping by using the determined interference signal detector; transmitting a signal through a channel that is determined by the interference signal detector that there is no interference signal among the frequency hopping candidate channels; and searching a channel through which the signal is transmitted from the frequency hopping candidate channels in order to receive the transmitted signal.
    • 公开了一种跳频扩散系统的干扰信号避免装置及其方法。 根据本发明的发送/接收干扰信号避免信号的方法包括:考虑干扰信号的特性,确定跳频信道组和干扰信号检测器的参数; 通过使用所确定的干扰信号检测器检测是否存在关于要用于下一次跳频的跳频候选信道的干扰信号; 通过由所述干扰信号检测器确定的在所述跳频候选信道中不存在干扰信号的信道发送信号; 并且从跳频候选信道搜索发送信号的信道,以便接收所发送的信号。
    • 35. 发明授权
    • Aromatic polyamide filament and method of manufacturing the same
    • 芳香族聚酰胺丝及其制造方法
    • US08105521B2
    • 2012-01-31
    • US11994643
    • 2006-07-05
    • In-Sik HanJae-Young LeeSeung-Hwan LeeChang-Bae LeeSo-Yeon Kwon
    • In-Sik HanJae-Young LeeSeung-Hwan LeeChang-Bae LeeSo-Yeon Kwon
    • D01D5/18
    • D01F6/605Y10T428/2913Y10T428/2969
    • Disclosed are wholly aromatic polyamide filament and a method of manufacturing the same, characterized in that, in a process of preparing wholly aromatic polyamide polymer, a multiple tubular feed pipe for polymeric monomer and polymerization solvent with specific construction of adjacent inner paths 11a and outer paths 11b which are alternately arranged one another is used to feed either aromatic diacid chloride A or aromatic diamine dissolved in the polymerization solvent B into a polymerization reactor 20 through corresponding one among the inner and outer paths 11a and 11b. The present invention is effective to progress uniform and homogeneous polymerization over all of area of a polymerization reactor 20 leading to reduction of deviation in degree of polymerization, since polymeric monomers are miscible and react together very well immediately after putting the monomers into the reactor 20. Accordingly, the wholly aromatic polyamide filament produced exhibits narrow PDI and increased ACS, so as to considerably improve strength and modulus thereof.
    • 公开了全芳族聚酰胺长丝及其制造方法,其特征在于,在制备全芳族聚酰胺聚合物的方法中,用于聚合单体的多管式进料管和具有相邻内部通道11a和外部通道的特定结构的聚合溶剂 11b彼此交替排列,用于将溶解在聚合溶剂B中的芳香族二酰氯A或芳香族二胺通过内部通路11a和内部通路11b中的相应一个进入聚合反应器20。 本发明有效地在聚合反应器20的所有区域上进行均匀均匀的聚合,导致聚合度偏差的降低,因为聚合单体是可混溶的,并且在将单体放入反应器20后立即非常好地反应。 因此,所生产的全芳族聚酰胺长丝表现出窄的PDI和增加的ACS,从而显着提高其强度和模量。
    • 36. 发明授权
    • Semiconductor devices including resistor elements comprising a bridge and base elements and related methods
    • 包括电阻元件的半导体器件包括桥接器和基极元件以及相关方法
    • US07838966B2
    • 2010-11-23
    • US11825181
    • 2007-07-05
    • Xiao Quan WangChang-Bong OhSeung-Hwan Lee
    • Xiao Quan WangChang-Bong OhSeung-Hwan Lee
    • H01L23/62
    • H01L27/0802H01L28/20
    • A semiconductor device may include a resistance pattern including a resistance material on a substrate. The resistance pattern may include first and second spaced apart base elements, a bridge element, and first, second, third, and fourth extension elements. The first and second base elements may be substantially parallel, and the bridge element may be connected between respective center portions of the first and second spaced apart base elements. The first and second extension elements may be connected to opposite ends of the first base element and may extend toward the second base element, and the third and fourth extension elements may be connected to opposite ends of the second base element and may extend toward the first base element. Related methods are also discussed.
    • 半导体器件可以包括在基板上包括电阻材料的电阻图案。 电阻图案可以包括第一和第二间隔开的基本元件,桥接元件以及第一,第二,第三和第四延伸元件。 第一和第二基座元件可以是基本上平行的,并且桥接元件可以连接在第一和第二间隔开的基本元件的相应中心部分之间。 第一和第二延伸元件可以连接到第一基座元件的相对端并且可以朝向第二基座元件延伸,并且第三和第四延伸元件可以连接到第二基座元件的相对端并且可以朝着第一基座元件 基本元素 还讨论了相关方法。
    • 40. 发明授权
    • Flash memory devices having multilayered inter-gate dielectric layers including metal oxide layers and methods of manufacturing the same
    • 具有包括金属氧化物层的多层栅极间电介质层的闪存器件及其制造方法
    • US07517750B2
    • 2009-04-14
    • US11383102
    • 2006-05-12
    • Han-Mei ChoiYoung-Geun ParkSeung-Hwan LeeYoung-Sun Kim
    • Han-Mei ChoiYoung-Geun ParkSeung-Hwan LeeYoung-Sun Kim
    • H01L21/8238
    • H01L27/115H01L27/11519H01L27/11521
    • Embodiments of the present invention provide methods of manufacturing memory devices including forming floating gate patterns on a semiconductor substrate having active regions thereon, wherein the floating gate patterns cover the active regions and are spaced apart from the active regions; forming an inter-gate dielectric layer on the semiconductor substrate having the floating gate patterns by alternately stacking a zirconium oxide layer and an aluminum oxide layer at least once, wherein the inter-gate dielectric layer is formed by a deposition process using O3 gas as a reactive gas; forming a control gate layer on the inter-gate dielectric layer; and forming a control gate, an inter-gate dielectric layer pattern and a floating gate by sequentially patterning the control gate layer, the inter-gate dielectric layer and the floating gate pattern, wherein the inter-gate dielectric layer pattern and the control gate are sequentially stacked across the active regions, and the floating gate is formed between the active regions and the inter-gate dielectric layer pattern Memory devices, such as flash memory devices are also provided.
    • 本发明的实施例提供了制造存储器件的方法,包括在其上具有有源区的半导体衬底上形成浮置栅极图案,其中浮置栅极图案覆盖有源区并与有源区间隔开; 通过将氧化锆层和氧化铝层交替层叠至少一次来形成具有浮置栅极图案的半导体衬底上的栅极间电介质层,其中栅极间电介质层通过使用O 3气体作为 反应气体 在所述栅极间电介质层上形成控制栅极层; 以及通过对控制栅极层,栅极间电介质层和浮置栅极图案顺序构图来形成控制栅极,栅极间电介质层图案和浮置栅极,其中栅极间电介质层图案和控制栅极是 顺序堆叠在有源区上,并且在有源区之间形成浮栅,并且还提供诸如闪存器件的栅极间电介质层图案存储器件。