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31. 发明授权

US5776796A Method of encapsulating a semiconductor package 失效
标题翻译：封装半导体封装的方法
公开(公告)号：US5776796A
公开(公告)日：1998-07-07
申请号：US726697
申请日：1996-10-07
申请人： Thomas H. Distefano , John W. Smith , Joseph Fjelstad , Craig S. Mitchell , Konstantine Karavakis
发明人： Thomas H. Distefano , John W. Smith , Joseph Fjelstad , Craig S. Mitchell , Konstantine Karavakis
IPC分类号： H01L21/56 , H01L21/68 , H01L23/24 , H01L23/31 , H01L23/495 , H01L21/44
CPC分类号： H01L21/568 , H01L21/56 , H01L21/565 , H01L21/6835 , H01L23/24 , H01L23/3107 , H01L23/3114 , H01L23/49572 , H01L24/32 , H01L24/50 , H01L24/97 , H01L2224/11003 , H01L2224/83102 , H01L2224/92125 , H01L2224/97 , H01L2924/01015 , H01L2924/01033 , H01L2924/01047 , H01L2924/01058 , H01L2924/01082 , H01L2924/01322 , H01L2924/12042
摘要： A method of encapsulating a semiconductor device. The encapsulation method includes a semiconductor chip package assembly having a spacer layer between a top surface of a sheet-like substrate and a contact bearing surface of a semiconductor chip, wherein the substrate has conductive leads thereon, the leads being electrically connected to terminals on a first end and bonded to respective chip contacts on a second end. Typically, the spacer layer is comprised of a compliant or elastomeric material. A protective layer is attached on a bottom surface of the substrate so as to cover the terminals on the substrate. A flowable, curable encapsulant material is deposited around a periphery of the semiconductor chip after the attachment of the protective layer so as to encapsulate the leads. The encapsulant material is then cured. Typically, this encapsulation method is performed on a plurality of chip assemblies simultaneously.
摘要翻译：一种封装半导体器件的方法。封装方法包括：半导体芯片封装组件，其具有在片状基板的顶表面和半导体芯片的接触支承表面之间的间隔层，其中，所述基板在其上具有导电引线，所述引线电连接到第一端并且在第二端上结合到各个芯片触点。通常，间隔层由顺应性或弹性体材料构成。保护层附着在基板的底面，以覆盖基板上的端子。在安装保护层以便封装引线之后，可流动的可固化的密封剂材料围绕半导体芯片的周边沉积。然后固化密封材料。通常，这种封装方法同时在多个芯片组件上执行。

32. 发明授权

US5663106A Method of encapsulating die and chip carrier 失效
标题翻译：封装芯片和芯片载体的方法
公开(公告)号：US5663106A
公开(公告)日：1997-09-02
申请号：US246113
申请日：1994-05-19
申请人： Konstantine Karavakis , Thomas H. Distefano , John W. Smith, Jr. , Craig Mitchell
发明人： Konstantine Karavakis , Thomas H. Distefano , John W. Smith, Jr. , Craig Mitchell
IPC分类号： H01L21/56 , H01L21/68 , H01L23/24 , H01L23/31 , H01L21/60
CPC分类号： H01L21/568 , H01L21/56 , H01L21/6835 , H01L23/24 , H01L23/3114 , H01L24/97 , H01L2224/11003 , H01L2924/01013 , H01L2924/01033 , H01L2924/01047 , H01L2924/3025 , Y10T29/49146
摘要： A method of packaging a semiconductor chip assembly includes the encapsulation of the same after establishing an encapsulation area and providing a physical barrier for protecting the terminals of a chip carrier. An alternative or supplement to providing a physical barrier is to provide a preform of an encapsulation material which includes a predetermined volume of such material so that only the encapsulation area is filled. For a semiconductor chip assembly which does not yet have an elastomeric layer, a method of simultaneously forming such an elastomeric layer and encapsulating a semiconductor chip assembly is also provided.
摘要翻译：封装半导体芯片组件的方法包括在建立封装区域之后对其进行封装，并提供用于保护芯片载体的端子的物理屏障。提供物理屏障的替代或补充是提供包含材料的预成型件，其包括预定体积的这种材料，使得仅填充封装区域。对于还没有弹性体层的半导体芯片组件，还提供了同时形成这种弹性体层并封装半导体芯片组件的方法。

33. 发明授权

US06700072B2 Electrical connection with inwardly deformable contacts 有权
标题翻译：与内部可变形触点的电气连接
公开(公告)号：US06700072B2
公开(公告)日：2004-03-02
申请号：US09779117
申请日：2001-02-08
申请人： Thomas H. Distefano , Joseph Fjelstad
发明人： Thomas H. Distefano , Joseph Fjelstad
IPC分类号： H05K103
CPC分类号： H05K3/462 , H01L23/49827 , H01L23/5385 , H01L2924/0002 , H01R12/523 , H01R12/714 , H01R13/2414 , H01R43/0256 , H05K1/0272 , H05K1/036 , H05K1/056 , H05K1/116 , H05K3/0032 , H05K3/326 , H05K3/4623 , H05K3/4641 , H05K2201/0195 , H05K2201/0382 , H05K2201/0397 , H05K2201/09536 , H05K2201/09554 , H05K2201/096 , H05K2201/09827 , H05K2201/10378 , H05K2203/0554 , H05K2203/0582 , H05K2203/135 , H05K2203/308 , Y10T29/49126 , Y10T29/49133 , Y10T29/49137 , Y10T29/49139 , Y10T29/49155 , Y10T29/49165 , Y10T156/1744 , H01L2924/00
摘要： An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact extends from a central conductor, and has a peripheral portion adapted to contract radially inwardly toward the central conductor response to a force applied by a contact pad defining a central hole on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts contract radially inwardly and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by friction welding, or by a conductive bonding material carried on the contacts themselves.
摘要翻译：用于微电子电路板之间的互连的插入件在其表面具有接触。每个接触件从中心导体延伸，并且具有适于从中心导体径向向内收缩的外围部分，以响应由在所接合的电路板上限定中心孔的接触垫施加的力。因此，当电路板被内插件压缩时，触头径向向内收缩并且擦拭穿过焊盘。擦拭动作有助于通过摩擦焊接将接触件接合到焊盘，或者通过接触件本身承载的导电接合材料。

34. 发明授权

US06458628B1 Methods of encapsulating a semiconductor chip using a settable encapsulant 有权
标题翻译：使用可固化密封剂封装半导体芯片的方法
公开(公告)号：US06458628B1
公开(公告)日：2002-10-01
申请号：US09712635
申请日：2000-11-14
申请人： Thomas H. Distefano , Craig S. Mitchell
发明人： Thomas H. Distefano , Craig S. Mitchell
IPC分类号： H01L2144
CPC分类号： H01L21/565 , H01L2924/0002 , H01L2924/00
摘要： A method of making a semiconductor chip package by attaching a chip to a dielectric layer; placing the dielectric layer and chip into a mold; disposing a thixotropic composition that has been sheared to reduce its viscosity into the mold and curing the thixotropic composition after the chip and dielectric layer have been removed from the mold. A method of making a semiconductor chip package without using a mold by disposing a sheared thixotropic composition between a semiconductor chip and a dielectric layer and then curing the thixotropic composition to form a cured encapsulant. A method of making a semiconductor chip package without using a mold during the curing step and without the need to use a thixotropic composition by placing a semiconductor chip attached to a dielectric layer into a mold and disposing a liquid composition between the chip and the dielectric layer, forming a cured skin on the liquid composition, removing the work-piece from the mold and then complete the cure of the liquid composition.
摘要翻译：一种通过将芯片附着到电介质层来制造半导体芯片封装的方法; 将介电层和芯片放置在模具中; 设置已经剪切以将其粘度降低到模具中并在芯片和电介质层已经从模具中去除之后固化触变组合物的触变组合物。一种通过在半导体芯片和电介质层之间设置剪切的触变组合物然后固化触变组合物以形成固化的密封剂来制造半导体芯片封装而不使用模具的方法。一种在固化步骤中不使用模具制造半导体芯片封装的方法，并且不需要通过将附着到电介质层的半导体芯片放置在模具中并且在芯片和电介质层之间设置液体组合物来使用触变组合物在液体组合物上形成固化的皮肤，从模具中取出工件，然后完成液体组合物的固化。

35. 发明授权

US06359335B1 Method of manufacturing a plurality of semiconductor packages and the resulting semiconductor package structures 有权
公开(公告)号：US06359335B1
公开(公告)日：2002-03-19
申请号：US09711036
申请日：2000-11-13
申请人： Thomas H. Distefano , John W. Smith , Craig Mitchell
发明人： Thomas H. Distefano , John W. Smith , Craig Mitchell
IPC分类号： H01L2144
CPC分类号： H01L21/568 , H01L21/56 , H01L21/561 , H01L21/565 , H01L21/6835 , H01L23/16 , H01L23/24 , H01L23/3107 , H01L23/3114 , H01L23/49572 , H01L23/49816 , H01L24/32 , H01L24/48 , H01L24/97 , H01L2224/05599 , H01L2224/11003 , H01L2224/45099 , H01L2224/48091 , H01L2224/48463 , H01L2224/48465 , H01L2224/73265 , H01L2224/85399 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01082 , H01L2924/01322 , H01L2924/10253 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2224/85 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor chip packaging assembly comprising a frame having a central aperture, a flexible substrate attached to the frame across the central aperture, and a unitary support structure having a plurality of apertures therethrough attached to the substrate within the central aperture of the frame with at least some of the substrate terminals underlying the unitary support structure. A chip is disposed within each aperture and attached to the substrate with the electrical contacts of the chip connected to the substrate terminals. A compliant layer is disposed between the substrate and the unitary support structure and between the substrate and the chip.

36. 发明授权

US06309915B1 Semiconductor chip package with expander ring and method of making same 有权
标题翻译：具有扩展环的半导体芯片封装及其制造方法
公开(公告)号：US06309915B1
公开(公告)日：2001-10-30
申请号：US09245224
申请日：1999-02-05
申请人： Thomas H. Distefano
发明人： Thomas H. Distefano
IPC分类号： H01L2144
CPC分类号： H01L21/568 , H01L21/6835 , H01L23/16 , H01L23/3107 , H01L23/3114 , H01L23/49572 , H01L23/49816 , H01L24/01 , H01L2924/01322 , H01L2924/19041 , H01L2924/351 , H01L2924/00
摘要： A method of making a semiconductor chip assembly, including providing a dielectric element with a plurality of electrically conductive terminals, disposing an expander ring over the dielectric element so that a semiconductor chip on the dielectric layer is disposed in a central opening in the expander ring, and disposing an encapsulant in the gap between the expander ring and the semiconductor chip. The size of the gap is controlled to minimize the pressure exerted on the leads by the elastomer as it expands and contracts in response to changes in temperature. The semiconductor chip and expander ring may also be connected to a heat sink or thermal spreader with a compliant adhesive.
摘要翻译：一种制造半导体芯片组件的方法，包括提供具有多个导电端子的介质元件，在所述电介质元件上设置扩展器环，使得所述电介质层上的半导体芯片设置在所述扩展器环中的中心开口中，以及在所述扩展器环和所述半导体芯片之间的间隙中设置密封剂。间隙的尺寸被控制以使由弹性体施加在引线上的压力最小化，因为它随着温度的变化而膨胀和收缩。半导体芯片和扩展器环也可以通过柔性粘合剂连接到散热器或散热器。

37. 发明授权

US06196042B1 Coining tool and process of manufacturing same for making connection components 失效
标题翻译：压印工具及制造过程制造连接部件
公开(公告)号：US06196042B1
公开(公告)日：2001-03-06
申请号：US09281643
申请日：1999-03-31
申请人： Thomas H. Distefano , Joseph Fjelstad , Belgacem Haba
发明人： Thomas H. Distefano , Joseph Fjelstad , Belgacem Haba
IPC分类号： B21D2810
CPC分类号： H01L21/4842 , Y10T29/49121
摘要： A tool having a coining projection is operative for forming a frangible portion in a lead of a microelectronic connection component by application of a compressive force. The coining projection is supported on a pedestal formed from a tool body. In an alternative embodiment, the pedestal is formed on a backing plate for use in circuits up construction. The pedestal is sized and shaped so as to be received within a gap formed in a support layer for the leads. By application of the compressive force, the coining projection will penetrate the lead within the region of the gap to form the frangible portion.
摘要翻译：具有压印突起的工具用于通过施加压缩力来形成微电子连接部件的引线中的易碎部分。压印突起支撑在由工具主体形成的基座上。在替代实施例中，基座形成在背板上用于回路结构。基座的尺寸和形状被设计成容纳在形成在引线的支撑层中的间隙内。通过施加压缩力，压印突起将在间隙的区域内穿透引线，以形成易碎部分。

38. 发明授权

US6126428A Vacuum dispense apparatus for dispensing an encapsulant 有权
标题翻译：用于分配密封剂的真空分配装置
公开(公告)号：US6126428A
公开(公告)日：2000-10-03
申请号：US227475
申请日：1999-01-08
申请人： Craig S. Mitchell , Thomas H. Distefano
发明人： Craig S. Mitchell , Thomas H. Distefano
IPC分类号： H01L21/56 , H01L21/60 , H01L23/48 , H01L23/498 , B29C67/00
CPC分类号： H01L24/81 , H01L21/56 , H01L21/563 , H01L23/49811 , H01L23/49827 , H01L23/4985 , H01L24/72 , H01L24/75 , H01L2224/05568 , H01L2224/05573 , H01L2224/05599 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73203 , H01L2224/73204 , H01L2224/75 , H01L2224/75283 , H01L2224/7565 , H01L2224/81801 , H01L2224/83136 , H01L2224/83868 , H01L2224/85399 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01018 , H01L2924/01027 , H01L2924/01033 , H01L2924/01039 , H01L2924/01055 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/12042 , H01L2924/15174 , H01L2924/15311 , H01L2924/1532 , H01L2924/15787 , H01L2924/181 , H05K2201/0133
摘要： A microelectronic assembly such as an assembly of a semiconductor chip and mounting substrate is encapsulated by applying an encapsulant to the assembly while maintaining the assembly under a subatmospheric pressure to minimize gas entrapment in the encapsulant. After the encapsulant flow around the assembly, a higher pressure is applied, causing collapse of any voids in the encapsulant. The encapsulant is then cured. The apparatus used for such encapsulation may include a chamber and a dispenser having a nozzle disposed within the chamber, and may also include a device for moving the nozzle or the assembly relative to the chamber.
摘要翻译：微电子组件例如半导体芯片和安装基板的组件通过将密封剂施加到组件而被封装，同时将组件保持在低于大气压的压力下，以最小化密封剂中的气体截留。在密封剂围绕组件流动之后，施加更高的压力，导致密封剂中任何空隙的塌陷。密封剂然后固化。用于这种封装的装置可以包括腔室和分配器，其具有设置在腔室内的喷嘴，并且还可以包括用于相对于腔室移动喷嘴或组件的装置。

39. 发明授权

US6081035A Microelectronic bond ribbon design 失效
标题翻译：微电子键带设计
公开(公告)号：US6081035A
公开(公告)日：2000-06-27
申请号：US736415
申请日：1996-10-24
申请人： Michael Warner , Thomas H. Distefano , David Gibson
发明人： Michael Warner , Thomas H. Distefano , David Gibson
IPC分类号： H01L23/495 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/50 , H01L23/49541 , H01L23/49558 , H01L23/49572 , H01L23/49586 , H01L2924/01027 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/12042 , H01L2924/14
摘要： An improved bond ribbon design, said bond ribbon having a dual taper that functions to localize the bending along a predetermined distribution of the bond ribbon during the bonding of the bond ribbon to an associated contact of a semiconductor chip. Use of the dual-tapered bond ribbons during bonding provides a bonded bond ribbon having a form that is substantially s-shaped. The radii of curvature making out the curves of the s-shaped configuration can be predetermined and controlled by the length and taper of the individual tapered section. The improved bond ribbon further comprises an anchor pad, said anchor pad characterized by a large surface area that decreases the likelihood of delamination of it from a supporting dielectric structure. A multiplicity of these improved bond ribbons can be fabricated in an external connection component so as to facilitate the alignment and bonding process of multiple bond ribbons to corresponding contacts of the semiconductor chip and can be designed, configured or placed such that the corner contact of the semiconductor chip are accessible for bonding. With respect to the problems associated with accessing the corner contacts of a semiconductor chip when using the connection component, three approaches are offered as solutions.
摘要翻译：改进的粘结带设计，所述粘结带具有双锥度，其功能是在粘结带与半导体芯片的相关联的接合处期间沿着粘合带的预定分布定位弯曲。在接合期间使用双锥形粘结带提供具有基本上S形的形式的粘结粘结带。形成s形构造曲线的曲率半径可以由单个锥形部分的长度和锥度来预定和控制。改进的粘结带还包括锚垫，所述锚垫的特征在于大的表面积减小了其从支撑介质结构分层的可能性。可以在外部连接部件中制造多个这些改进的接合带，以便于将多个接合带对准和接合处理到半导体芯片的对应接点，并且可以被设计，配置或放置，使得半导体芯片可用于接合。关于在使用连接部件时访问半导体芯片的角接触相关的问题，提供三种方案作为解决方案。

40. 发明授权

US6080605A Methods of encapsulating a semiconductor chip using a settable encapsulant 有权
标题翻译：使用可固化密封剂封装半导体芯片的方法
公开(公告)号：US6080605A
公开(公告)日：2000-06-27
申请号：US166812
申请日：1998-10-06
申请人： Thomas H. Distefano , Craig S. Mitchell
发明人： Thomas H. Distefano , Craig S. Mitchell
IPC分类号： H01L21/56 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L21/565 , H01L2924/0002
摘要： A method of making a semiconductor chip package by attaching a chip to a dielectric layer; placing the dielectric layer and chip into a mold; disposing a thixotropic composition that has bee sheared to reduced its viscosity into the mold and curing the thixotropic composition after the chip and dielectric layer have been removed from the mold. A method of making a semiconductor chip package without using a mold by disposing a sheared thixotropic composition between a semiconductor chip and a dielectric layer and then curing the thixotropic composition to form a cured encapsulant. A method of making a semiconductor chip package without using a mold during the curing step and without the need to use a thixotropic composition by placing a semiconductor chip attached to a dielectric layer into a mold and disposing a liquid composition between the chip and the dielectric layer, forming a cured skin on the liquid composition, removing the work-piece from the mold and then completely the cure of the liquid composition.
摘要翻译：一种通过将芯片附着到电介质层来制造半导体芯片封装的方法; 将介电层和芯片放置在模具中; 在从模具中除去芯片和电介质层之后，设置一种具有剪切力的触变组合物以将其粘度降低到模具中并固化触变组合物。一种通过在半导体芯片和电介质层之间设置剪切的触变组合物然后固化触变组合物以形成固化的密封剂来制造半导体芯片封装而不使用模具的方法。一种在固化步骤中不使用模具制造半导体芯片封装的方法，并且不需要通过将附着到电介质层的半导体芯片放置在模具中并且在芯片和电介质层之间设置液体组合物来使用触变组合物在液体组合物上形成固化的皮肤，从模具中取出工件，然后完全固化液体组合物。

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