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31. 发明授权

US06687291B1 Time-domain equalizer of cascaded filters for VDSL 失效
标题翻译：用于VDSL的级联滤波器的时域均衡器
公开(公告)号：US06687291B1
公开(公告)日：2004-02-03
申请号：US09498318
申请日：2000-02-04
申请人： Hoon Lee , Tae Whan Yoo , Jung Hak Kim , Jeong Jin Lee
发明人： Hoon Lee , Tae Whan Yoo , Jung Hak Kim , Jeong Jin Lee
IPC分类号： H03H730
CPC分类号： H04L27/2647 , H04L25/03178
摘要： Method for designing TEQs(Time-domain Equalizers) for different signal bands in a VDSL transmission system, including the steps of dividing an entire signal band into at least two signal bands, and respectively modulating the divided signal bands before transmission at a transmitter, and applying respective transmitted signal bands to an algorithm that can reduce channel response lengths of the respective signal bands at a receiver, for obtaining respective TEQs, and connecting the TEQs in series, wherein an entire signal band is divided into a low frequency signal band and a high frequency signal band, with the low frequency signal band allocated smaller than the high frequency signal band, and preferably the low frequency signal band includes the signal band used in an ADSL, whereby reducing an amount of hardware and assuring an interchangeability with the ADSL transmission system.
摘要翻译：一种用于在VDSL传输系统中为不同信号频带设计TEQ（时域均衡器）的方法，包括以下步骤：将整个信号频带划分成至少两个信号频带，以及在发射机发射之前分别调制分频信号频带，以及将各个发送的信号频带应用于可以减少接收机处的相应信号频带的信道响应长度的算法，以获得相应的TEQ，并串联连接TEQ，其中整个信号频带被划分为低频信号频带和高频信号频带，其中低频信号频带被分配为小于高频信号频带，并且优选地，低频信号频带包括在ADSL中使用的信号频带，由此减少硬件量并确保与ADSL传输的互换性系统。

32. 发明授权

US08929118B2 Stacked memory device having inter-chip connection unit, memory system including the same, and method of compensating for delay time of transmission line 有权
标题翻译：具有芯片间连接单元的堆叠存储器件，包括其的存储器系统以及补偿传输线路的延迟时间的方法
公开(公告)号：US08929118B2
公开(公告)日：2015-01-06
申请号：US13080061
申请日：2011-04-05
申请人： Chi-Sung Oh , Jin-Ho Kim , Ho-Cheol Lee , Uk-Song Kang , Hoon Lee
发明人： Chi-Sung Oh , Jin-Ho Kim , Ho-Cheol Lee , Uk-Song Kang , Hoon Lee
IPC分类号： G11C5/06 , G11C5/02 , G11C7/10
CPC分类号： G11C7/10 , G11C5/02 , G11C7/1048
摘要： A stacked semiconductor memory device is provided which includes a first memory chip including a first transmission line, a second transmission line, and a logic circuit configured to execute a logic operation on a first signal of the first transmission line and a second signal of the second transmission line. The stacked semiconductor memory device further includes a second memory chip stacked over the first memory chip, an inter-chip connection unit electrically coupled between the second memory chip and the first transmission line of the first memory chip, and a dummy inter-chip connection unit electrically coupled to the second transmission line of the first memory chip and electrically isolated from the second memory chip.
摘要翻译：提供一种叠层半导体存储器件，其包括第一存储器芯片，该第一存储器芯片包括第一传输线，第二传输线和被配置为对第一传输线的第一信号执行逻辑运算的逻辑电路和第二传输线的第二信号传输线。层叠半导体存储器件还包括堆叠在第一存储器芯片上的第二存储器芯片，电连接在第二存储器芯片和第一存储器芯片的第一传输线之间的芯片间连接单元，以及虚拟芯片间连接单元电耦合到第一存储器芯片的第二传输线并且与第二存储器芯片电隔离。

33. 发明申请

US20130034027A1 METHOD AND APPARATUS FOR PERFORMING TRANSMISSION AND RECEPTION SIMULTANEOUSLY IN SAME FREQUENCY BAND 有权
标题翻译：用于在同一频段内同时执行传输和接收的方法和装置
公开(公告)号：US20130034027A1
公开(公告)日：2013-02-07
申请号：US13564367
申请日：2012-08-01
申请人： Seungjae BAHNG , Hoon Lee
发明人： Seungjae BAHNG , Hoon Lee
IPC分类号： H04B7/00
CPC分类号： H04B7/10 , H01Q3/08 , H04L27/2332
摘要： There are provided a method and apparatus for transmitting and receiving signals in the same frequency band at the same time. A signal is received using a dual polarization antenna, the main axis of the polarization of the reception signal is predicted by performing adaptive polarization tracking, and polarization filtering is performed in order to remove interference. A signal is transmitted through a polarization completely orthogonal to the tracked polarization. In accordance with the present invention, in a wireless communication system, signals can be transmitted and received in the same frequency band at the same time.
摘要翻译：提供了一种在同一频带内发送和接收信号的方法和装置。使用双极化天线接收信号，通过执行自适应偏振跟踪来预测接收信号的极化的主轴，并执行偏振滤波以消除干扰。信号通过与跟踪的极化完全正交的偏振透射。根据本发明，在无线通信系统中，可以同时在相同频带中发送和接收信号。

34. 发明申请

US20130021866A1 Semiconductor Devices Compatible with Mono-Rank and Multi-Ranks 有权
标题翻译：半导体器件兼容单级和多级
公开(公告)号：US20130021866A1
公开(公告)日：2013-01-24
申请号：US13535537
申请日：2012-06-28
申请人： Hoon Lee
发明人： Hoon Lee
IPC分类号： G11C8/00
CPC分类号： H01L25/0657 , G11C5/02 , G11C7/10 , G11C7/20 , G11C8/18 , H01L24/13 , H01L24/16 , H01L24/48 , H01L25/18 , H01L2224/13025 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/16227 , H01L2224/48145 , H01L2225/06506 , H01L2225/06513 , H01L2225/06517 , H01L2225/06531 , H01L2225/06541 , H01L2225/06565 , H01L2225/06572 , H01L2924/00014 , H01L2924/1434 , H01L2924/1436 , H01L2924/15192 , H01L2924/15311 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要： A provided memory device is compatible with a mono-rank or multi-ranks. A plurality of memory layers are stacked in the memory device. The memory device receives an address signal and chip select signals in response to a chip identification signal and a mode signal used to determine a mono-rank or multi-ranks. The plurality of memory layers operate as the mono-rank accessed by the address signal, or operate as the multi-ranks accessed by the chip select signals.
摘要翻译：提供的存储器件与单级或多级兼容。多个存储器层被堆叠在存储器件中。存储器件响应于芯片识别信号和用于确定单等级或多等级的模式信号而接收地址信号和片选信号。多个存储器层作为由地址信号访问的单级操作，或者作为由芯片选择信号访问的多级操作。

35. 发明申请

US20130003897A1 METHOD AND APPARATUS FOR DEMODULATING DOWNLINK SIGNAL IN WIRELESS COMMUNICATION SYSTEM 审中-公开
标题翻译：在无线通信系统中解调下行链路信号的方法和装置
公开(公告)号：US20130003897A1
公开(公告)日：2013-01-03
申请号：US13458261
申请日：2012-04-27
申请人： Jun Woo KIM , Kyung Yeol Sohn , Hoon Lee , Youn Ok Park
发明人： Jun Woo KIM , Kyung Yeol Sohn , Hoon Lee , Youn Ok Park
IPC分类号： H04L27/06 , H03D1/00
CPC分类号： H04L27/2607 , H04L5/0035 , H04L27/2662 , H04L27/2691
摘要： There is provided a method and apparatus in which a user equipment demodulates a downlink signal in a wireless communication system. The user equipment receives a first orthogonal frequency division multiplexing (OFDM) signal from a first node serving the mobile station, receives a second OFDM signal from a second node different from the first node, and demodulates the first OFDM signal and the second OFDM signal in a fast Fourier transform (FFT) section. The first OFDM signal and the second OFDM signal are either normal mode signals each having a first cyclic prefix (CP) or cooperative mode signals each having a second CP, and the second CP has a longer length than the first CP.
摘要翻译：提供了一种在无线通信系统中用户设备解调下行链路信号的方法和装置。用户设备从服务于移动台的第一节点接收第一正交频分复用（OFDM）信号，从不同于第一节点的第二节点接收第二OFDM信号，并且解调第一OFDM信号和第二OFDM信号快速傅里叶变换（FFT）部分。第一OFDM信号和第二OFDM信号是均具有第一循环前缀（CP）或每个具有第二CP的协作模式信号的正常模式信号，并且第二CP具有比第一CP更长的长度。

36. 发明申请

US20120300528A1 Stacked Memory Module and System 有权
标题翻译：堆叠内存模块和系统
公开(公告)号：US20120300528A1
公开(公告)日：2012-11-29
申请号：US13535363
申请日：2012-06-28
申请人： Uk-song Kang , Hoe-Ju Chung , Jang-Seok Choi , Hoon Lee
发明人： Uk-song Kang , Hoe-Ju Chung , Jang-Seok Choi , Hoon Lee
IPC分类号： G11C5/02
CPC分类号： G11C5/02 , G11C5/025 , G11C5/04 , G11C8/12 , G11C8/18 , G11C29/14 , H01L23/481 , H01L25/0657 , H01L2224/05001 , H01L2224/05026 , H01L2224/05548 , H01L2224/05573 , H01L2224/13025 , H01L2224/16145 , H01L2924/00014 , H01L2924/15311 , H01L2224/05599 , H01L2224/05099
摘要： A three dimensional memory module and system are formed with at least one slave chip stacked over a master chip. Through semiconductor vias (TSVs) are formed through at least one of the master and slave chips. The master chip includes a memory core for increased capacity of the memory module/system. In addition, capacity organizations of the three dimensional memory module/system resulting in efficient wiring is disclosed for forming multiple memory banks, multiple bank groups, and/or multiple ranks of the three dimensional memory module/system.
摘要翻译：三维存储器模块和系统形成有在主芯片上堆叠的至少一个从芯片。通过半导体通孔（TSV）通过主芯片和从芯片中的至少一个形成。主芯片包括用于增加存储器模块/系统容量的存储器核心。此外，公开了形成有效布线的三维存储器模块/系统的容量组织，用于形成三维存储器模块/系统的多个存储器组，多个存储体组和/或多个等级。

37. 发明授权

US08295414B2 Device for gain control and method for receiving signal 有权
标题翻译：增益控制装置及接收信号的方法
公开(公告)号：US08295414B2
公开(公告)日：2012-10-23
申请号：US12510120
申请日：2009-07-27
申请人： Hoon Lee , Young Jo Bang , Seungjae Bahng , Youn Ok Park
发明人： Hoon Lee , Young Jo Bang , Seungjae Bahng , Youn Ok Park
IPC分类号： H04L27/08
CPC分类号： H03G3/3052
摘要： The present invention relates to a device for gain control and a method for receiving a signal. The device for gain control according to the present invention includes a map interpreter that detects beamforming symbol periods in wireless signals, a power calculator that calculate the average power of the beamforming symbol periods in response to outputs of the map interpreter, a gain calculator that calculates gain control signals on the basis of the output signals of the power calculator, and a switch that outputs gains from the gain control signals, in which the wireless signals are corrected on the basis of the gains.
摘要翻译：本发明涉及一种用于增益控制的装置和一种用于接收信号的方法。根据本发明的用于增益控制的装置包括：地图解释器，其检测无线信号中的波束成形符号周期;功率计算器，其响应于地图解释器的输出计算波束成形符号周期的平均功率;计算增益计算器基于功率计算器的输出信号的增益控制信号和从增益控制信号输出增益的开关，其中基于增益来校正无线信号。

38. 发明授权

US08054909B2 Method of selecting candidate vector and method of detecting transmission symbol 有权
标题翻译：选择候选矢量的方法和检测传输符号的方法
公开(公告)号：US08054909B2
公开(公告)日：2011-11-08
申请号：US12141539
申请日：2008-06-18
申请人： Seung Jae Bahng , Jae Kwon Kim , Hoon Heo , Hyun Myung Wu , Youn-Ok Park , Young Jo Bang , Hyeong Sook Park , Hoon Lee , Young Ha Lee , Jung Pil Choi
发明人： Seung Jae Bahng , Jae Kwon Kim , Hoon Heo , Hyun Myung Wu , Youn-Ok Park , Young Jo Bang , Hyeong Sook Park , Hoon Lee , Young Ha Lee , Jung Pil Choi
IPC分类号： H04L27/00 , G06Q30/00
CPC分类号： H04L25/067 , H04L25/03203 , H04L2025/03426
摘要： The present invention relates to a method of detecting a candidate vector and a method of detecting a transmission symbol using the same. According to an embodiment of the present invention, in a multiple input multiple output (MIMO) system using spatial multiplexing (SM), a receiver selects candidate vectors corresponding to a layer located at a last row among a plurality of rearranged layers, and sequentially ranks constellation dots of a next layer for each of the selected candidate vectors. Then, a plurality of arbitrary constellation dots are selected from the ranked constellation dots, accumulated costs of the arbitrary constellation dots are calculated, and a candidate vector is selected in correspondence with a constellation dot having a minimal accumulated cost. Then, a new arbitrary constellation dot is selected in place of the constellation dot selected as the candidate vector, an accumulated cost of the selected arbitrary constellation dot is compared with accumulated costs of the other arbitrary constellation dots, and another candidate vector is selected.
摘要翻译：本发明涉及检测候选向量的方法和使用其的发送符号的检测方法。根据本发明的实施例，在使用空间复用（SM）的多输入多输出（MIMO）系统中，接收机选择与多个重排层中位于最后一行的层相对应的候选向量，并且顺次排列每个所选候选向量的下一层的星座点。然后，从分级星座点中选择多个任意星座点，计算任意星座点的累积成本，并且与具有最小累积成本的星座点对应地选择候选矢量。然后，代替选择为候选矢量的星座点，选择新的任意星座点，将所选择的任意星座点的累积成本与其他任意星座点的累积成本进行比较，并选择另一候选矢量。

39. 发明申请

US20110265560A1 ENGINE MISFIRE DETECTION SYSTEMS AND METHODS USING DISCRETE FOURIER TRANSFORM APPROXIMATION 有权
标题翻译：发动机失踪检测系统和使用离散傅立叶变换近似的方法
公开(公告)号：US20110265560A1
公开(公告)日：2011-11-03
申请号：US12770061
申请日：2010-04-29
申请人： Byungho Lee , Hoon Lee , Jeffrey A. Morgan
发明人： Byungho Lee , Hoon Lee , Jeffrey A. Morgan
IPC分类号： G01M15/11
CPC分类号： G01M15/11
摘要： A method of detecting a misfire of an engine includes determining a range of sub-harmonic frequencies of one of a crankshaft sensor signal and an engine speed signal. The range of sub-harmonic frequencies is determined based on a fundamental frequency. The sub-harmonic frequencies are less than the fundamental frequency. Frequency content magnitudes are generated based on the range of the sub-harmonic frequencies and a Discrete Fourier Transform of at least one of the crankshaft sensor signal and an engine speed signal. An energy from velocity non-uniformity (EVN) signal is generated based on the frequency content magnitudes and the range of the sub-harmonic frequencies. The misfire is detected based on the EVN signal and a misfire threshold.
摘要翻译：检测发动机失火的方法包括确定曲轴传感器信号和发动机转速信号之一的次谐波频率的范围。次谐波频率的范围是基于基频确定的。次谐波频率小于基频。基于副谐波频率的范围和曲轴传感器信号和发动机转速信号中的至少一个的离散傅立叶变换来生成频率内容量。基于频率含量大小和次谐波频率的范围，产生来自速度不均匀性（EVN）信号的能量。基于EVN信号和失火阈值检测失火。

40. 发明授权

US08031505B2 Stacked memory module and system 有权
标题翻译：堆叠内存模块和系统
公开(公告)号：US08031505B2
公开(公告)日：2011-10-04
申请号：US12454064
申请日：2009-05-12
申请人： Uk-Song Kang , Hoe-Ju Chung , Jang-Seok Choi , Hoon Lee
发明人： Uk-Song Kang , Hoe-Ju Chung , Jang-Seok Choi , Hoon Lee
IPC分类号： G11C5/02
CPC分类号： G11C5/02 , G11C5/025 , G11C5/04 , G11C8/12 , G11C8/18 , G11C29/14 , H01L23/481 , H01L25/0657 , H01L2224/05001 , H01L2224/05026 , H01L2224/05548 , H01L2224/05573 , H01L2224/13025 , H01L2224/16145 , H01L2924/00014 , H01L2924/15311 , H01L2224/05599 , H01L2224/05099
摘要： A three dimensional memory module and system are formed with at least one slave chip stacked over a master chip. Through semiconductor vias (TSVs) are formed through at least one of the master and slave chips. The master chip includes a memory core for increased capacity of the memory module/system. In addition, capacity organizations of the three dimensional memory module/system resulting in efficient wiring is disclosed for forming multiple memory banks, multiple bank groups, and/or multiple ranks of the three dimensional memory module/system.
摘要翻译：三维存储器模块和系统形成有在主芯片上堆叠的至少一个从芯片。通过半导体通孔（TSV）通过主芯片和从芯片中的至少一个形成。主芯片包括用于增加存储器模块/系统容量的存储器核心。此外，公开了形成有效布线的三维存储器模块/系统的容量组织，用于形成三维存储器模块/系统的多个存储器组，多个存储体组和/或多个等级。

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