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31. 发明申请

US20070142012A1 Wireless communication receiver 审中-公开
标题翻译：无线通信接收机
公开(公告)号：US20070142012A1
公开(公告)日：2007-06-21
申请号：US11702493
申请日：2007-02-06
申请人： Yukinori Akamine , Hisayoshi Kajiwara , Satoshi Tanaka , Takashi Yano , Hirotake Ishii , Akio Yamamoto , Kazuaki Hori , Kazuhiko Hikasa
发明人： Yukinori Akamine , Hisayoshi Kajiwara , Satoshi Tanaka , Takashi Yano , Hirotake Ishii , Akio Yamamoto , Kazuaki Hori , Kazuhiko Hikasa
IPC分类号： H04B1/06 , H04B7/00
CPC分类号： H03G3/3078 , H03G3/3052 , H04B1/707
摘要： A wireless communication receiver that is able to lessen the effect of noise that accompanies gain change by programmable gain amplifiers. The receiver includes an AGC controller which controls the timing at which the programmable gain amplifiers make gain change, using a terminal counter and a sequencer. The receiver prevents gain change noise signals during the reception of control signals and other signals that are susceptible to noise. By the timing control feature, the programmable gain amplifiers make gain change while reducing noise impact.
摘要翻译：一种无线通信接收机，能够通过可编程增益放大器减轻伴随增益变化的噪声影响。接收机包括AGC控制器，其使用终端计数器和定序器来控制可编程增益放大器使增益改变的定时。接收器在接收到易受噪声的控制信号和其它信号期间防止增益变化噪声信号。通过定时控制功能，可编程增益放大器可实现增益改变，同时降低噪声影响。

32. 发明授权

US07194244B2 Wireless communication receiver 失效
公开(公告)号：US07194244B2
公开(公告)日：2007-03-20
申请号：US10253648
申请日：2002-09-25
申请人： Yukinori Akamine , Hisayoshi Kajiwara , Satoshi Tanaka , Takashi Yano , Hirotake Ishii , Akio Yamamoto , Kazuaki Hori , Kazuhiko Hikasa
发明人： Yukinori Akamine , Hisayoshi Kajiwara , Satoshi Tanaka , Takashi Yano , Hirotake Ishii , Akio Yamamoto , Kazuaki Hori , Kazuhiko Hikasa
IPC分类号： H04B1/06
CPC分类号： H03G3/3078 , H03G3/3052 , H04B1/707
摘要： A wireless communication receiver that is able to lessen the effect of noise that accompanies gain change by programmable gain amplifiers. The receiver includes an AGC controller which controls the timing at which the programmable gain amplifiers make gain change, using a terminal counter and a sequencer. The receiver prevents gain change noise signals during the reception of control signals and other signals that are susceptible to noise. By the timing control feature, the programmable gain amplifiers make gain change while reducing noise impact.

33. 发明授权

US07856218B2 Direct conversion receiver 有权
标题翻译：直接转换接收机
公开(公告)号：US07856218B2
公开(公告)日：2010-12-21
申请号：US11725475
申请日：2007-03-20
申请人： Yukinori Akamine , Satoshi Tanaka , Akio Yamamoto , Kazuaki Hori
发明人： Yukinori Akamine , Satoshi Tanaka , Akio Yamamoto , Kazuaki Hori
IPC分类号： H04B1/10
CPC分类号： H04B1/30 , H03G3/3052
摘要： In a direct conversion receiver, to cancel a DC offset generated in the baseband processing block, negative feedback arrangements comprising a gain control amplifier and a low-pass filter are respectively attached to the I and Q signal branches of the baseband block following mixer outputs. The gain control amplifier in each negative feedback circuit is gain adjusted so that the product G·B of the gain G of a primary gain control amplifier and its own gain B will be constant and thereby the DC offset is cancelled. This DC offset cancellation can be applied in a continuous receiving system with no intermittent time during a receiving operation. Capacitance elements located off-chip can be reduced to those to be used only in the low-pass filters in the negative feedback circuits, whereas many off-chip capacitance elements have been required to be inserted between each stage of gain control amplifiers in conventional baseband chains.
摘要翻译：在直接转换接收机中，为了消除在基带处理块中产生的DC偏移，包括增益控制放大器和低通滤波器的负反馈装置分别附加到混频器输出之后的基带块的I和Q信号分支。每个负反馈电路中的增益控制放大器被增益调整，使得主增益控制放大器的增益G的乘积G·B和其自身的增益B将恒定，从而DC偏移被消除。该DC偏移消除可以应用于在接收操作期间没有间歇时间的连续接收系统中。位于片外的电容元件可以减少到仅在负反馈电路中的低通滤波器中使用的电容元件，而许多芯片外电容元件需要插入到常规基带中的增益控制放大器的每个级之间链条

34. 发明申请

US20060049878A1 Phase locked loop circuit 有权
标题翻译：锁相环电路
公开(公告)号：US20060049878A1
公开(公告)日：2006-03-09
申请号：US11202266
申请日：2005-08-12
申请人： Manabu Kawabe , Kazuyuki Hori , Satoshi Tanaka , Yukinori Akamine , Masumi Kasahara , Kazuo Watanabe
发明人： Manabu Kawabe , Kazuyuki Hori , Satoshi Tanaka , Yukinori Akamine , Masumi Kasahara , Kazuo Watanabe
IPC分类号： H03L7/00
CPC分类号： H03L7/107 , H03C3/0925 , H03C3/0941 , H03C3/0991 , H03L7/1974 , H03L7/1976
摘要： The present invention provides a PLL circuit containing a loop gain circuit capable of suppressing loop gain variation. This PLL circuit includes a counter that is driven by a voltage controlled oscillator within the PLL circuit, an accumulator (ACL) that accumulates the output of the counter, and a comparison operation circuit block that compares the count value of the ACL and the design value pre-stored in a register, and the loop gain of the PLL circuit is detected taking advantage of the fact that the ACL count value is inversely proportional to the loop gain. Based on the detection result, the loop gain is calibrated by correcting the loop gain with a charge pump current, etc. This allows the PLL circuit to maintain stable loop characteristics that will not affect the characteristics variation of each element constituting the PLL.
摘要翻译：本发明提供一种包含能够抑制环路增益变化的环路增益电路的PLL电路。该PLL电路包括由PLL电路内的压控振荡器驱动的计数器，累加计数器的输出的累加器（ACL），以及将ACL的计数值与设计值进行比较的比较运算电路块预先存储在寄存器中，并且利用ACL计数值与循环增益成反比的事实来检测PLL电路的环路增益。基于检测结果，通过用电荷泵电流等校正环路增益来校准环路增益。这允许PLL电路保持不会影响构成PLL的每个元件的特性变化的稳定环路特性。

35. 发明申请

US20050287964A1 Wireless transmitter circuit and transceiver using the same 有权
标题翻译：无线发射机电路和收发器使用相同
公开(公告)号：US20050287964A1
公开(公告)日：2005-12-29
申请号：US11158094
申请日：2005-06-22
申请人： Satoshi Tanaka , Yukinori Akamine , Manabu Kawabe , Yasuyuki Kimura , Takao Okazaki
发明人： Satoshi Tanaka , Yukinori Akamine , Manabu Kawabe , Yasuyuki Kimura , Takao Okazaki
IPC分类号： H01Q11/12 , H04B1/00 , H04B1/04
CPC分类号： H04B1/006
摘要： This invention provides a wireless transmitter circuit for mobile communication apparatus and this circuit can be configured with fewer components and is suitable for downsizing. A single PLL synthesizer serves as both RF frequency band PLL and IF frequency band PLL among three oscillators for TX, RX and IF frequency bands, which have been required in conventional mobile communication apparatus. The number of necessary oscillators occupying a large area within a chip is reduced and the number of components is decreased. Specifically, circuitry is arranged to generate local oscillation signals for RF and IF frequency bands by frequency dividing the output of a VCO of the RF frequency band PLL.
摘要翻译：本发明提供了一种用于移动通信设备的无线发射机电路，该电路可以配置成较少的组件，并且适合于小型化。在常规移动通信设备中已经需要的TX，RX和IF频段的三个振荡器中，单个PLL合成器用作RF频带PLL和IF频带PLL两者。占用芯片内大面积的必要振荡器的数量减少，并且部件的数量减少。具体地，电路被布置成通过对RF频带PLL的VCO的输出进行分频来产生用于RF和IF频带的本地振荡信号。

36. 发明授权

US07873333B2 Transmitter circuits and apparatus of wireless application 有权
标题翻译：发射机电路和无线应用的设备
公开(公告)号：US07873333B2
公开(公告)日：2011-01-18
申请号：US11755273
申请日：2007-05-30
申请人： Satoshi Tanaka , Yukinori Akamine
发明人： Satoshi Tanaka , Yukinori Akamine
IPC分类号： H01Q11/12 , H04B1/04
CPC分类号： H03G1/0088 , H03G3/004
摘要： In conventional polar-loop transmitter circuits, using two feedback circuits intended to control the amplitude in an open loop and phase of a power output in closed loop, respectively, during transmission, causes current consumption to increase during delivery of a small power output. Therefore, a complex table has to be prepared in order to correct the nonlinearities in the amplitude-to-amplitude characteristic of the power amplifier and the amplitude-to-phase characteristic thereof. In order to reduce the current consumption required for the delivery of a moderate or small power output, a polar-loop transmitter circuit in which two feedback circuits intended to control the amplitude and phase of the power output respectively are active when the power amplifier delivers a large power output exhibiting strong nonlinearity, and when the power amplifier delivers a moderate or small power output, the amplitude of the power output is controlled in the open loop.
摘要翻译：在常规的极性环路发射机电路中，在传输期间，分别使用两个反馈电路来分别控制开环中的幅度和闭环中的功率输出的相位，从而在输出小功率输出期间使电流消耗增加。因此，为了校正功率放大器的幅度 - 幅度特性的非线性及其幅相特性，必须准备复杂的表格。为了降低传递中等或较小功率输出所需的电流消耗，一个极环回路发射器电路，其中分别用于控制功率输出的幅度和相位的两个反馈电路在功率放大器输出大功率输出显示强非线性，当功率放大器输出中等或较小的功率输出时，功率输出的幅度在开环中被控制。

37. 发明申请

US20070281652A1 TRANSMITTER CIRCUITS AND APPARATUS OF WIRELESS APPLICATION 有权
标题翻译：发射机电路及无线应用设备
公开(公告)号：US20070281652A1
公开(公告)日：2007-12-06
申请号：US11755273
申请日：2007-05-30
申请人： Satoshi TANAKA , Yukinori Akamine
发明人： Satoshi TANAKA , Yukinori Akamine
IPC分类号： H04B7/00
CPC分类号： H03G1/0088 , H03G3/004
摘要： In conventional polar-loop transmitter circuits, using two feedback circuits intended to control the amplitude in an open loop and phase of a power output in closed loop, respectively, during transmission, causes current consumption to increase during delivery of a small power output. Therefore, a complex table has to be prepared in order to correct the nonlinearities in the amplitude-to-amplitude characteristic of the power amplifier and the amplitude-to-phase characteristic thereof. In order to reduce the current consumption required for the delivery of a moderate or small power output, a polar-loop transmitter circuit in which two feedback circuits intended to control the amplitude and phase of the power output respectively are active when the power amplifier delivers a large power output exhibiting strong nonlinearity, and when the power amplifier delivers a moderate or small power output, the amplitude of the power output is controlled in the open loop.
摘要翻译：在常规的极性环路发射机电路中，在传输期间，分别使用两个反馈电路来分别控制开环中的幅度和闭环中的功率输出的相位，从而在输出小功率输出期间使电流消耗增加。因此，为了校正功率放大器的幅度 - 幅度特性的非线性及其幅相特性，必须准备复杂的表格。为了降低传递中等或较小功率输出所需的电流消耗，一个极环回路发射器电路，其中分别用于控制功率输出的幅度和相位的两个反馈电路在功率放大器输出大功率输出显示强非线性，当功率放大器输出中等或较小的功率输出时，功率输出的幅度在开环中被控制。

38. 发明申请

US20070190960A1 Direct conversion receiver 有权
标题翻译：直接转换接收机
公开(公告)号：US20070190960A1
公开(公告)日：2007-08-16
申请号：US11725475
申请日：2007-03-20
申请人： Yukinori Akamine , Satoshi Tanaka , Akio Yamamoto , Kazuaki Hori
发明人： Yukinori Akamine , Satoshi Tanaka , Akio Yamamoto , Kazuaki Hori
IPC分类号： H04B1/26
CPC分类号： H04B1/30 , H03G3/3052
摘要： In a direct conversion receiver, to cancel a DC offset generated in the baseband processing block, negative feedback arrangements comprising a gain control amplifier and a low-pass filter are respectively attached to the I and Q signal branches of the baseband block following mixer outputs. The gain control amplifier in each negative feedback circuit is gain adjusted so that the product G·B of the gain G of a primary gain control amplifier and its own gain B will be constant and thereby the DC offset is cancelled. This DC offset cancellation can be applied in a continuous receiving system with no intermittent time during a receiving operation. Capacitance elements located off-chip can be reduced to those to be used only in the low-pass filters in the negative feedback circuits, whereas many off-chip capacitance elements have been required to be inserted between each stage of gain control amplifiers in conventional baseband chains.
摘要翻译：在直接转换接收机中，为了消除在基带处理块中产生的DC偏移，包括增益控制放大器和低通滤波器的负反馈装置分别附加到混频器输出之后的基带块的I和Q信号分支。每个负反馈电路中的增益控制放大器被增益调整，使得主增益控制放大器的增益G的乘积G.B和其自身的增益B将恒定，从而DC偏移被消除。该DC偏移消除可以应用于在接收操作期间没有间歇时间的连续接收系统中。位于片外的电容元件可以减少到仅在负反馈电路中的低通滤波器中使用的电容元件，而许多芯片外电容元件需要插入到常规基带中的增益控制放大器的每个级之间链条

39. 发明申请

US20060189283A1 Carrier leak reduction transmitter circuit 有权
标题翻译：载波泄漏减少发射机电路
公开(公告)号：US20060189283A1
公开(公告)日：2006-08-24
申请号：US11334571
申请日：2006-01-19
申请人： Satoshi Tanaka , Yukinori Akamine
发明人： Satoshi Tanaka , Yukinori Akamine
IPC分类号： H04B1/04 , H01Q11/12
CPC分类号： H04B1/0475
摘要： A transmitter circuit has two mixers that modulate a carrier wave according to an input signal, outputs a signal having information in a phase and an amplitude, detects a DC offset in each of the mixers, and adds a DC voltage that corrects the detected DC offset to the input signal of the mixers. The mixer is a double balanced mixer having two load resistors, and the transmitter circuit has a resistor that is connected between a node of two load resistors and a power supply, a limiter amplifier that amplifies a signal that appears at the node when the potential of the input terminal of the differential input signal of the double balanced mixer is alternately set to a first potential and a second potential, and a control unit that changes the first and second potentials by using a signal that is outputted by the limiter amplifier. The first and second potentials that are converged in a feedback loop formed with the above structure become a potential of the DC voltage that corrects the DC offset.
摘要翻译：发射机电路具有根据输入信号调制载波的两个混频器，输出具有相位和振幅信息的信号，检测每个混频器中的直流偏移量，并加上校正检测到的直流偏移的直流电压到混频器的输入信号。混频器是具有两个负载电阻器的双平衡混频器，并且发射器电路具有连接在两个负载电阻器的节点和电源之间的电阻器，限制器放大器，其放大当节点出现的信号时双平衡混频器的差分输入信号的输入端交替地设置为第一电位和第二电位，以及控制单元，其通过使用由限幅放大器输出的信号来改变第一和第二电位。收敛在由上述结构形成的反馈回路中的第一和第二电位成为修正直流偏移的直流电压的电位。

40. 发明授权

US08055218B2 Wireless transmitter circuit and transceiver using the same 有权
标题翻译：无线发射机电路和收发器使用相同
公开(公告)号：US08055218B2
公开(公告)日：2011-11-08
申请号：US11158094
申请日：2005-06-22
申请人： Satoshi Tanaka , Yukinori Akamine , Manabu Kawabe , Yasuyuki Kimura , Takao Okazaki
发明人： Satoshi Tanaka , Yukinori Akamine , Manabu Kawabe , Yasuyuki Kimura , Takao Okazaki
IPC分类号： H01Q11/12 , H04B1/04
CPC分类号： H04B1/006
摘要： This invention provides a wireless transmitter circuit for mobile communication apparatus and this circuit can be configured with fewer components and is suitable for downsizing. A single PLL synthesizer serves as both RF frequency band PLL and IF frequency band PLL among three oscillators for TX, RX and IF frequency bands, which have been required in conventional mobile communication apparatus. The number of necessary oscillators occupying a large area within a chip is reduced and the number of components is decreased. Specifically, circuitry is arranged to generate local oscillation signals for RF and IF frequency bands by frequency dividing the output of a VCO of the RF frequency band PLL.
摘要翻译：本发明提供了一种用于移动通信设备的无线发射机电路，该电路可以配置成较少的组件，并且适合于小型化。在常规移动通信设备中已经需要的TX，RX和IF频段的三个振荡器中，单个PLL合成器用作RF频带PLL和IF频带PLL两者。占用芯片内大面积的必要振荡器的数量减少，并且部件的数量减少。具体地，电路被布置成通过对RF频带PLL的VCO的输出进行分频来产生用于RF和IF频带的本地振荡信号。

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