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    • 31. 发明申请
    • PLASMA GENERATING APPARATUS
    • 等离子体发生装置
    • US20080218086A1
    • 2008-09-11
    • US12043319
    • 2008-03-06
    • Shigeki Sakai
    • Shigeki Sakai
    • H05H1/00
    • H05H1/46H01J37/32082H01J37/32935
    • A plasma generating apparatus is provided with a plasma generating apparatus for ionizing gas by high frequency discharge within a plasma generating container to thereby generate a plasma and for discharging the plasma to the outside through a plasma discharge hole, an antenna disposed within the plasma generating container for radiating a high frequency wave, an antenna cover made of an insulator and covering a whole of the antenna, a DC voltage measuring device for measuring a DC voltage between the antenna and the plasma generating container, and a comparator for comparing the DC voltage with a reference value, and outputting an alarm signal when an absolute value of the DC voltage value is larger than the absolute value of the reference value.
    • 一种等离子体发生装置具有等离子体产生装置,其用于通过等离子体发生容器内的高频放电使气体离子化,从而产生等离子体,并且通过等离子体放电孔将等离子体排放到外部,设置在等离子体产生容器内的天线 用于辐射高频波,由绝缘体制成并覆盖整个天线的天线罩,用于测量天线和等离子体发生容器之间的直流电压的直流电压测量装置,以及用于将直流电压与 参考值,并且当DC电压值的绝对值大于参考值的绝对值时,输出报警信号。
    • 32. 发明申请
    • Semiconductor nonvolatile storage element and method of fabricating the same
    • 半导体非易失性存储元件及其制造方法
    • US20080001194A1
    • 2008-01-03
    • US11634042
    • 2006-12-05
    • Shigeki SakaiKazuo Sakamaki
    • Shigeki SakaiKazuo Sakamaki
    • H01L27/108
    • H01L29/516H01L21/28291H01L27/11585H01L27/1159H01L29/6684H01L29/78391
    • To provide a semiconductor nonvolatile storage device capable of applying distributed voltage efficiently to a ferroelectric capacitor in a semiconductor nonvolatile storage device having an MFMIS structure without enlarging a memory cell area and a method of fabricating the same, a ferroelectric nonvolatile storage element is constructed by a structure successively laminated with a first insulator layer (3), a first conductor layer (4), a ferroelectric layer (5) and a second conductor layer (6) on a channel region and is constructed by a structure having a third conductor (9) and a fourth conductor (10) respectively laminated on a source region and a drain region, in which the third conductor (9) and the fourth conductor (10) are opposed to each other via the first conductor layer (4) and a second insulator thin film (11).
    • 为了提供能够在没有扩大存储单元区域的情况下,在具有MFMIS结构的半导体非易失性存储器件中的铁电电容器上有效地施加分布电压的半导体非易失性存储器件及其制造方法,铁电非易失性存储元件由 在沟道区域上依次层叠有第一绝缘体层(3),第一导体层(4),铁电体层(5)和第二导体层(6),并且由具有第三导体 )和分别层叠在源极区域和漏极区域上的第四导体(10),其中第三导体(9)和第四导体(10)经由第一导体层(4)彼此相对,第二导体 绝缘体薄膜(11)。
    • 33. 发明授权
    • Semiconductor nonvolatile storage element and method of fabricating the same
    • 半导体非易失性存储元件及其制造方法
    • US06784473B2
    • 2004-08-31
    • US10090851
    • 2002-03-04
    • Shigeki SakaiKazuo Sakamaki
    • Shigeki SakaiKazuo Sakamaki
    • H01L2976
    • H01L29/516H01L21/28291H01L27/11585H01L27/1159H01L29/6684H01L29/78391
    • To provide a semiconductor nonvolatile storage device capable of applying distributed voltage efficiently to a ferroelectric capacitor in a semiconductor nonvolatile storage device having an MFMIS structure without enlarging a memory cell area and a method of fabricating the same, a ferroelectric nonvolatile storage element is constructed by a structure successively laminated with a first insulator layer (3), a first conductor layer (4), a ferroelectric layer (5) and a second conductor layer (6) on a channel region and is constructed by a structure having a third conductor (9) and a fourth conductor (10) respectively laminated on a source region and a drain region, in which the third conductor (9) and the fourth conductor (10) are opposed to each other via the first conductor layer (4) and a second insulator thin film (11).
    • 为了提供能够在没有扩大存储单元区域的情况下,在具有MFMIS结构的半导体非易失性存储器件中的铁电电容器上有效地施加分布电压的半导体非易失性存储器件及其制造方法,铁电非易失性存储元件由 在沟道区域上依次层叠有第一绝缘体层(3),第一导体层(4),铁电体层(5)和第二导体层(6),并且由具有第三导体 )和分别层叠在源极区域和漏极区域上的第四导体(10),其中第三导体(9)和第四导体(10)经由第一导体层(4)彼此相对,第二导体 绝缘体薄膜(11)。
    • 34. 发明授权
    • Crystal growth method for thin films of BiSrCaCuO oxides
    • BiSrCaCuO氧化物薄膜的晶体生长方法
    • US06183552B2
    • 2001-02-06
    • US09263824
    • 1999-03-08
    • Shigeki SakaiShinji Migita
    • Shigeki SakaiShinji Migita
    • C30B2922
    • C30B23/02C30B25/02C30B29/22C30B29/225H01L39/2451
    • A crystal growth method for thin films of oxides wherein a vapor-phase deposition method is used to grow crystals for Bi2Sr2CanCun+1O6+2n oxide thin film 304, where n is an integer equal to 1 or greater, includes a first step of growing a Bi2Sr2CuO6 oxide thin film 302 to an arbitrary number of molecular layers by setting a growth environment to conditions in which oxides of bismuth alone are not formed, but intended multi-element oxide is formed, and supplying the growth environment with an excess of bismuth compared with other elements, thereby preventing deficiency of bismuth and also evaporating excess bismuth from the thin film, a second step of causing a layer 303 containing calcium atoms and copper atoms each in the amount of n/2 of the number of strontium atoms contained in the Bi2Sr2CuO6 oxide thin film to accumulate upon the Bi2Sr2CuO6 oxide thin film, and a third step of, in a state in which environmental temperature is set higher than the environmental temperature in the first step, causing the Bi2Sr2CuO6 oxide thin film 302 and the accumulated calcium atoms and copper 303 atoms to react to grow crystals for a thin film 304 of an oxide Bi2Sr2CanCun+1O6+2n, where n is an integer equal to 1 or greater.
    • 使用气相沉积法生长Bi2Sr2CanCun + 1O6 + 2n氧化物薄膜304(其中n为等于1或更大的整数)的晶体的晶体生长方法包括:生长第一步骤 Bi2Sr2CuO6氧化物薄膜302通过将生长环境设定为不形成单独的铋氧化物的条件而形成任意数量的分子层,并且形成预期的多元素氧化物,并且向生长环境提供过量的铋,与 其它元素,从而防止铋的缺乏并且还从薄膜中蒸发过量的铋;第二步是使含有Ca 2原子和铜原子的层303分别以Bi2Sr2CuO6中所含的锶原子数量的n / 2的量 氧化物薄膜积累在Bi2Sr2CuO6氧化物薄膜上,第三步,在环境温度设定为高于fi的环境温度的状态下 第一步骤,使Bi2Sr2CuO6氧化物薄膜302和累积的钙原子和铜303原子反应生长用于氧化物Bi2Sr2CanCun + 1O6 + 2n的薄膜304的晶体,其中n是等于1或更大的整数。
    • 36. 发明授权
    • Semiconductor integrated circuit
    • 半导体集成电路
    • US08081499B2
    • 2011-12-20
    • US11912184
    • 2006-04-13
    • Mitsue TakahashiShigeki Sakai
    • Mitsue TakahashiShigeki Sakai
    • G11C11/22G11C11/24
    • G11C11/22G11C11/223H01L21/28291H01L27/105H01L27/1159H01L27/11592
    • A field-effect transistor for nonvolatile memory holding use and a field-effect transistor for logical operation use are manufactured in the same structure on the same semiconductor substrate without separately providing manufacturing processes for the field-effect transistors for the two uses. Both a memory circuit and a logic circuit of a semiconductor integrated circuit are composed of n-channel and p-channel field-effect transistors including a memory holding material in a gate insulating structure. A logical operation state, a memory writing state and a nonvolatile memory holding state are electrically switched by controlling the level and application timing of a voltage to be applied between a gate conductor and a substrate region of the n-channel and p-channel field-effect transistors including the memory holding material in the gate insulating structure.
    • 在相同的半导体衬底上制造用于非易失性存储器保持用的场效应晶体管和用于逻辑运算使用的场效应晶体管,而不需要为这两种用途的场效应晶体管分别提供制造工艺。 存储电路和半导体集成电路的逻辑电路都由包括栅极绝缘结构中的存储器保持材料的n沟道场效应晶体管和p沟道场效应晶体管构成。 通过控制在n沟道和p沟道场效应晶体管的栅极导体和衬底区域之间施加的电压的电平和施加定时来电逻辑运行状态,存储器写入状态和非易失性存储器保持状态, 包括存储器保持材料在栅极绝缘结构中的效应晶体管。
    • 37. 发明申请
    • SEMICONDUCTOR INTEGRATED CIRCUIT
    • 半导体集成电路
    • US20110038201A1
    • 2011-02-17
    • US12513750
    • 2007-10-29
    • Mitsue TakahashiShigeki Sakai
    • Mitsue TakahashiShigeki Sakai
    • G11C11/4197G11C11/40
    • H03K19/0185G11C11/22G11C11/223G11C14/00H01L21/28291H01L27/105H01L27/11585H01L27/1159H01L27/11592H01L29/78391
    • There is provided a semiconductor integrated circuit including a state detection enhancement circuit which includes an input terminal and an output terminal and has a function of generating an electric potential of a magnitude capable of performing nonvolatile memory writing into a nonvolatile memory circuit based on an electric potential input to the input terminal and outputting the electric potential of the magnitude to the output terminal, and the nonvolatile memory circuit has a nonvolatile memory function and an input terminal of the nonvolatile memory circuit is connected to the output of the state detection enhancement circuit. The state detection enhancement circuit is a positive or negative logical state detection enhancement circuit which includes a control signal terminal and a switch circuit which is turned on or off by a control signal applied to the control signal terminal, and has a function of either applying an output potential of the same logical state as or an inverse logical state of an input potential applied to the input terminal to the output terminal or completely breaking off a correlation between the input potential and the output potential when the switch circuit is in an OFF state, and has a function of applying an output potential which has the same logical state as or an inverse logical state of the input potential and has a larger highest-lowest potential range including a possible highest-lowest potential range of the input potential to the output terminal when the switch is in an ON state.
    • 提供了一种包括状态检测增强电路的半导体集成电路,其包括输入端子和输出端子,并且具有基于电位产生能够进行非易失性存储器写入非易失性存储器电路的幅度的电位的功能 输入到输入端子并将大小的电位输出到输出端子,非易失性存储器电路具有非易失性存储功能,并且非易失性存储器电路的输入端子连接到状态检测增强电路的输出端。 状态检测增强电路是正或负逻辑状态检测增强电路,其包括控制信号端子和通过施加到控制信号端子的控制信号而导通或截止的开关电路,并且具有应用 与输入端子施加到输出端子的输入电位相同的逻辑状态的输出电位或反逻辑状态,或者当开关电路处于OFF状态时完全中断输入电位与输出电位之间的相关性, 并且具有施加与输入电位具有相同逻辑状态或相反逻辑状态的输出电位的功能,并且具有包括输入电位的可能最高最低电位范围的较大最高 - 最低电位范围到输出端 当开关处于ON状态时。
    • 38. 发明申请
    • Semiconductor-ferroelectric storage device and its manufacturing method
    • 半导体 - 铁电存储器件及其制造方法
    • US20060017120A1
    • 2006-01-26
    • US10525045
    • 2003-08-19
    • Shigeki Sakai
    • Shigeki Sakai
    • H01L29/78H01L21/336
    • H01L21/02181C23C16/40H01L21/02178H01L21/02194H01L21/28291H01L21/31604H01L21/31616H01L21/31683H01L29/516H01L29/78391
    • The MFIS transistors heretofore have a problem that after data writing, the data disappear in terms of memory transistor operation in about one day at most. This is mainly because the buffer layer and the ferroelectric have a high leakage current and, hence, charge is accumulated around the interface between the ferroelectric and the buffer layer so as to shield the electric polarization memorized by the ferroelectric, making it impossible for the electric polarization of the ferroelectric to control electrical conduction between the source and the drain in the transistor. In the present invention, by constituting an insulator buffer layer 2 of HfO2+u or Hf1−xAl2xO2+x+y, the leakage current flowing through each of the insulator buffer layer 2 and a ferroelectric 3 can be reduced and a memory transistor having a truly sufficient long data holding time is realized.
    • 迄今为止,MFIS晶体管存在数据写入之后,在大约一天内存储晶体管操作的数据消失。 这主要是因为缓冲层和铁电体具有高的漏电流,因此电荷积聚在铁电体和缓冲层之间的界面周围,以屏蔽由铁电体存储的电极化,使得电气 铁电体的极化以控制晶体管中的源极和漏极之间的导电。 在本发明中,通过构成HfO 2 + u或Hf 1-x Al 2 O 2 O 2的绝缘体缓冲层2 + x + y ,可以减少流过绝缘体缓冲层2和铁电体3中的每一个的漏电流,并且实现具有真正足够长的数据保持时间的存储晶体管。
    • 39. 发明授权
    • Ion production device for ion beam irradiation apparatus
    • 离子束照射装置的离子生产装置
    • US06686599B2
    • 2004-02-03
    • US09996926
    • 2001-11-30
    • Nariaki HamamotoShigeki Sakai
    • Nariaki HamamotoShigeki Sakai
    • H01J3730
    • H01J37/3171H01J2237/0041
    • An ion beam irradiation apparatus is provided with a plasma production device 30 which produces a plasma 12 through the radio frequency discharge and supplies the produced plasma in the vicinity of the substrate 4. The plasma production device 30 includes a plasma producing chamber 32 being elongated along an axis 33 extending in scanning directions X in which the ion beam is moved; a plasma emission hole 34 being provided in a side thereof and elongated along the axis 33 of the plasma producing chamber; and a magnet 36 provided outside the plasma producing chamber 32 for producing a magnetic field having a direction along the axis 33. The magnetic field developed by the magnet 36 contains a magnetic field which has a direction along the axis and bends to the substrate ions contained in the plasma 12 emitted from a plasma emission hole 34.
    • 离子束照射装置设置有等离子体生成装置30,其通过射频放电产生等离子体12,并将所产生的等离子体供给到基板4附近。等离子体生成装置30包括沿着 在离子束移动的扫描方向X上延伸的轴33; 等离子体发射孔34设置在其侧面并沿着等离子体产生室的轴线33延伸; 以及设置在等离子体产生室32外部的磁体36,用于产生具有沿着轴线33的方向的磁场。由磁体36产生的磁场包含具有沿着轴线的方向并弯曲到包含的基板离子的磁场 在从等离子体发射孔34发射的等离子体12中。