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    • 33. 发明专利
    • SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURE THEREOF
    • JPH01183136A
    • 1989-07-20
    • JP813288
    • 1988-01-18
    • HITACHI LTDHITACHI VLSI ENG
    • SAIE YASUHIKO
    • H01L21/28H01L21/3205H01L21/336H01L29/78
    • PURPOSE:To prevent disconnection of a conductive layer of a secondary layer and to improve electric reliability of a semiconductor integrated circuit device by providing an intermediate conductive layer in a recess between a main surface of a semiconductor substrate and a conductive layer of the secondary layer within a region specified by a conductive layer of a primary layer isolated each other and by providing a buried member in the recess in a region excepting the above. CONSTITUTION:In a semiconductor integrated circuit device, an intermediate conductive layer 11A which is electrically isolated from a gate electrode 5 in a recess formed in a step shape of the gate electrode 5 between a wiring 14 and a semiconductor region 9 within a region specified by the gate electrode 5, and a buried member 11B is provided in a recess formed in a step shape of the gate electrode 5 in a region whereon the intermediate conductive layer 11A is not provided. The step shape formed by the gate electrode 5 is moderated by the intermediate conductive layer 11A and the buried member 11B. In this way, the foundation shape of the wiring 14 (the surface of an interlayer insulation film 12) is flattened thus preventing disconnection of the wiring 14 and improving electric reliability of a semiconductor integrated circuit device.