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31. 发明授权

US07615434B2 CMOS device and fabricating method thereof 有权
标题翻译： CMOS器件及其制造方法
公开(公告)号：US07615434B2
公开(公告)日：2009-11-10
申请号：US11389617
申请日：2006-03-24
申请人： Shih-Wei Sun , Shih-Fang Tzou , Jiunn-Hsiung Liao , Pei-Yu Chou
发明人： Shih-Wei Sun , Shih-Fang Tzou , Jiunn-Hsiung Liao , Pei-Yu Chou
IPC分类号： H01L21/8238
CPC分类号： H01L21/823864 , H01L21/823807 , H01L29/7843
摘要： A CMOS device is provided, comprising a substrate, a first-type MOS transistor, a second-type MOS transistor, a first stress layer, a first liner layer, and a second stress layer. The substrate has a first active area and a second active area, which are separated by an isolation structure. Further, the first-type MOS transistor is disposed on the first active area of the substrate, and the second-type MOS transistor is disposed on the second active area of the substrate. The first stress layer is compliantly disposed on the first-type MOS transistor of the first active area. The first liner layer is compliantly disposed on the first stress layer. The second stress layer is compliantly disposed on the second-type MOS transistor of the second active area.
摘要翻译：提供一种CMOS器件，包括衬底，第一类型MOS晶体管，第二类型MOS晶体管，第一应力层，第一衬里层和第二应力层。衬底具有由隔离结构隔开的第一有源区和第二有源区。此外，第一型MOS晶体管设置在衬底的第一有源区上，并且第二型MOS晶体管设置在衬底的第二有源区上。第一应力层顺应地设置在第一有源区的第一型MOS晶体管上。第一衬里层顺应地设置在第一应力层上。第二应力层顺从地设置在第二有源区的第二型MOS晶体管上。

32. 发明申请

US20080064203A1 METHOD FOR FABRICATING A CONTACT HOLE 有权
标题翻译：制作接触孔的方法
公开(公告)号：US20080064203A1
公开(公告)日：2008-03-13
申请号：US11530886
申请日：2006-09-11
申请人： Pei-Yu Chou , Wen-Chou Tsai , Jiunn-Hsiung Liao
发明人： Pei-Yu Chou , Wen-Chou Tsai , Jiunn-Hsiung Liao
IPC分类号： H01L21/467
CPC分类号： H01L21/76802 , H01L21/0271 , H01L21/0338 , H01L21/31138 , H01L21/31144
摘要： A method for fabricating a contact hole is provided. A semiconductor substrate having thereon a conductive region is prepared. A dielectric layer is deposited on the semiconductor substrate and the conductive region. An etching resistive layer is coated on the dielectric layer. A silicon-containing hard mask bottom anti-reflection coating (SHB) layer is then coated on the etching resistive layer. A photoresist layer is then coated on the SHB layer. A lithographic process is performed to form a first opening in the photoresist layer. Using the photoresist layer as a hard mask, the SHB layer is etched through the first opening, thereby forming a shrunk, tapered second opening in the SHB layer. Using the etching resistive layer as an etching hard mask, etching the dielectric layer through the second opening to form a contact hole in the dielectric layer.
摘要翻译：提供一种制造接触孔的方法。制备其上具有导电区域的半导体衬底。介电层沉积在半导体衬底和导电区域上。在电介质层上涂覆有蚀刻电阻层。然后将含硅硬掩模底部防反射涂层（SHB）层涂覆在蚀刻电阻层上。然后将光致抗蚀剂层涂覆在SHB层上。执行光刻工艺以在光致抗蚀剂层中形成第一开口。使用光致抗蚀剂层作为硬掩模，通过第一开口蚀刻SHB层，从而在SHB层中形成收缩的锥形第二开口。使用蚀刻电阻层作为蚀刻硬掩模，通过第二开口蚀刻电介质层，以在电介质层中形成接触孔。

33. 发明授权

US08310012B2 Semiconductor device having metal gate and manufacturing method thereof 有权
标题翻译：具有金属栅极的半导体器件及其制造方法
公开(公告)号：US08310012B2
公开(公告)日：2012-11-13
申请号：US12759670
申请日：2010-04-13
申请人： Guang-Yaw Hwang , Yu-Ru Yang , Jiunn-Hsiung Liao , Pei-Yu Chou
发明人： Guang-Yaw Hwang , Yu-Ru Yang , Jiunn-Hsiung Liao , Pei-Yu Chou
IPC分类号： H01L29/78 , H01L21/3205
CPC分类号： H01L21/823842 , H01L21/82385 , H01L29/42372 , H01L29/4966 , H01L29/66545 , H01L29/66583 , H01L29/6659 , H01L29/7833
摘要： A semiconductor device includes a semiconductor substrate, a gate dielectric layer formed on the semiconductor substrate, and at least a first conductive-type metal gate formed on the gate dielectric layer. The first conductive-type metal gate includes a filling metal layer and a U-type metal layer formed between the filling metal layer and the gate dielectric layer. A topmost portion of the U-type metal layer is lower than the filling metal layer.
摘要翻译：半导体器件包括半导体衬底，形成在半导体衬底上的栅极电介质层和形成在栅极介电层上的至少第一导电型金属栅极。第一导电型金属栅极包括在填充金属层和栅极介电层之间形成的填充金属层和U型金属层。 U型金属层的最上部比填充金属层低。

34. 发明授权

US08168374B2 Method of forming a contact hole 有权
标题翻译：形成接触孔的方法
公开(公告)号：US08168374B2
公开(公告)日：2012-05-01
申请号：US12854913
申请日：2010-08-12
申请人： Pei-Yu Chou , Jiunn-Hsiung Liao
发明人： Pei-Yu Chou , Jiunn-Hsiung Liao
IPC分类号： G03F7/26
CPC分类号： H01L21/31144 , H01L21/0337 , H01L21/0338
摘要： A method of forming a contact hole is provided. A pattern is formed in a photo resist layer. The pattern is exchanged into a silicon photo resist layer to form a first opening. Another pattern is formed in another photo resist layer. The pattern is exchanged into a silicon photo resist layer to form a second opening. The pattern having the first, and second openings is exchanged into the interlayer dielectric layer, and etching stop layer to form the contact hole. The present invention has twice exposure processes and twice etching processes to form the contact hole having small distance.
摘要翻译：提供一种形成接触孔的方法。在光致抗蚀剂层中形成图案。将图案交换成硅光致抗蚀剂层以形成第一开口。在另一光致抗蚀剂层中形成另一图案。将图案交换为硅光致抗蚀剂层以形成第二开口。将具有第一和第二开口的图案交换到层间电介质层和蚀刻停止层以形成接触孔。本发明具有两次曝光工艺和两次蚀刻工艺以形成具有小距离的接触孔。

35. 发明授权

US07829472B2 Method of forming at least an opening using a tri-layer structure 有权
标题翻译：使用三层结构形成至少一个开口的方法
公开(公告)号：US07829472B2
公开(公告)日：2010-11-09
申请号：US12099788
申请日：2008-04-09
申请人： Wei-Hang Huang , Kai-Siang Neo , Pei-Yu Chou , Jiunn-Hsiung Liao
发明人： Wei-Hang Huang , Kai-Siang Neo , Pei-Yu Chou , Jiunn-Hsiung Liao
IPC分类号： H01L21/214
CPC分类号： H01L21/31138 , H01L21/3081 , H01L21/31116
摘要： A method of forming openings is disclosed. A substrate is first provided, and the tri-layer structure is formed on the substrate. The tri-layer structure includes a bottom photoresist layer, a silicon-containing layer and a top photoresist layer form bottom to top. Subsequently, the top photoresist layer is patterned, and the silicon-containing layer is etched by utilizing the top photoresist layer as an etching mask to partially expose the bottom photoresist layer. Next, the partially exposed bottom photoresist layer is etched through two etching steps in turn by utilizing the patterned silicon-containing layer as an etching mask. The first etching step includes an oxygen gas and at least one non-carbon-containing halogen-containing gas, while the second etching step includes at least one halogen-containing gas. The substrate is thereafter etched by utilizing the patterned bottom photoresist layer as an etching mask to form at least an opening in the substrate.
摘要翻译：公开了一种形成开口的方法。首先提供衬底，并且在衬底上形成三层结构。三层结构包括底部光致抗蚀剂层，含硅层和从顶部到顶部形成的顶部光致抗蚀剂层。随后，对顶部光致抗蚀剂层进行图案化，并且通过利用顶部光致抗蚀剂层作为蚀刻掩模来蚀刻含硅层以部分地曝光底部光致抗蚀剂层。接下来，通过利用图案化的含硅层作为蚀刻掩模，依次通过两个蚀刻步骤蚀刻部分曝光的底部光致抗蚀剂层。第一蚀刻步骤包括氧气和至少一种含有非含卤素的气体，而第二蚀刻步骤包括至少一种含卤素的气体。然后通过利用图案化的底部光致抗蚀剂层作为蚀刻掩模来蚀刻衬底，以在衬底中形成至少一个开口。

36. 发明申请

US20090258499A1 METHOD OF FORMING AT LEAST AN OPENING USING A TRI-LAYER STRUCTURE 有权
标题翻译：使用三层结构形成至少打开的方法
公开(公告)号：US20090258499A1
公开(公告)日：2009-10-15
申请号：US12099788
申请日：2008-04-09
申请人： Wei-Hang Huang , Kai-Siang Neo , Pei-Yu Chou , Jiunn-Hsiung Liao
发明人： Wei-Hang Huang , Kai-Siang Neo , Pei-Yu Chou , Jiunn-Hsiung Liao
IPC分类号： H01L21/311
CPC分类号： H01L21/31138 , H01L21/3081 , H01L21/31116
摘要： A method of forming openings is disclosed. A substrate is first provided, and the tri-layer structure is formed on the substrate. The tri-layer structure includes a bottom photoresist layer, a silicon-containing layer and a top photoresist layer form bottom to top. Subsequently, the top photoresist layer is patterned, and the silicon-containing layer is etched by utilizing the top photoresist layer as an etching mask to partially expose the bottom photoresist layer. Next, the partially exposed bottom photoresist layer is etched through two etching steps in turn by utilizing the patterned silicon-containing layer as an etching mask. The first etching step includes an oxygen gas and at least one non-carbon-containing halogen-containing gas, while the second etching step includes at least one halogen-containing gas. The substrate is thereafter etched by utilizing the patterned bottom photoresist layer as an etching mask to form at least an opening in the substrate.
摘要翻译：公开了一种形成开口的方法。首先提供衬底，并且在衬底上形成三层结构。三层结构包括底部光致抗蚀剂层，含硅层和从顶部到顶部形成的顶部光致抗蚀剂层。随后，对顶部光致抗蚀剂层进行图案化，并且通过利用顶部光致抗蚀剂层作为蚀刻掩模来蚀刻含硅层以部分地曝光底部光致抗蚀剂层。接下来，通过利用图案化的含硅层作为蚀刻掩模，依次通过两个蚀刻步骤蚀刻部分曝光的底部光致抗蚀剂层。第一蚀刻步骤包括氧气和至少一种含有非含卤素的气体，而第二蚀刻步骤包括至少一种含卤素的气体。然后通过利用图案化的底部光致抗蚀剂层作为蚀刻掩模来蚀刻衬底，以在衬底中形成至少一个开口。

37. 发明申请

US20080191287A1 METHOD FOR FABRICATING STRAINED-SILICON CMOS TRANSISTOR 有权
标题翻译：制备应变硅CMOS晶体管的方法
公开(公告)号：US20080191287A1
公开(公告)日：2008-08-14
申请号：US11674660
申请日：2007-02-13
申请人： Pei-Yu Chou , Shih-Fang Tzou , Jiunn-Hsiung Liao
发明人： Pei-Yu Chou , Shih-Fang Tzou , Jiunn-Hsiung Liao
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823807 , H01L29/7843
摘要： First, a semiconductor substrate having a first active region and a second active region is provided. The first active region includes a first transistor and the second active region includes a second transistor. A first etching stop layer, a stress layer, and a second etching stop layer are disposed on the first transistor, the second transistor and the isolation structure. A first etching process is performed by using a patterned photoresist disposed on the first active region as a mask to remove the second etching stop layer and a portion of the stress layer from the second active region. The patterned photoresist is removed, and a second etching process is performed by using the second etching stop layer of the first active region as a mask to remove the remaining stress layer and a portion of the first etching stop layer from the second active region.
摘要翻译：首先，提供具有第一有源区和第二有源区的半导体基板。第一有源区包括第一晶体管，第二有源区包括第二晶体管。第一蚀刻停止层，应力层和第二蚀刻停止层设置在第一晶体管，第二晶体管和隔离结构上。通过使用设置在第一有源区上的图案化光致抗蚀剂作为掩模来执行第一蚀刻工艺，以从第二有源区移除第二蚀刻停止层和应力层的一部分。去除图案化的光致抗蚀剂，并且通过使用第一有源区的第二蚀刻停止层作为掩模来执行第二蚀刻工艺，以从第二有源区去除剩余的应力层和第一蚀刻停止层的一部分。

38. 发明申请

US20080176401A1 METHOD FOR FORMING CONTACT HOLE 审中-公开
标题翻译：形成接触孔的方法
公开(公告)号：US20080176401A1
公开(公告)日：2008-07-24
申请号：US11626004
申请日：2007-01-23
申请人： Pei-Yu Chou , Jiunn-Hsiung Liao
发明人： Pei-Yu Chou , Jiunn-Hsiung Liao
IPC分类号： H01L21/3065
CPC分类号： H01L21/02063 , H01L21/76814
摘要： A method for forming a contact hole. The method comprises steps of performing a substrate having at least a dielectric layer formed thereon and then forming a patterned mask layer on the dielectric layer, wherein the patterned mask layer exposes a portion of the dielectric layer. The dielectric layer is patterned to form a contact hole by using the patterned mask layer as a mask, wherein an aspect ratio of the contact hole is larger than 4. The patterned mask layer is removed and a wet cleaning process is performed. A plasma treatment is performed on the substrate in a first tool system, wherein a gas source for the plasma treatment is a hydrogen-nitrogen-containing gas. A vacuum system of the first tool system is broken and then the substrate is transferred into a second tool system. An argon plasma treatment is performed on the substrate in the second tool system.
摘要翻译：一种形成接触孔的方法。该方法包括以下步骤：执行至少在其上形成介电层的衬底，然后在电介质层上形成图案化掩模层，其中图案化掩模层露出电介质层的一部分。图案化电介质层以通过使用图案化掩模层作为掩模形成接触孔，其中接触孔的纵横比大于4.除去图案化掩模层并进行湿式清洗处理。在第一工具系统中的基板上进行等离子体处理，其中用于等离子体处理的气体源是含氢气体。第一工具系统的真空系统被破坏，然后将衬底转移到第二工具系统中。在第二工具系统中的基板上进行氩等离子体处理。

39. 发明申请

US20080150041A1 Method of removing a spacer, method of manufacturing a metal-oxide-semiconductor transistor device, and metal-oxide-semiconductor transistor device 审中-公开
公开(公告)号：US20080150041A1
公开(公告)日：2008-06-26
申请号：US12042345
申请日：2008-03-05
申请人： Pei-Yu Chou , Shih-Fang Tzou , Jiunn-Hsiung Liao
发明人： Pei-Yu Chou , Shih-Fang Tzou , Jiunn-Hsiung Liao
IPC分类号： H01L29/78
CPC分类号： H01L29/6659 , H01L29/665 , H01L29/6653 , H01L29/7833 , H01L29/7843
摘要： A method of removing a spacer, a method of manufacturing a metal-oxide-semiconductor transistor device, and a metal-oxide-semiconductor transistor device, in which, before the spacer is removed, a protective layer is deposited on a spacer and on a material layer (such as a salicide layer) formed on the source/drain region and a gate electrode, such that the thickness of the protective layer on the spacer is smaller than the thickness on the material layer, and thereafter, the protective layer is partially removed such that the thickness of the protective layer on the spacer is approximately zero and a portion of the protective layer is remained on the material layer. Accordingly, when the spacer is removed, the material layer may be protected by the protective layer.

40. 发明申请

US20080090422A1 ETCHING METHOD 审中-公开
标题翻译：蚀刻方法
公开(公告)号：US20080090422A1
公开(公告)日：2008-04-17
申请号：US11954214
申请日：2007-12-12
申请人： Pei-Yu Chou , Jiunn-Hsiung Liao
发明人： Pei-Yu Chou , Jiunn-Hsiung Liao
IPC分类号： H01L21/311
CPC分类号： H01L21/76816 , H01L21/31116 , H01L21/31144 , H01L21/32135 , H01L21/76834
摘要： An etching method is described, including a first etching step that uses a first etching gas including a first fluorinated hydrocarbon compound, and a second etching step that uses a second etching gas including a second fluorinated hydrocarbon compound. The hydrogen content in the first fluorinated hydrocarbon compound is lower than that in the second fluorinated hydrocarbon compound, such that the after-etching-inspection (AEI) critical dimension is smaller than the after-development-inspection (ADI) critical dimension.
摘要翻译：描述了一种蚀刻方法，包括使用包括第一氟化烃化合物的第一蚀刻气体的第一蚀刻步骤和使用包括第二氟化烃化合物的第二蚀刻气体的第二蚀刻步骤。第一氟化烃化合物中的氢含量低于第二氟化烃化合物中的氢含量，使得蚀刻后检验（AEI）临界尺寸小于显影后检验（ADI）临界尺寸。

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