专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明申请

US20090006873A1 POWER THROTTLING OF COLLECTIONS OF COMPUTING ELEMENTS 失效
标题翻译：计算元素收集的功率曲线
公开(公告)号：US20090006873A1
公开(公告)日：2009-01-01
申请号：US11768752
申请日：2007-06-26
申请人： Ralph E. Bellofatto , Paul W. Coteus , Paul G. Crumley , Alan G. Gara , Mark E. Giampapa , Thomas M. Gooding , Rudolf Haring , Mark G. Megerian , Martin Ohmacht , Don D. Reed , Richard A. Swetz , Todd Takken
发明人： Ralph E. Bellofatto , Paul W. Coteus , Paul G. Crumley , Alan G. Gara , Mark E. Giampapa , Thomas M. Gooding , Rudolf Haring , Mark G. Megerian , Martin Ohmacht , Don D. Reed , Richard A. Swetz , Todd Takken
IPC分类号： G06F1/26
CPC分类号： G06F1/3203 , G06F1/206
摘要： An apparatus and method for controlling power usage in a computer includes a plurality of computers communicating with a local control device, and a power source supplying power to the local control device and the computer. A plurality of sensors communicate with the computer for ascertaining power usage of the computer, and a system control device communicates with the computer for controlling power usage of the computer.
摘要翻译：用于控制计算机中的电力使用的装置和方法包括与本地控制装置通信的多个计算机，以及向本地控制装置和计算机供电的电源。多个传感器与计算机通信以确定计算机的功率使用，并且系统控制装置与计算机通信以控制计算机的电力使用。

32. 发明授权

US08799694B2 Adaptive recovery for parallel reactive power throttling 有权
标题翻译：并联无功功率调节的自适应恢复
公开(公告)号：US08799694B2
公开(公告)日：2014-08-05
申请号：US13327100
申请日：2011-12-15
申请人： Thomas M. Gooding , Brant L. Knudson , Cory Lappi , Ruth J. Poole , Andrew T. Tauferner
发明人： Thomas M. Gooding , Brant L. Knudson , Cory Lappi , Ruth J. Poole , Andrew T. Tauferner
IPC分类号： G06F1/32
CPC分类号： G06F1/3234 , G06F1/206 , Y02D10/16
摘要： Power throttling may be used to conserve power and reduce heat in a parallel computing environment. Compute nodes in the parallel computing environment may be organized into groups based on, for example, whether they execute tasks of the same job or receive power from the same converter. Once one of compute nodes in the group detects that a parameter (i.e., temperature, current, power consumption, etc.) has exceeded a first threshold, power throttling on all the nodes in the group may be activated. However, before deactivating power throttling, a plurality of parameters associated with the group of compute nodes may be monitored to ensure they are all below a second threshold. If so, the power throttling for all of the compute nodes is deactivated.
摘要翻译：功率节流可用于节约电力并减少并行计算环境中的热量。并行计算环境中的计算节点可以基于例如它们是否执行相同作业的任务或从相同的转换器接收功率而被组织成组。一旦组中的一个计算节点检测到参数（即，温度，电流，功耗等）已经超过第一阈值，则可以激活组中所有节点上的功率节流。然而，在停用功率节流之前，可以监视与该组计算节点相关联的多个参数，以确保它们都在低于第二阈值。如果是这样，则停用所有计算节点的功率节流。

33. 发明申请

US20130263138A1 Collectively Loading An Application In A Parallel Computer 有权
标题翻译：在并行计算机中集成加载应用程序
公开(公告)号：US20130263138A1
公开(公告)日：2013-10-03
申请号：US13431248
申请日：2012-03-27
申请人： Michael E. Aho , John E. Attinella , Thomas M. Gooding , Samuel J. Miller , Michael B. Mundy
发明人： Michael E. Aho , John E. Attinella , Thomas M. Gooding , Samuel J. Miller , Michael B. Mundy
IPC分类号： G06F9/46
CPC分类号： G06F9/5072 , G06F2209/549
摘要： Collectively loading an application in a parallel computer, the parallel computer comprising a plurality of compute nodes, including: identifying, by a parallel computer control system, a subset of compute nodes in the parallel computer to execute a job; selecting, by the parallel computer control system, one of the subset of compute nodes in the parallel computer as a job leader compute node; retrieving, by the job leader compute node from computer memory, an application for executing the job; and broadcasting, by the job leader to the subset of compute nodes in the parallel computer, the application for executing the job.
摘要翻译：在并行计算机中集体加载应用程序，并行计算机包括多个计算节点，包括：通过并行计算机控制系统识别并行计算机中的计算节点的子集以执行作业; 由并行计算机控制系统选择并行计算机中的计算节点子集之一作为工作领导计算节点; 由作业领导计算节点从计算机存储器检索用于执行作业的应用程序; 并且由作业领导者将并行计算机中的计算节点的子集广播为执行作业的应用程序。

34. 发明授权

US08516444B2 Debugging a high performance computing program 有权
标题翻译：调试高性能计算程序
公开(公告)号：US08516444B2
公开(公告)日：2013-08-20
申请号：US11360346
申请日：2006-02-23
申请人： Thomas M. Gooding
发明人： Thomas M. Gooding
IPC分类号： G06F9/44
CPC分类号： G06F11/3636 , G06F11/3664
摘要： Methods, apparatus, and computer program products are disclosed for debugging a high performance computing program by gathering lists of addresses of calling instructions for a plurality of threads of execution of the program, assigning the threads to groups in dependence upon the addresses, and displaying the groups to identify defective threads.
摘要翻译：公开了用于调试高性能计算程序的方法，装置和计算机程序产品，其通过收集程序执行的多个线程的调用指令的地址列表，根据地址将线程分配给组，并且显示组识别有缺陷的线程。

35. 发明授权

US08490113B2 Messaging in a parallel computer using remote direct memory access (‘RDMA’) 失效
公开(公告)号：US08490113B2
公开(公告)日：2013-07-16
申请号：US13167911
申请日：2011-06-24
申请人： Michael E. Aho , Thomas M. Gooding , Michael B. Mundy , Andrew T. Tauferner
发明人： Michael E. Aho , Thomas M. Gooding , Michael B. Mundy , Andrew T. Tauferner
IPC分类号： G06F13/00
CPC分类号： G06F15/167 , G06F15/17331
摘要： Messaging in a parallel computer using remote direct memory access (‘RDMA’), including: receiving a send work request; responsive to the send work request: translating a local virtual address on the first node from which data is to be transferred to a physical address on the first node from which data is to be transferred from; creating a local RDMA object that includes a counter set to the size of a messaging acknowledgment field; sending, from a messaging unit in the first node to a messaging unit in a second node, a message that includes a RDMA read operation request, the physical address of the local RDMA object, and the physical address on the first node from which data is to be transferred from; and receiving, by the first node responsive to the second node's execution of the RDMA read operation request, acknowledgment data in the local RDMA object.

36. 发明申请

US20120266008A1 SYSTEM-WIDE POWER MANAGEMENT CONTROL VIA CLOCK DISTRIBUTION NETWORK 有权
标题翻译：通过时钟分配网络进行系统的电源管理控制
公开(公告)号：US20120266008A1
公开(公告)日：2012-10-18
申请号：US13085879
申请日：2011-04-13
申请人： Paul W. Coteus , Alan Gara , Thomas M. Gooding , Rudolf A. Haring , Gerard V. Kopcsay , Thomas A. Liebsch , Don D. Reed
发明人： Paul W. Coteus , Alan Gara , Thomas M. Gooding , Rudolf A. Haring , Gerard V. Kopcsay , Thomas A. Liebsch , Don D. Reed
IPC分类号： G06F1/12
CPC分类号： G06F1/329 , G06F1/10 , G06F1/12 , G06F1/206 , G06F1/3206 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/16 , Y02D10/172 , Y02D10/24
摘要： An apparatus, method and computer program product for automatically controlling power dissipation of a parallel computing system that includes a plurality of processors. A computing device issues a command to the parallel computing system. A clock pulse-width modulator encodes the command in a system clock signal to be distributed to the plurality of processors. The plurality of processors in the parallel computing system receive the system clock signal including the encoded command, and adjusts power dissipation according to the encoded command.
摘要翻译：一种用于自动控制包括多个处理器的并行计算系统的功耗的装置，方法和计算机程序产品。计算设备向并行计算系统发出命令。时钟脉冲宽度调制器对系统时钟信号中的命令进行编码，以分配给多个处理器。并行计算系统中的多个处理器接收包括编码命令的系统时钟信号，并根据编码命令调整功耗。

37. 发明申请

US20090271608A1 Temperature Threshold Application Signal Trigger for Real-Time Relocation of Process 失效
标题翻译：温度阈值应用信号触发器用于实时重定位过程
公开(公告)号：US20090271608A1
公开(公告)日：2009-10-29
申请号：US12109579
申请日：2008-04-25
申请人： Thomas M. Gooding , Brant L. Knudson , Cory Lappi , Ruth J. Pooie , Andrew T. Tauferner
发明人： Thomas M. Gooding , Brant L. Knudson , Cory Lappi , Ruth J. Pooie , Andrew T. Tauferner
IPC分类号： G06F1/24
CPC分类号： G06F1/206
摘要： A method of managing a process relocation operation in a computing system is provided and includes determining respective operating temperatures of first, second and additional nodes of the system, where the first node has an elevated operating temperature and the second node has a normal operating temperature, notifying first and second kernels respectively associated with the first and second nodes, of a swapping condition, initially managing the first and second kernels to swap an application between the first and the second nodes while the swapping condition is in effect, and secondarily managing the first and second kernels to perform a barrier operation to end the swapping condition.
摘要翻译：提供了一种管理计算系统中的处理重定位操作的方法，并且包括确定系统的第一，第二和附加节点的相应操作温度，其中第一节点具有升高的工作温度，并且第二节点具有正常工作温度，通知交换条件分别与第一和第二节点相关联的第一和第二内核，最初管理第一和第二内核以在交换条件有效的同时在第一和第二节点之间交换应用，并且其次管理第一和第二内核和第二内核执行屏障操作以结束交换条件。

38. 发明申请

US20090049317A1 Managing Power in a Parallel Computer 有权
标题翻译：在并行计算机中管理电源
公开(公告)号：US20090049317A1
公开(公告)日：2009-02-19
申请号：US11840743
申请日：2007-08-17
申请人： Alan Gara , Thomas M. Gooding , Todd A. Inglett , Thomas A. Liebsch , Thomas E. Musta
发明人： Alan Gara , Thomas M. Gooding , Todd A. Inglett , Thomas A. Liebsch , Thomas E. Musta
IPC分类号： G06F1/32
CPC分类号： G06F1/263 , G06F1/3203
摘要： Managing power in a parallel computer, the parallel computer including a power supply and a plurality of compute nodes, the plurality of compute nodes powered by the power supply through a plurality of DC-DC converters, each DC-DC converter supplying current to an assigned group of compute nodes, each DC-DC converter having a current sensor. Embodiments include monitoring, by the current sensor, an amount of current supplied by that DC-DC converter to its assigned group of compute nodes; determining, by at least one DC-DC converter, that the amount of current supplied is greater than a predefined threshold value; sending, by the at least one DC-DC converter to the plurality of compute nodes, a global interrupt, including notifying the plurality of compute nodes to reduce power consumption; and reducing, by the plurality of compute nodes in accordance with power consumption ratios, power consumption of the compute nodes.
摘要翻译：在并行计算机中管理并行计算机，并行计算机包括电源和多个计算节点，所述多个计算节点由电源通过多个DC-DC转换器供电，每个DC-DC转换器将电流提供给所分配的一组计算节点，每个DC-DC转换器具有电流传感器。实施例包括由电流传感器监测由该DC-DC转换器提供给其分配的计算节点组的电流量; 由至少一个DC-DC转换器确定所提供的电流量大于预定阈值; 由所述至少一个DC-DC转换器向所述多个计算节点发送全局中断，包括通知所述多个计算节点以减少功耗; 并且根据功耗比由所述多个计算节点减少所述计算节点的功率消耗。

39. 发明授权

US10474625B2 Configuring compute nodes in a parallel computer using remote direct memory access (‘RDMA’) 有权
公开(公告)号：US10474625B2
公开(公告)日：2019-11-12
申请号：US13351419
申请日：2012-01-17
申请人： Michael E. Aho , John E. Attinella , Thomas M. Gooding , Michael B. Mundy
发明人： Michael E. Aho , John E. Attinella , Thomas M. Gooding , Michael B. Mundy
IPC分类号： G06F15/16 , G06F15/177 , G06F9/4401 , G06F8/61
摘要： Configuring compute nodes in a parallel computer using remote direct memory access (‘RDMA’), the parallel computer comprising a plurality of compute nodes coupled for data communications via one or more data communications networks, including: initiating, by a source compute node of the parallel computer, an RDMA broadcast operation to broadcast binary configuration information to one or more target compute nodes in the parallel computer; preparing, by each target compute node, the target compute node for receipt of the binary configuration information from the source compute node; transmitting, by each target compute node, a ready message to the target compute node, the ready message indicating that the target compute node is ready to receive the binary configuration information from the source compute node; and performing, by the source compute node, an RDMA broadcast operation to write the binary configuration information into memory of each target compute node.

40. 发明授权

US08713294B2 Heap/stack guard pages using a wakeup unit 失效
标题翻译：堆/堆栈保护页面使用唤醒单元
公开(公告)号：US08713294B2
公开(公告)日：2014-04-29
申请号：US12696817
申请日：2010-01-29
申请人： Thomas M. Gooding , David L. Satterfield , Burkhard Steinmacher-Burow
发明人： Thomas M. Gooding , David L. Satterfield , Burkhard Steinmacher-Burow
IPC分类号： G06F15/00 , G06F7/38 , G06F9/00 , G06F9/44
CPC分类号： G06F15/17381 , G06F9/30072
摘要： A method and system for providing a memory access check on a processor including the steps of detecting accesses to a memory device including level-1 cache using a wakeup unit. The method includes invalidating level-1 cache ranges corresponding to a guard page, and configuring a plurality of wakeup address compare (WAC) registers to allow access to selected WAC registers. The method selects one of the plurality of WAC registers, and sets up a WAC register related to the guard page. The method configures the wakeup unit to interrupt on access of the selected WAC register. The method detects access of the memory device using the wakeup unit when a guard page is violated. The method generates an interrupt to the core using the wakeup unit, and determines the source of the interrupt. The method detects the activated WAC registers assigned to the violated guard page, and initiates a response.
摘要翻译：一种用于在处理器上提供存储器访问检查的方法和系统，包括以下步骤：使用唤醒单元检测对包括一级高速缓存的存储设备的访问。该方法包括使对应于保护页面的1级缓存范围失效，以及配置多个唤醒地址比较（WAC）寄存器以允许访问所选择的WAC寄存器。该方法选择多个WAC寄存器中的一个，并建立与保护页相关的WAC寄存器。该方法配置唤醒单元在所选WAC寄存器访问时中断。当防护页被违反时，该方法使用唤醒单元检测存储设备的访问。该方法使用唤醒单元为内核生成中断，并确定中断源。该方法检测分配给违规保护页面的激活的WAC寄存器，并发起响应。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式