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31. 发明授权

US07504422B2 Polyamine compounds 失效
标题翻译：多胺化合物
公开(公告)号：US07504422B2
公开(公告)日：2009-03-17
申请号：US11834204
申请日：2007-08-06
申请人： Chi-Feng Yen , Chi-Hsin Richard King , Hua-Chien Chen , Gholam Hossein Hakimelahi , Shu-Jen Chen , Ying-Huey Huang , Chien-Huang Wu
发明人： Chi-Feng Yen , Chi-Hsin Richard King , Hua-Chien Chen , Gholam Hossein Hakimelahi , Shu-Jen Chen , Ying-Huey Huang , Chien-Huang Wu
IPC分类号： A61K31/44 , A61K31/40 , A61K31/18 , A61K31/165 , A61K31/15 , A61K31/135
CPC分类号： C07D207/335 , A61K31/135 , A61K31/15 , A61K31/165 , A61K31/195 , A61K31/44 , A61K31/445 , C07C211/27 , C07C211/29 , C07C211/30 , C07D209/08 , C07D213/38 , C07D213/42 , C07D213/74 , C07D235/14 , C07D257/02 , C07D333/18 , C07D401/14 , C07D409/14 , C07D471/04
摘要： This invention relates to methods for treating retinopathy and repairing tissue damage. The methods include administering to a subject in need thereof an effective amount of one or more compounds of the following formula. Each variable in this formula is defined in the specification.
摘要翻译：本发明涉及治疗视网膜病变和修复组织损伤的方法。所述方法包括向有需要的受试者施用有效量的一种或多种下列化合物。该公式中的每个变量在规范中定义。

32. 发明授权

US06333262B1 Method for forming silicide 失效
标题翻译：硅化物的形成方法
公开(公告)号：US06333262B1
公开(公告)日：2001-12-25
申请号：US09636558
申请日：2000-08-11
申请人： Kuen-Syh Tseng , Ruoh-Haw Chang , Shu-Jen Chen
发明人： Kuen-Syh Tseng , Ruoh-Haw Chang , Shu-Jen Chen
IPC分类号： H01L2044
CPC分类号： H01L21/28052 , H01L21/28518 , H01L29/665
摘要： A method for forming silicide on a semiconductor wafer. The semiconductor wafer includes a doped silicon layer on a predetermined area of the semiconductor wafer, a metal layer positioned on the doped silicon layer, and a barrier layer covering the metal layer. A first rapid thermal processing (RTP) step is performed to make portions of the metal layer react with silicon inside the doped silicon layer so as to form a transitional silicide. The barrier layer and the portions of the metal layer that have not reacted with silicon are then removed. A dielectric layer is formed on the transitional silicide. Finally, a second rapid thermal processing (RTP) step is performed to make the transitional silicide react with portions of the doped silicon layer so as to form the silicide.
摘要翻译：一种在半导体晶片上形成硅化物的方法。半导体晶片包括在半导体晶片的预定区域上的掺杂硅层，位于掺杂硅层上的金属层和覆盖金属层的阻挡层。执行第一快速热处理（RTP）步骤以使金属层的部分与掺杂硅层内的硅反应，以形成过渡硅化物。然后除去未与硅反应的阻挡层和金属层的部分。在过渡硅化物上形成介电层。最后，进行第二快速热处理（RTP）步骤以使过渡硅化物与掺杂硅层的部分反应以形成硅化物。

33. 发明授权

US06303043B1 Method of fabricating preserve layer 有权
标题翻译：制作保鲜层的方法
公开(公告)号：US06303043B1
公开(公告)日：2001-10-16
申请号：US09348407
申请日：1999-07-07
申请人： Wei-Shiau Chen , Ruoh-Haw Chang , Shu-Jen Chen
发明人： Wei-Shiau Chen , Ruoh-Haw Chang , Shu-Jen Chen
IPC分类号： H01L2100
CPC分类号： H01L21/76801 , G02F1/133553 , G02F1/136277 , H01L21/76832 , H01L21/76834 , Y10S438/954
摘要： A method of fabricating a preserve layer. A top metallic layer is formed over the substrate. Portions of the metallic layer and the substrate are removed to form a trench. A conformal pad oxide layer is formed over the substrate. A conformal first nitride layer is formed on the pad oxide layer. A spin-on glass layer is formed on the first nitride layer to fill the trench. An etching back step is performed to remove a portion of the spin-on glass layer. The remaining spin-on glass layer fills the trench to the surface of the first nitride layer above the top metallic layer. An oxide layer is formed over the substrate. A second nitride layer is formed on the oxide layer. A preserve layer comprising the pad oxide layer, the first nitride layer, the oxide layer, and the second nitride layer is formed.
摘要翻译：一种保护层的制造方法。顶层金属层形成在衬底上。去除部分金属层和基底以形成沟槽。在衬底上形成保形衬垫氧化物层。在焊盘氧化物层上形成共形的第一氮化物层。在第一氮化物层上形成旋涂玻璃层以填充沟槽。执行蚀刻返回步骤以去除旋涂玻璃层的一部分。剩余的旋涂玻璃层将沟槽填充到顶部金属层上方的第一氮化物层的表面。在衬底上形成氧化物层。在氧化物层上形成第二氮化物层。形成包括衬垫氧化物层，第一氮化物层，氧化物层和第二氮化物层的保护层。

34. 发明授权

US06203975B1 Adenovirus and method of use thereof 有权
标题翻译：腺病毒及其使用方法
公开(公告)号：US06203975B1
公开(公告)日：2001-03-20
申请号：US09427048
申请日：1999-10-21
申请人： James M. Wilson , Krishna J. Fisher , Shu-Jen Chen , Matthew Weitzman
发明人： James M. Wilson , Krishna J. Fisher , Shu-Jen Chen , Matthew Weitzman
IPC分类号： C12Q168
CPC分类号： C12N7/00 , A61K48/00 , C12N15/86 , C12N2710/10343 , C12N2810/6018 , C12N2840/44
摘要： A recombinant adenovirus and a method for producing the virus are provided which utilize a recombinant shuttle vector comprising adenovirus DNA sequence for the 5′ and 3′ cis-elements necessary for replication and virion encapsidation in the absence of sequence encoding viral genes and a selected minigene linked thereto, and a helper adenovirus comprising sufficient adenovirus gene sequences necessary for a productive viral infection. Desirably the helper gene is crippled by modifications to its 5′ packaging sequences, which facilitates purification of the viral particle from the helper virus.
摘要翻译：提供了重组腺病毒和用于产生病毒的方法，其在不存在编码病毒基因的序列的情况下利用包含腺病毒DNA序列的重组穿梭载体用于复制所必需的5'和3'顺式元件和病毒粒子壳化，以及选择的小基因以及包含生产性病毒感染所必需的足够的腺病毒基因序列的辅助性腺病毒。帮助基因通过修饰其5'包装序列而被削弱，这有助于从辅助病毒纯化病毒颗粒。

35. 发明授权

US06177319B1 Method of manufacturing salicide layer 有权
标题翻译：制造硅化物层的方法
公开(公告)号：US06177319B1
公开(公告)日：2001-01-23
申请号：US09345435
申请日：1999-07-01
申请人： Shu-Jen Chen
发明人： Shu-Jen Chen
IPC分类号： H01L218234
CPC分类号： H01L27/10894 , H01L21/823418 , H01L21/823443 , H01L27/10873
摘要： A method of manufacturing a salicide layer is described. A substrate having a memory region and a logic circuit region is provided, wherein the memory region comprises a first gate structure and a first source/drain region and the logic circuit region comprises a second gate structure and a second source/drain region. A first salicide layer is formed on the second gate structure and the second source/drain region in the logic circuit region. A dielectric layer is formed over the substrate. A portion of the dielectric layer is removed to expose the first gate structure and the first salicide layer above the second gate structure. A second salicide layer is formed on the first and the second gate structure.
摘要翻译：描述了制造自对准硅化物层的方法。提供了具有存储区域和逻辑电路区域的衬底，其中存储区域包括第一栅极结构和第一源极/漏极区域，并且逻辑电路区域包括第二栅极结构和第二源极/漏极区域。在逻辑电路区域中的第二栅极结构和第二源极/漏极区域上形成第一自对准硅化物层。介电层形成在衬底上。去除介电层的一部分以暴露第二栅极结构和第二栅极结构上方的第一自对准硅化物层。在第一和第二栅极结构上形成第二自对准硅化物层。

36. 发明授权

US6150264A Method of manufacturing self-aligned silicide 失效
标题翻译：制造自对准硅化物的方法
公开(公告)号：US6150264A
公开(公告)日：2000-11-21
申请号：US075420
申请日：1998-05-08
申请人： Shu-Jen Chen , Ruoh-Haw Chang , Chih-Ching Hsu
发明人： Shu-Jen Chen , Ruoh-Haw Chang , Chih-Ching Hsu
IPC分类号： H01L21/285 , H01L21/44
CPC分类号： H01L21/28518
摘要： The invention relates to a method for manufacturing of a titanium self-aligned silicide (Salicide). This process includes of forming a metal layer over the surfaces of the semiconductor substrate and the gate electrode. Then, a rapid thermal process is performed with three stages to form the salicide, for example, titanium silicide, at the interface between the titanium and silicon, namely on the surfaces of the gate electrode and source/drain region. The rapid thermal process with three stages includes using the first stage with the first temperature to form the early titanium silicide having the C49 phase. The temperature is raised to a second temperature and the RTA process is performed with nitrogen gases to transform the high resistance phase C49 of the titanium nitride into a low resistance phase C54 in the second stage. Then, the temperature is rapidly raised to a third temperature to transform the C49 phase into the C54 phase completely and to prevent the agglomeration phenomenon.
摘要翻译：本发明涉及钛自对准硅化物（硅化物）的制造方法。该方法包括在半导体衬底和栅电极的表面上形成金属层。然后，以三个阶段进行快速热处理，以在钛和硅之间的界面，即在栅电极和源极/漏极区的表面上形成硅化物，例如硅化钛。具有三个阶段的快速热处理包括使用具有第一温度的第一阶段形成具有C49相的早期硅化钛。将温度升至第二温度，并用氮气进行RTA处理，以将氮化钛的高电阻相C49转化为第二阶段的低电阻相C54。然后，将温度迅速升至第三温度，以使C49相完全转化为C54相，并防止凝聚现象。

37. 发明授权

US5956590A Process of forming a field effect transistor without spacer mask edge defects 失效
标题翻译：形成无间隔掩模边缘缺陷的场效应晶体管的工艺
公开(公告)号：US5956590A
公开(公告)日：1999-09-21
申请号：US907242
申请日：1997-08-06
申请人： Yong-Fen Hsieh , Shu-Jen Chen , Joe Ko
发明人： Yong-Fen Hsieh , Shu-Jen Chen , Joe Ko
IPC分类号： H01L21/265 , H01L21/266 , H01L21/336 , H01L29/08
CPC分类号： H01L29/66636 , H01L21/26586 , H01L21/266 , H01L29/0847 , H01L29/665
摘要： A field effect transistor which is not susceptible to mask edge detects at its gate spacer oxides. The transistor is formed upon a semiconductor substrate through successive layering of a gate oxide, a gate electrode and a gate cap oxide. A pair of curved gate spacer oxides are then formed covering opposite edges of the stack of the gate oxide, the gate electrode and the gate cap oxide. The semiconductor substrate is then etched to provide a smooth topographic transition from the gate spacer oxides to the etched semiconductor surface. Source/drain electrodes are then implanted into the etched semiconductor substrate and annealed to yield the finished transistor. A second embodiment of the field effect transistor possesses a polysilicon gate. Alter removal of the gate cap oxide, a metal layer may be deposited and sintered upon the polysilicon gate and the source/drain electrodes. The metal salicide layers formed upon the electrodes of the transistor have limited susceptibility to parasitic current leakage.
摘要翻译：对栅极边缘不敏感的场效应晶体管在其栅极间隔氧化物处检测。晶体管通过栅极氧化物，栅极电极和栅极氧化物的连续层叠形成在半导体衬底上。然后形成一对弯曲的栅间隔氧化物，其覆盖栅极氧化物，栅极电极和栅极氧化物的堆叠的相对边缘。然后蚀刻半导体衬底以提供从栅极间隔物氧化物到蚀刻的半导体表面的平滑的形貌转变。然后将源极/漏极注入到蚀刻的半导体衬底中并退火以产生成品晶体管。场效应晶体管的第二实施例具有多晶硅栅极。改变栅极氧化物的去除，金属层可以沉积并烧结在多晶硅栅极和源极/漏极上。形成在晶体管的电极上的金属硅化物层具有对寄生电流泄漏的敏感性的限制。

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