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31. 发明授权

US06513452B2 Adjusting DC bias voltage in plasma chamber 失效
标题翻译：调整等离子体室内的直流偏置电压
公开(公告)号：US06513452B2
公开(公告)日：2003-02-04
申请号：US09841804
申请日：2001-04-24
申请人： Hongching Shan , Evans Y. Lee , Michael D. Welch , Robert W. Wu , Bryan Y. Pu , Paul E. Luscher , James D. Carducci , Richard Blume
发明人： Hongching Shan , Evans Y. Lee , Michael D. Welch , Robert W. Wu , Bryan Y. Pu , Paul E. Luscher , James D. Carducci , Richard Blume
IPC分类号： C23C1600
CPC分类号： H01J37/32834 , H01J37/32477 , H01J37/32623 , H01J37/32706
摘要： A method of adjusting the cathode DC bias in a plasma chamber for fabricating semiconductor devices. A dielectric shield is positioned between the plasma and a selected portion of the electrically grounded components of the chamber, such as the electrically grounded chamber wall. The cathode DC bias is adjusted by controlling one or more of the following parameters: (1) the surface area of the chamber wall or other grounded components which is blocked by the dielectric shield; (2) the thickness of the dielectric; (3) the gap between the shield and the chamber wall; and (4) the dielectric constant of the dielectric material. In an apparatus aspect, the invention is a plasma chamber for fabricating semiconductor devices having an exhaust baffle with a number of sinuous passages. Each passage is sufficiently long and sinuous that no portion of the plasma within the chamber can extend beyond the outlet of the passage. By blocking the plasma from reaching the exhaust pump, the exhaust baffle reduces the deposition of unwanted particles on exhaust pump components. The exhaust baffle also reduces the cathode DC bias by reducing the effective surface area of the electrically grounded chamber wall which couples RF power to the plasma.
摘要翻译：一种调整用于制造半导体器件的等离子体室中的阴极直流偏压的方法。电介质屏蔽件位于等离子体和室的电接地部件的选定部分之间，例如电接地室壁。通过控制一个或多个以下参数来调节阴极直流偏压：（1）腔室壁的表面积或由介电屏蔽件阻挡的其它接地部件; （2）电介质的厚度; （3）屏蔽和室壁之间的间隙; 和（4）介电材料的介电常数。在装置方面，本发明是用于制造半导体器件的等离子体室，其具有带有多个弯曲通道的排气挡板。每个通道足够长和弯曲，使得室内的等离子体的任何部分不能延伸超过通道的出口。通过阻止等离子体到达排气泵，排气挡板减少排气泵部件上不想要的颗粒的沉积。排气挡板还通过减少将RF功率耦合到等离子体的电接地室壁的有效表面积来减小阴极DC偏压。

32. 发明授权

US06403491B1 Etch method using a dielectric etch chamber with expanded process window 失效
标题翻译：使用具有扩展工艺窗口的电介质蚀刻室的蚀刻方法
公开(公告)号：US06403491B1
公开(公告)日：2002-06-11
申请号：US09704867
申请日：2000-11-01
申请人： Jingbao Liu , Judy Wang , Takehiko Komatsu , Bryan Y Pu , Kenny L Doan , Claes Bjorkman , Melody Chang , Yunsang Kim , Hongching Shan , Ruiping Wang
发明人： Jingbao Liu , Judy Wang , Takehiko Komatsu , Bryan Y Pu , Kenny L Doan , Claes Bjorkman , Melody Chang , Yunsang Kim , Hongching Shan , Ruiping Wang
IPC分类号： H01L213065
CPC分类号： H01L21/6875 , H01J37/32522 , H01L21/31116 , H01L21/67069 , H01L21/6833 , H01L21/68757 , H01L21/68785 , H01L21/68792 , H01L21/76802 , H01L21/76807 , H01L21/76897 , H01L2924/3011
摘要： A method for etching a dielectric in a thermally controlled plasma etch chamber with an expanded processing window. The method is adapted to incorporate benefits of a the thermal control and high evacuation capability of the chamber. Etchent gases include hydrocarbons, oxygen and inert gas. Explanation is provided for enablling the use of hexafluoro-1,3-butadiene in a capacitively coupled etch plasma. The method is very useful for creating via, self aligned contacts, dual damascene, and other dielectric etch.
摘要翻译：一种用于在具有扩展的处理窗口的热控等离子体蚀刻室中蚀刻电介质的方法。该方法适于结合腔室的热控制和高排气能力的优点。 Etchent气体包括碳氢化合物，氧气和惰性气体。提供了解释在电容耦合蚀刻等离子体中使用六氟-1,3-丁二烯的方法。该方法对于创建通孔，自对准触点，双镶嵌和其他电介质蚀刻非常有用。

33. 发明授权

US06174451B1 Oxide etch process using hexafluorobutadiene and related unsaturated hydrofluorocarbons 失效
标题翻译：使用六氟丁二烯和相关不饱和氢氟烃的氧化物蚀刻工艺
公开(公告)号：US06174451B1
公开(公告)日：2001-01-16
申请号：US09193056
申请日：1998-11-16
申请人： Raymond Hung , Joseph P. Caulfield , Hongching Shan , Ruiping Wang , Gerald Z. Yin
发明人： Raymond Hung , Joseph P. Caulfield , Hongching Shan , Ruiping Wang , Gerald Z. Yin
IPC分类号： H01L2131
CPC分类号： H01L21/31116
摘要： An oxide etching process, particular useful for selectively etching oxide over a feature having a non-oxide composition, such as silicon nitride and especially when that feature has a corner that is prone to faceting during the oxide etch. The invention uses one of three unsaturated 3- and 4-carbon fluorocarbons, specifically hexafluorobutadiene (C4F6), pentafluoropropylene (C3HF5), and trifluoropropyne (C3HF3), all of which have boiling points below 10° C. and are commercially available. The unsaturated hydrofluorocarbon together with argon is excited into a high-density plasma in a reactor which inductively couples plasma source power into the chamber and RF biases the pedestal electrode supporting the wafer. Preferably, a two-step etch is used process is used in which the above etching gas is used in the main step to provide a good vertical profile and a more strongly polymerizing fluorocarbon such as difluoromethane (CH2F2) is added in the over etch to protect the nitride corner.
摘要翻译：一种氧化物蚀刻工艺，特别用于在具有非氧化物组成的特征（例如氮化硅）上选择性地蚀刻氧化物，特别是当该特征具有在氧化物蚀刻期间易于刻面的拐角时。本发明使用沸点低于10℃的三种不饱和3-和4-碳碳氟化合物，特别是六氟丁二烯（C 4 F 6），五氟丙烯（C 3 HF 5）和三氟丙炔（C 3 H 3 F 3）中的一种，并且可商购。将不饱和氢氟烃与氩一起激发成反应器中的高密度等离子体，其将等离子体源功率感应耦合到室中，并且RF偏置支撑晶片的基座电极。优选地，使用两步蚀刻方法，其中在主要步骤中使用上述蚀刻气体以提供良好的垂直分布，并且在过蚀刻中加入更强的聚合碳氟化合物如二氟甲烷（CH 2 F 2）以保护氮化物角。

34. 发明授权

US6076482A Thin film processing plasma reactor chamber with radially upward sloping ceiling for promoting radially outward diffusion 失效
标题翻译：具有径向向上倾斜天花板的薄膜处理等离子体反应器室，用于促进径向向外扩散
公开(公告)号：US6076482A
公开(公告)日：2000-06-20
申请号：US937347
申请日：1997-09-20
申请人： Ji Ding , James Carducci , Hongching Shan , Siamak Salimian , Evans Lee , Paul E. Luscher , Mike Welch
发明人： Ji Ding , James Carducci , Hongching Shan , Siamak Salimian , Evans Lee , Paul E. Luscher , Mike Welch
IPC分类号： H01J37/32 , C23C16/00 , C23F1/02 , H01L21/302
CPC分类号： H01J37/32458 , H01J37/321
摘要： The invention contours the chamber surface overlying semiconductor wafer being processed (i.e., the chamber ceiling) in such a way as to promote or optimize the diffusion of plasma ions from their regions of origin to other regions which would otherwise have a relative paucity of plasma ions. This is accomplished by providing a greater chamber volume over those areas of the wafer otherwise experiencing a shortage of plasma ions and a smaller chamber volume over those areas of the wafer experiencing a plentitude of plasma ions (e.g, due to localized plasma generation occurring over the latter areas). Thus, the ceiling is contoured to promote a plasma ion diffusion which best compensates for localized or non-uniform patterns in plasma ion generation typical of an inductively coupled source (e.g., an overhead inductive antenna). Specifically, the invention provides a lesser ceiling height (relative to the wafer surface) over regions in which plasma ions are generated or tend to congregate and a greater ceiling height in other regions. More specifically, in the case of an overlying inductive antenna where plasma ion density tends to fall off toward the wafer periphery, the ceiling contour is such that the ceiling height increases radially, i.e., toward the wafer periphery. This promotes or increases plasma ion diffusion toward the wafer periphery as a function of the rate at which the ceiling height increases radially.
摘要翻译：本发明轮廓地覆盖正在被处理的半导体晶片（即，室顶）上的腔表面，以促进或优化等离子体离子从其原始区域扩散到否则将具有相对低的等离子体离子的其它区域。这通过在晶片的那些区域上提供更大的室体积，否则经历等离子体离子的短缺，并且在经历等离子体离子的大量的晶片的那些区域（例如，由于在后面的区域）。因此，天花板的轮廓是促进等离子体离子扩散，其最好地补偿电感耦合源（例如，架空感应天线）典型的等离子体离子产生中的局部或非均匀图案。具体地说，本发明提供了在其中产生等离子体离子或倾向聚集的区域和在其它区域中具有更大的天花板高度的较小的天花板高度（相对于晶片表面）。更具体地说，在等离子体离子密度倾向于朝向晶片周边倾斜的上覆感应天线的情况下，天花板高度使天花板高度径向增加，即朝向晶片周边。这促进或增加等离子体离子向晶片周边的扩散，这是天花板高度径向增加的速率的函数。

35. 发明授权

US5514247A Process for plasma etching of vias 失效
标题翻译：等离子体蚀刻通孔的工艺
公开(公告)号：US5514247A
公开(公告)日：1996-05-07
申请号：US272356
申请日：1994-07-08
申请人： Hongching Shan , Robert Wu
发明人： Hongching Shan , Robert Wu
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/311 , H01L21/3213 , H01L21/768 , H01L21/00 , B44C1/22 , C03C15/00 , C23F1/00
CPC分类号： H01L21/02063 , H01L21/31116 , H01L21/76802
摘要： Disclosed is a process for plasma etching a mask patterned dielectric film to form vias on a semiconductor wafer, so that the resulting etched structure is devoid of residues on the walls of the structure. A via is an opening through a dielectric material through which a point of contact of underlying metal with a metal film deposited over the dielectric is made. The underlying metal, when exposed to plasma, has a tendency to sputter onto the vertical wall portions of the contact via structures. The metal-containing sputtered material forms a residue that essentially cannot be removed in the subsequent photoresist stripping process typically used in semiconductor manufacturing. The plasma etch process in accordance with the invention enables removal of the sputtered metal by utilizing with the basic dielectric etch gases a gas that reacts with the metal to form volatile compounds which are readily evacuable.
摘要翻译：公开了一种用于等离子体蚀刻掩模图案化电介质膜以在半导体晶片上形成通孔的方法，使得所得到的蚀刻结构在结构的壁上没有残留物。通孔是通过介电材料的开口，通过该电介质材料制成沉积在电介质上的下层金属与金属膜的接触点。底层金属暴露于等离子体时，具有溅射到接触通孔结构的垂直壁部分的倾向。含金属的溅射材料形成残留物，其基本上不能在通常用于半导体制造的随后的光致抗蚀剂剥离工艺中除去。根据本发明的等离子体蚀刻工艺能够通过利用碱性电介质蚀刻气体与金属反应形成易于排出的挥发性化合物的气体来除去溅射金属。

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