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    • 33. 发明公开
    • 리튬 전지용 전해질 및 이를 포함하는 리튬 전지
    • 用于锂电池的电解液和包含该电池的锂电池
    • KR1020150059532A
    • 2015-06-01
    • KR1020130143247
    • 2013-11-22
    • 삼성전자주식회사
    • 박인선강윤석박민식박진환
    • H01M10/0567H01M10/0569H01M4/525H01M4/505H01M10/052
    • H01M10/0567H01M4/131H01M4/133H01M10/052H01M10/0568H01M10/0569H01M2300/0034H01M2300/0037Y02E60/122
    • 하기화학식 1로표시되는화합물; 비수성유기용매및 리튬염을포함하는리튬전지용전해질및 이를포함하는리튬전지가제시된다. [화학식 1]상기화학식 1 중, X는수소, C1-C30 알킬기또는 C6-C30 아릴기이고, Y는실리콘(Si) 또는게르미늄(Ge)이고, Z은 O-N(R)-Z, -O-M 또는 -O-Si(R)(R)-Z이고,M은알칼리금속이고, R은수소, 리튬또는 C1-C30 알킬기이고, Z및 Z는서로독립적으로수소, C1-C30 알킬기이고, -Si(R)(R)(R) 또는 -O-Si(R)(R)(R)이고, R내지 R은서로독립적으로수소, C1-C30 알킬기, C1-C30 알콕시기, C6-C30 아릴기, C6-C30 아릴옥시기, C7-C30 아릴알킬기, C2-C30 헤테로아릴기, C2-C30 헤테로아릴옥시기, C3-C30 헤테로아릴알킬기, C4-C30 탄소고리기, C5-C30 탄소고리알킬기, C2-C30 헤테로고리기, C3-C30 헤테로고리알킬기, 할로겐원자, 하이드록시기, 시아노기, 또는아미노기이다.
    • 公开了一种用于锂电池的电解质和包含该锂电池的锂电池,其包含:化学式1表示的化合物; 非水有机溶剂; 和锂盐。 在化学式1中,X是氢,C 1 -C 30烷基或C 6 -C 30芳基; Y是硅(Si)或锗(Ge); Z是O-N(R)-Z_1,-O-M或O-Si(R_3)(R_4)-Z_2; M是碱金属; R是氢,锂或C 1 -C 30烷基; Z_1和Z_2独立地是氢,C1-C30烷基,-Si(R_5)(R_6)(R_7)或-O-Si(R_5)(R_6)(R_7); R 1 -R 3独立地是氢,C 1 -C 30烷基,C 1 -C 30烷氧基,C 6 -C 30芳基,C 6 -C 30芳氧基,C 7 -C 30芳基烷基,C 2 -C 30杂芳基, C2-C30(杂芳基)氧基,C3-C30(杂芳基)烷基,C4-C30碳环基,C5-C30碳环烷基,C2-C30杂环基,C3-C30杂 环烷基,卤素原子,羟基,氰基或氨基。 根据一个实施方案,可以使用用于锂电池的电解质来制造具有改善的高速率性能和平均放电电压特性以及改善寿命特性的锂电池。
    • 35. 发明公开
    • 반도체 장치의 제조 방법 및 이에 의해 제조된 반도체 장치
    • 形成半导体器件的方法和由该方法形成的器件
    • KR1020130063578A
    • 2013-06-17
    • KR1020110129985
    • 2011-12-07
    • 삼성전자주식회사
    • 홍종원박인선김회승백종민
    • H01L21/28
    • H01L21/76877C25D3/38C25D5/08C25D7/123C25D17/001H01L21/2885H01L21/76802H01L21/76883H01L23/522H01L27/04H01L27/1052H01L27/10882H01L27/10894H01L27/11526H01L27/11548H01L27/11573H01L27/11575H01L2924/0002H01L2924/00
    • PURPOSE: A method for forming a semiconductor device and the semiconductor device formed by the method are provided to form a uniform plating layer having no void in a cell pattern region. CONSTITUTION: An interlayer insulating layer is formed on the front surface of a substrate including a cell array region and a peripheral circuit region(S10). The interlayer insulating layer is etched to form cell recess regions and at least one dummy recess region in the cell array region(S20). A seed layer is formed on the interlayer insulating layer(S30). An electroplating process is performed to form a plating layer for filling the cell recess regions and the dummy recess region(S40). [Reference numerals] (S10) Step of forming an interlayer insulating layer on a substrate; (S20) Step of forming a cell recess region and a dummy recess region on the interlayer insulating layer; (S30) Step of forming a seed layer on the interlayer insulating layer; (S40) Step of forming a plating layer in the cell recess region and the dummy recess region by processing an electroplating process
    • 目的:提供一种形成半导体器件的方法和通过该方法形成的半导体器件,以在电池图案区域中形成不具有空隙的均匀镀层。 构成:在包括电池阵列区域和外围电路区域的衬底的前表面上形成层间绝缘层(S10)。 蚀刻层间绝缘层以形成电池阵列区域中的电池凹部区域和至少一个虚设凹部区域(S20)。 在层间绝缘层上形成种子层(S30)。 进行电镀工艺以形成用于填充电池凹部区域和虚设凹部区域的电镀层(S40)。 (S10)在衬底上形成层间绝缘层的步骤; (S20)在层间绝缘层上形成单元凹部区域和虚设凹部区域的工序; (S30)在层间绝缘层上形成种子层的工序; (S40)通过处理电镀工序在电池凹部区域和虚设凹部区域形成镀层的工序
    • 39. 发明公开
    • 상변화 메모리 유닛, 이의 제조 방법, 이를 포함하는상변화 메모리 장치 및 그 제조 방법
    • 相变存储器单元,形成相变存储单元的方法,具有相变存储器单元的相变存储器件以及制造相变存储器件的方法
    • KR1020080111206A
    • 2008-12-23
    • KR1020070059273
    • 2007-06-18
    • 삼성전자주식회사
    • 오규환강신재박인선임현석이현석임낙현
    • H01L27/115
    • H01L45/06G11C13/0004H01L27/2409H01L27/2436H01L45/1233H01L45/126H01L45/144H01L45/16H01L45/143
    • A phase-change memory unit and a manufacturing method thereof and a phase change memory device including this and a manufacturing method thereof are provide to authorize current from a conductive construct to a first electrode or a bottom electrode and as a conductive construct and/or an ohmic layer pattern are contacted with the side or bottom surface of the first electrode or the bottom electrode. A phase-change memory unit comprises an isolation structure(210), a conductive construct(225), a first electrode(250), a phase change material layer pattern(275), a second electrode(280). The isolation structure is formed on a substrate(200). The isolation structure has an opening(215) exposing substrate. The conductive construct is formed within the opening. The first electrode has a side wall and a bottom surface contacted with the conductive construct. The phase change material layer pattern is formed on the first electrode and isolation structure. The second electrode is formed on the phase change material layer pattern.
    • 相变存储器单元及其制造方法以及包括该相位变换存储器单元及其制造方法的相变存储器件及其制造方法被提供以授权从导电构件到第一电极或底部电极以及导电构造和/或 欧姆层图案与第一电极或底电极的侧表面或底表面接触。 相变存储器单元包括隔离结构(210),导电构造(225),第一电极(250),相变材料层图案(275),第二电极(280)。 隔离结构形成在基板(200)上。 隔离结构具有暴露衬底的开口(215)。 导电构件形成在开口内。 第一电极具有与导电构件接触的侧壁和底表面。 相变材料层图案形成在第一电极和隔离结构上。 第二电极形成在相变材料层图案上。