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    • 31. 发明申请
    • PLC-TYPE DELAY DEMODULATION CIRCUIT
    • PLC型延迟解调电路
    • US20120162746A1
    • 2012-06-28
    • US13336111
    • 2011-12-23
    • Hiroshi KAWASHIMAKazutaka NARA
    • Hiroshi KAWASHIMAKazutaka NARA
    • G02F2/00
    • G02B6/2935G02B6/2861G02F1/225G02F2/00H04B10/677
    • The PLC-type delay demodulation circuit includes a planar lightwave circuit that is provided on one PLC chip and demodulates a DQPSK signal. The planar lightwave circuit includes a Y-branch waveguide that branches a DQPSK-modulated optical signal into two optical signals and first and second MZIs that delay the branched optical signals by one bit. A wave plate is provided in central portions of first and second arm waveguides of the first MZI and first and second arm waveguides of the second MZI in such a manner that the wave plate intersects all of the four arm waveguides, the four arm waveguides being close to one another in a portion where the wave plate is provided.
    • PLC型延迟解调电路包括设置在一个PLC芯片上并解调DQPSK信号的平面光波电路。 平面光波电路包括将DQPSK调制的光信号分成两个光信号的Y分支波导和将分支光信号延迟一位的第一和第二MZI。 在第一MZI的第一和第二臂波导的中心部分和第二MZI的第一和第二臂波导的中心部分中设置波片,使得波片与四个臂波导中的所有四个波导相交,四个波导波导接近 在设置波片的部分中彼此相对。
    • 34. 发明申请
    • HYBRID INTEGRATED OPTICAL MODULE
    • 混合集成光模块
    • US20110110622A1
    • 2011-05-12
    • US12942481
    • 2010-11-09
    • Takeshi AKUTSUJunichi HasegawaKazutaka Nara
    • Takeshi AKUTSUJunichi HasegawaKazutaka Nara
    • G02B6/12H01P11/00
    • G02B6/4225Y10T29/49016
    • The present invention provides a hybrid integrated optical module having a high coupling efficiency by suppressing a connection loss between waveguides. A hybrid integrated optical module according to an embodiment of the present invention is an optical module which integrates a semiconductor chip and a PLC chip. The semiconductor chip has a semiconductor waveguide and is mounted on a Si bench. The PLC chip includes a PLC substrate and an optical waveguide formed on the PLC substrate. An end face of the semiconductor chip protrudes from an end face of the Si bench toward the PLC chip side by a protrusion amount X. Gap adjustment (adjustment of a distance D) between the semiconductor waveguide and the optical waveguide becomes possible by setting a position where the end face of the semiconductor chip is brought into contact with an end face of the PLC chip to be a reference position (zero point).
    • 本发明通过抑制波导之间的连接损耗来提供具有高耦合效率的混合集成光模块。 根据本发明的实施例的混合集成光学模块是集成了半导体芯片和PLC芯片的光学模块。 半导体芯片具有半导体波导并且安装在Si台架上。 PLC芯片包括形成在PLC基板上的PLC基板和光波导。 半导体芯片的端面从Si台架的端面朝向PLC芯片侧突出突出量X.通过设置半导体波导和光波导之间的间隙调整(距离D的调整)可以进行位置 其中半导体芯片的端面与PLC芯片的端面接触成为基准位置(零点)。
    • 37. 发明授权
    • Arrayed waveguide grating optical multiplexer/demultiplexer
    • 阵列波导光栅光复用器/解复用器
    • US07555175B2
    • 2009-06-30
    • US11844762
    • 2007-08-24
    • Kazutaka Nara
    • Kazutaka Nara
    • G02B6/12
    • G02B6/12019
    • An arrayed waveguide grating optical multiplexer/demultiplexer 10 of the present invention 10 comprises one arrayed waveguide grating (AWG) 20 having two input waveguides 21, 22 and two output waveguide-groups 23, 24, and a Mach Zehnder Interferometer-type interleaver 30 integrated with the AWG 20. Each of the input waveguides 21, 22 is formed by a Mach Zehnder Interferometer having the same free spectral range as the frequency spacing of the AWG. The Interferometer includes a 3 dB coupler 51 connected to the 3 dB coupler 32, a 100% coupler 52, a waveguide delay line 53 with an optical path length difference ΔL of 4.1 mm formed between the couplers 51, 52, and a phase shifter 54 of π formed between the 100% coupler 52 and a 3 dB coupler 55 connected to the first slab waveguide 25.
    • 本发明10的阵列波导光栅光复用器/解复用器10包括具有两个输入波导21,22和两个输出波导组23,24的一个阵列波导光栅(AWG)20和一个集成了马赫曾德干涉仪型交织器30 每个输入波导21,22由具有与AWG的频率间隔相同的自由光谱范围的马赫曾德干涉仪形成。 干涉仪包括连接到3dB耦合器32的3dB耦合器51,100%耦合器52,在耦合器51,52和移相器54之间形成的光程长度差ΔL为4.1mm的波导延迟线53 形成在100%耦合器52和连接到第一平板波导25的3dB耦合器55之间。
    • 38. 发明授权
    • Arrayed waveguide grating
    • 阵列波导光栅
    • US07539368B2
    • 2009-05-26
    • US12041231
    • 2008-03-03
    • Junichi HasegawaKazutaka Nara
    • Junichi HasegawaKazutaka Nara
    • G02B6/12G02B6/34
    • G02B6/1203G02B6/12014
    • An arrayed waveguide grating has optical input waveguides, a first slab waveguide, an arrayed waveguide comprising plural waveguides of mutually-different lengths, a second slab waveguide and plural optical output waveguides. The first slab waveguide is divided along division surfaces crossing the light path into divided slab waveguides. The divided slab waveguide is temperature-dependently moved along the division surfaces by sliding members which are formed of members exhibiting different expansion/contraction corresponding to temperature change. The sliding members are configured to move the divided slab waveguide in their respective mutually-different temperature ranges in the operating temperature range of the arrayed waveguide grating. A sliding distance of the divided slab waveguide is used as a temperature-dependence reduction amount that varies as temperature changes so as to reduce the temperature difference of the light transmission center wavelength of the arrayed waveguide grating.
    • 阵列波导光栅具有光输入波导,第一平板波导,包括相互不同长度的多个波导的阵列波导,第二平板波导和多个光输出波导。 将第一平板波导沿着穿过光路的划分表面划分成分开的平板波导。 分开的平板波导通过由对应于温度变化显示不同的膨胀/收缩的构件形成的滑动构件沿分割表面温度依赖地移动。 滑动构件被构造成在阵列波导光栅的工作温度范围内将分开的平板波导移动到它们各自相互不同的温度范围内。 使用分开的平板波导的滑动距离作为随着温度变化而变化的温度依赖性降低量,以降低阵列波导光栅的透光中心波长的温差。