专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明申请

US20110057237A1 SEMICONDUCTOR DEVICES AND METHODS OF FORMING THEREOF 有权
标题翻译：半导体器件及其形成方法
公开(公告)号：US20110057237A1
公开(公告)日：2011-03-10
申请号：US12874102
申请日：2010-09-01
申请人： Hokyun AHN , Jong-Won Lim , Hyung Sup Yoon , Woojin Chang , Hae Cheon Kim
发明人： Hokyun AHN , Jong-Won Lim , Hyung Sup Yoon , Woojin Chang , Hae Cheon Kim
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/8128 , H01L29/42316 , H01L29/66863
摘要： Provided is a semiconductor device. The semiconductor device includes: a substrate; an active layer on the substrate; a capping layer on the active layer; source/drain electrodes on the capping layer; a gate electrode on the active layer; and a first void region on a first sidewall of the gate electrode and a second void region on a second sidewall facing the first sidewall.
摘要翻译：提供一种半导体器件。半导体器件包括：衬底; 衬底上的有源层; 活性层上的覆盖层; 覆盖层上的源/漏电极; 有源层上的栅电极; 以及栅电极的第一侧壁上的第一空隙区域和面向第一侧壁的第二侧壁上的第二空隙区域。

32. 发明申请

US20110037521A1 POWER AMPLIFIER HAVING DEPLETION MODE HIGH ELECTRON MOBILITY TRANSISTOR 有权
标题翻译：具有分离模式高电子移动晶体管的功率放大器
公开(公告)号：US20110037521A1
公开(公告)日：2011-02-17
申请号：US12855055
申请日：2010-08-12
申请人： Dong Min KANG , Hong Gu JI , Hokyun AHN , Jong-Won LIM , Woojin CHANG , Sang-Heung LEE , Dong-Young KIM , Hae Cheon KIM
发明人： Dong Min KANG , Hong Gu JI , Hokyun AHN , Jong-Won LIM , Woojin CHANG , Sang-Heung LEE , Dong-Young KIM , Hae Cheon KIM
IPC分类号： H03F3/04
CPC分类号： H03F3/24 , H03F1/565 , H03F3/195 , H03F2200/222
摘要： Provided is a power amplifier including: a depletion mode high electron mobility transistor (D-mode HEMT) configured to amplify a signal inputted to a gate terminal and output the amplified signal through a drain terminal; an input matching circuit configured to serially ground the gate terminal; and a DC bias circuit connected between the drain terminal and a ground. Through the foregoing configuration, the HEMT may be biased only by a single DC bias circuit without any biasing means to provide a negative voltage. Also, superior matching characteristic may be provided in various operation frequency bands through a shunt inductor and a choke inductor.
摘要翻译：提供了一种功率放大器，包括：耗尽型高电子迁移率晶体管（D模式HEMT），被配置为放大输入到栅极端子的信号，并通过漏极端子输出放大的信号; 输入匹配电路，被配置为使所述栅极端子串联接地; 以及连接在漏极端子和地之间的DC偏置电路。通过上述配置，HEMT可以仅由单个DC偏置电路偏压而没有任何偏置装置来提供负电压。此外，可以通过并联电感器和扼流电感器在各种工作频带中提供优异的匹配特性。

33. 发明授权

US07889023B2 Switching circuit for millimeter waveband control circuit 有权
标题翻译：毫米波段控制电路的开关电路
公开(公告)号：US07889023B2
公开(公告)日：2011-02-15
申请号：US12139046
申请日：2008-06-13
申请人： Jae Kyoung Mun , Dong Young Kim , Jong Won Lim , Ho Kyun Ahn , Hae Cheon Kim , Hyun Kyu Yu
发明人： Jae Kyoung Mun , Dong Young Kim , Jong Won Lim , Ho Kyun Ahn , Hae Cheon Kim , Hyun Kyu Yu
IPC分类号： H01P1/10 , H01P3/08
CPC分类号： H03K17/063 , H01P1/15 , H03K17/693 , H03K2017/066
摘要： Provided is a switching circuit for a millimeter waveband control circuit. The switching circuit for a millimeter waveband control circuit includes a switching cell disposed on a signal port path to match an interested frequency and including at least one transistor coupled vertically to an input/output transmission line and a plurality of ground via holes disposed symmetrically in an upper portion and a lower portion of the input/output transmission line; capacitors for stabilizing a bias of the switching cell; and bias pads coupled in parallel to the capacitor to control the switching cell. Therefore, the switching circuit may be useful to improve its isolation by simplifying its design and layout through the use of symmetrical structure of optimized switching cells without the separate use of different switch elements, and also to reduce its manufacturing cost through the improved yield of the manufacturing process and the enhanced integration since it is possible to reduce a chip size of an integrated circuit in addition to its low insertion loss.
摘要翻译：提供了一种用于毫米波段控制电路的开关电路。毫米波段控制电路的开关电路包括设置在信号端口路径上以匹配感兴趣频率并且包括垂直于输入/输出传输线耦合的至少一个晶体管的开关单元和对称地布置在其中的多个接地通孔输入/输出传输线的上部和下部; 用于稳定开关电池的偏置的电容器; 以及与电容器并联耦合的偏置焊盘以控制开关单元。因此，切换电路可能有助于通过简化其设计和布局来改善其隔离，通过使用优化的开关电池的对称结构，而不需要分开使用不同的开关元件，并且还可以通过提高产量来提高其制造成本制造工艺和增强的集成，因为除了低插入损耗之外，可以减小集成电路的芯片尺寸。

34. 发明申请

US20100133551A1 HIGH-SPEED OPTICAL INTERCONNECTION DEVICE 有权
标题翻译：高速光学互连器件
公开(公告)号：US20100133551A1
公开(公告)日：2010-06-03
申请号：US12421130
申请日：2009-04-09
申请人： Sang-Heung Lee , Hae Cheon Kim , Dong Min Kang , Dong-Young Kim , Jae-Kyoung Mun , Hokyun Ahn , Jong-Won Lim , Woo Jin Chang , Hong Gu Ji , Eun Soo Nam
发明人： Sang-Heung Lee , Hae Cheon Kim , Dong Min Kang , Dong-Young Kim , Jae-Kyoung Mun , Hokyun Ahn , Jong-Won Lim , Woo Jin Chang , Hong Gu Ji , Eun Soo Nam
IPC分类号： H01L31/147 , H01L33/00
CPC分类号： H01L25/167 , H01L2224/0603 , H01L2224/45014 , H01L2224/48137 , H01L2224/4903 , H01L2224/73265 , H01L2924/1305 , H01L2924/30107 , H01L2924/00
摘要： Provided is a high-speed optical interconnection device. The high-speed optical interconnection device includes a first semiconductor chip, light emitters, optical detectors, and a second semiconductor chip, which are disposed on a silicon-on-insulator (SOI) substrate. The light emitters receive electrical signals from the first semiconductor chip to output optical signals. The optical detectors detect the optical signals to convert the optical signals into electrical signals. The second semiconductor chip receives the electrical signals converted by the optical detectors.
摘要翻译：提供了一种高速光互连装置。高速光互连装置包括设置在绝缘体上硅（SOI））衬底上的第一半导体芯片，发光体，光检测器和第二半导体芯片。光发射器接收来自第一半导体芯片的电信号以输出光信号。光检测器检测光信号，将光信号转换为电信号。第二半导体芯片接收由光学检测器转换的电信号。

35. 发明授权

US07564965B2 Wire communication terminal having LCD module 失效
标题翻译：具有LCD模块的有线通信终端
公开(公告)号：US07564965B2
公开(公告)日：2009-07-21
申请号：US11411841
申请日：2006-04-27
申请人： Sang-Moon Ahn , Jong-Won Lim
发明人： Sang-Moon Ahn , Jong-Won Lim
IPC分类号： H04M1/00 , H04M9/00
CPC分类号： H04M1/0295
摘要： A wire communication terminal has a position adjusting member which allows an LCD module to slide to any angle within a predetermined rotational range. The terminal includes a first case having a through hole, a guide member fixed to a rear surface of the first case, a slide member having a circular arc shape provided at one side of the LCD module, and a cover member having a circular arc shape fixed to a rear surface of the first case. Arranged in this manner, the slide member can slide along a rear surface of the guide member to an optimal desired viewing angle.
摘要翻译：线路通信终端具有位置调节构件，其允许LCD模块在预定旋转范围内滑动到任何角度。端子包括具有通孔的第一壳体，固定到第一壳体的后表面的引导构件，设置在LCD模块的一侧的具有圆弧形状的滑动构件和具有圆弧形状的盖构件固定到第一壳体的后表面。以这种方式布置，滑动构件可以沿着引导构件的后表面滑动到最佳期望的视角。

36. 发明申请

US20090146184A1 SEMICONDUCTOR DEVICE WITH T-GATE ELECTRODE AND METHOD FOR FABRICATING THE SAME 失效
标题翻译：具有T型电极的半导体器件及其制造方法
公开(公告)号：US20090146184A1
公开(公告)日：2009-06-11
申请号：US12122982
申请日：2008-05-19
申请人： Jong Won LIM , Ho Kyun AHN , Hong Gu JI , Woo Jin CHANG , Jae Kyoung MUN , Hae Cheon KIM , Hyun Kyu YU
发明人： Jong Won LIM , Ho Kyun AHN , Hong Gu JI , Woo Jin CHANG , Jae Kyoung MUN , Hae Cheon KIM , Hyun Kyu YU
IPC分类号： H01L29/812 , H01L21/335
CPC分类号： H01L29/778 , H01L29/20 , H01L29/42316 , H01L29/66462
摘要： Provided are a semiconductor device with a T-gate electrode capable of improving stability and a high frequency characteristic of the semiconductor device by reducing source resistance, parasitic capacitance, and gate resistance and a method of fabricating the same. In the semiconductor device, in order to form source and drain electrodes and the T-gate electrode on a substrate, first and second protective layers constructed with silicon oxide layers or silicon nitride layers are formed on sides of a supporting part under a head part of the T-gate electrode, and the second protective layer constructed with a silicon oxide layer or silicon nitride layer is formed on sides of the source and drain electrodes. Accordingly, it is possible to protect an activated region of the semiconductor device and reduce gate-drain parasitic capacitance and gate-source parasitic capacitance.
摘要翻译：提供一种具有T栅电极的半导体器件及其制造方法，该半导体器件能够通过降低源极电阻，寄生电容和栅极电阻来提高半导体器件的稳定性和高频特性。在半导体器件中，为了在衬底上形成源电极和漏电极以及T栅电极，在氧化硅层或氮化硅层构成的第一和第二保护层形成在支撑部分的头部在栅电极和漏电极的侧面上形成T形栅电极和由氧化硅层或氮化硅层构成的第二保护层。因此，可以保护半导体器件的激活区域并减小栅极 - 漏极寄生电容和栅极 - 源极寄生电容。

37. 发明授权

US07429894B2 Power device having connection structure compensating for reactance component of transmission line 失效
标题翻译：具有补偿传输线电抗分量的连接结构的功率器件
公开(公告)号：US07429894B2
公开(公告)日：2008-09-30
申请号：US11519668
申请日：2006-09-12
申请人： Woo Jin Chang , Jae Kyoung Mun , Haecheon Kim , Jong Won Lim , Hong Gu Ji , Ho Kyun Ahn
发明人： Woo Jin Chang , Jae Kyoung Mun , Haecheon Kim , Jong Won Lim , Hong Gu Ji , Ho Kyun Ahn
IPC分类号： H03F3/68
CPC分类号： H03F3/602 , H03F3/211 , H03F2200/366 , H03F2200/447 , H03F2200/543 , H03F2203/21178
摘要： Provided is a power device having a connection structure compensating for a reactance component, in which transistors are arranged and connected to minimize deterioration of transistor properties caused by heat by compensating for a reactance component causing a phase difference due to transmission lines used for connecting a plurality of transistors in parallel such that the power device to be used for a high-frequency power amplifier outputs high power, and transmitting heat generated by high output power to a heat sink to be dissipated.
摘要翻译：提供了具有补偿电抗分量的连接结构的功率器件，其中配置并连接晶体管，以通过补偿导致由于用于连接多个元件的传输线引起的相位差的电抗分量来最小化由热引起的晶体管性质的劣化的晶体管并联，使得用于高频功率放大器的功率器件输出高功率，并将由高输出功率产生的热量传输到散热器。

38. 发明申请

US20060268188A1 Wire communication terminal having LCD module 失效
公开(公告)号：US20060268188A1
公开(公告)日：2006-11-30
申请号：US11411841
申请日：2006-04-27
申请人： Sang-Moon Ahn , Jong-Won Lim
发明人： Sang-Moon Ahn , Jong-Won Lim
IPC分类号： G02F1/1333
CPC分类号： H04M1/0295
摘要： A wire communication terminal has a position adjusting member which allows an LCD module to slide to any angle within a predetermined rotational range. The terminal includes a first case having a through hole, a guide member fixed to a rear surface of the first case, a slide member having a circular arc shape provided at one side of the LCD module, and a cover member having a circular arc shape fixed to a rear surface of the first case. Arranged in this manner, the slide member can slide along a rear surface of the guide member to an optimal desired viewing angle.

39. 发明授权

US06541319B2 Method of manufacturing a self-aligned gate transistor with P-type impurities selectively implanted below the gate, source and drain electrodes 有权
标题翻译：制造具有P型杂质的自对准栅极晶体管的方法，其选择性地注入栅极，源极和漏极之下
公开(公告)号：US06541319B2
公开(公告)日：2003-04-01
申请号：US10032754
申请日：2001-12-26
申请人： Jae Kyoung Mun , Hea Cheon Kim , Jong Won Lim
发明人： Jae Kyoung Mun , Hea Cheon Kim , Jong Won Lim
IPC分类号： H01L21338
CPC分类号： H01L29/66848
摘要： The present invention provides a self-aligned gate transistor. The present invention implants P-type impurity ions only below a channel region below a gate and below a source and drain electrode on semiconductor substrate having an ion implantation channel layer without implanting the P-type impurity ions into a narrow region between the source-gate and the gate-drain, deposits a gate metal and etches the gate pattern. In this case, the length (Lg) of the gate is defined to be narrower than the length (Lch-g) into which P-type impurity ions are implanted below the channel layer, thus improving a pinch-off characteristic. A method of manufacturing a field effect transistor having a self aligned gate according to the present invention comprises the steps of implanting P-type impurity ions only below a channel region below a gate and below a source and drain electrode; and depositing a refractory gate metal having a good high temperature stability to form a gate pattern using a dry etch method.
摘要翻译：本发明提供一种自对准栅极晶体管。本发明仅在栅极下方的沟道区域的下方并且在具有离子注入沟道层的半导体衬底上的源极和漏极电极下方注入P型杂质离子，而不将P型杂质离子注入到源极栅极之间的窄区域并且栅极 - 漏极沉积栅极金属并蚀刻栅极图案。在这种情况下，栅极的长度（Lg）被定义为比在沟道层下方注入P型杂质离子的长度（Lch-g）窄，从而提高夹断特性。根据本发明的制造具有自对准栅极的场效应晶体管的方法包括以下步骤：将P型杂质离子注入仅在栅极下方的沟道区域的下方以及源极和漏极之下; 以及沉积具有良好的高温稳定性的难熔栅极金属，以使用干蚀刻法形成栅极图案。

40. 发明授权

US08853821B2 Vertical capacitors and methods of forming the same 有权
标题翻译：垂直电容器及其形成方法
公开(公告)号：US08853821B2
公开(公告)日：2014-10-07
申请号：US13618873
申请日：2012-09-14
申请人： Seong-il Kim , Sang-Heung Lee , Jong-Won Lim , Hyung Sup Yoon , Jongmin Lee , Byoung-Gue Min , Jae Kyoung Mun , Eun Soo Nam
发明人： Seong-il Kim , Sang-Heung Lee , Jong-Won Lim , Hyung Sup Yoon , Jongmin Lee , Byoung-Gue Min , Jae Kyoung Mun , Eun Soo Nam
IPC分类号： H01L21/02
CPC分类号： H01L28/91 , H01L23/481 , H01L28/92 , H01L2924/0002 , H01L2924/00
摘要： Provided are vertical capacitors and methods of forming the same. The formation of the vertical capacitor may include forming input and output electrodes on a top surface of a substrate, etching a bottom surface of the substrate to form via electrodes, and then, forming a dielectric layer between the via electrodes. As a result, a vertical capacitor with high capacitance can be provided in a small region of the substrate.
摘要翻译：提供垂直电容器及其形成方法。垂直电容器的形成可以包括在衬底的顶表面上形成输入和输出电极，蚀刻衬底的底表面以形成通孔电极，然后在通孔电极之间形成电介质层。结果，可以在基板的小区域中提供具有高电容的垂直电容器。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式