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21. 发明授权

US5506536A Differential amplifier with exponential gain characteristic 失效
公开(公告)号：US5506536A
公开(公告)日：1996-04-09
申请号：US357605
申请日：1994-12-14
申请人： Pak-Ho Yeung
发明人： Pak-Ho Yeung
IPC分类号： G06G7/24 , H03F1/32 , H03F3/45
CPC分类号： G06G7/24 , H03F1/3211 , H03F3/45103 , H03F2203/45022 , H03F2203/45024 , H03F2203/45251 , H03F2203/45471 , H03F2203/45561 , H03F2203/45612
摘要： A differential amplifier provides a predetermined gain characteristic over a large range differential input voltage signals and operating temperatures. The differential amplifier receives a first differential input voltage signal at a pair of amplifier input terminals and outputs a differential output current signal at a pair of amplifier output terminals. First and second emitter-coupled transistors are connected to receive at their bases an amplifier core differential voltage signal, have their emitters coupled to receive first and second constant currents and coupled together by a load element. The first and second emitter follower transistors have their bases coupled to the amplifier input terminals to receive the first differential input voltage signal from the pair of amplifier input terminals. The emitters of the first and second emitter follower transistors are coupled to provide the amplifier core differential voltage signal to the bases of the first and second emitter-coupled transistors, respectively. A VBE difference replicator receives the current in the collectors of the first and second emitter-coupled transistors and provides, responsive to the emitter-coupled transistors' collector currents, a replicated voltage that substantially replicates a voltage difference between the VBE of the first emitter-coupled transistor and the VBE of the second emitter-coupled transistor. An adaptive current source receives current from the emitters of the first and second emitter followers. The adaptive current source also receives the replicated voltage from the VBE difference replicator. The adaptive current source means draws a differential correcting current signal through the first and second emitter followers responsive to the replicated voltage. As a result, a difference between the VBE of the first emitter follower and the VBE of the second emitter follower compensates the amplifier core differential voltage to correct for a difference between the VBE of the first emitter-coupled transistor and the VBE of the second emitter-coupled transistor.

22. 发明专利

JP2012503441A Bias current generation that depends on the active time for the switched-capacitor circuit 有权
公开(公告)号：JP2012503441A
公开(公告)日：2012-02-02
申请号：JP2011527969
申请日：2009-09-17
申请人：クゥアルコム・インコーポレイテッドQualcomm Incorporated
发明人：リー、チュン・シー．
IPC分类号： H03F1/02 , H03F3/70 , H03M1/12 , H03M3/02
CPC分类号： H03F3/45183 , H03F1/0261 , H03F3/005 , H03F2203/45166 , H03F2203/45244 , H03F2203/45321 , H03F2203/45461 , H03F2203/45466 , H03F2203/45471 , H03F2203/45512 , H03F2203/45551 , H03F2203/45561 , H03F2203/45616 , H03F2203/45674
摘要： Exemplary embodiments of the disclosure include adaptively generating a bias current for a switched-capacitor circuit. An exemplary apparatus includes a first phase signal and a second phase signal operating at a sampling rate. An asserted time of the first phase signal and an asserted time of the second phase signal are separated by a predefined non-overlap time. The apparatus also includes a switched-capacitor circuit with a plurality of switched capacitors operably coupled to the first phase signal and the second phase signal. An amplifier is operably coupled to the switched-capacitor circuit and has a response time inversely proportional to an adaptive bias current. A bias generator is coupled to the amplifier and operates to modify the adaptive bias current responsive to the asserted time of the first phase signal.

23. 发明公开

EP2136420A4 MAGNETIC COUPLER ELEMENT AND MAGNETIC COUPLING TYPE ISOLATOR 审中-公开
标题翻译：磁性耦合器元件和磁耦合隔离器
公开(公告)号：EP2136420A4
公开(公告)日：2015-11-04
申请号：EP08704271
申请日：2008-01-31
申请人： OMRON TATEISI ELECTRONICS CO , RES INST FOR ELECTRIC AND MAGNETIC MATERIALS
发明人： YAMAMOTO MASAAKI , KARIYA YUICHI , TOSHIMA KATSUHISA , KOBAYASHI NOBUKIYO , YANO TAKESHI
IPC分类号： H01L43/08 , H01F38/14 , H04B3/02 , H04B5/00
CPC分类号： H04B5/00 , H01F5/003 , H01L43/08 , H03F3/181 , H03F3/189 , H03F3/45475 , H03F3/45991 , H03F2200/03 , H03F2200/451 , H03F2200/78 , H03F2203/45538 , H03F2203/45554 , H03F2203/45561 , H03F2203/45576 , H03F2203/45591 , H03F2203/45594 , H03F2203/45621

24. 发明公开

EP2353220A1 ACTIVE-TIME DEPENDENT BIAS CURRENT GENERATION FOR SWITCHED-CAPACITOR CIRCUITS 有权
标题翻译：关于电路活动时间依赖性VORMAGNETISIERUNGSSTROMERZEUGUNG容量SWITCHED
公开(公告)号：EP2353220A1
公开(公告)日：2011-08-10
申请号：EP09792677.8
申请日：2009-09-17
申请人： QUALCOMM Incorporated
发明人： LEE, Chun C.
IPC分类号： H03F1/02 , H03F3/00 , H03F3/45
CPC分类号： H03F3/45183 , H03F1/0261 , H03F3/005 , H03F2203/45166 , H03F2203/45244 , H03F2203/45321 , H03F2203/45461 , H03F2203/45466 , H03F2203/45471 , H03F2203/45512 , H03F2203/45551 , H03F2203/45561 , H03F2203/45616 , H03F2203/45674
摘要： Exemplary embodiments of the disclosure include adaptively generating a bias current for a switched-capacitor circuit. An exemplary apparatus includes a first phase signal and a second phase signal operating at a sampling rate. An asserted time of the first phase signal and an asserted time of the second phase signal are separated by a predefined non-overlap time. The apparatus also includes a switched-capacitor circuit with a plurality of switched capacitors operably coupled to the first phase signal and the second phase signal. An amplifier is operably coupled to the switched-capacitor circuit and has a response time inversely proportional to an adaptive bias current. A bias generator is coupled to the amplifier and operates to modify the adaptive bias current responsive to the asserted time of the first phase signal.

25. 发明申请

WO2017092980A1 AMPLIFIER ARRANGEMENT AND SWITCHED CAPACITOR INTEGRATOR 审中-公开
标题翻译：放大器布置和开关电容集成器
公开(公告)号：WO2017092980A1
公开(公告)日：2017-06-08
申请号：PCT/EP2016/076999
申请日：2016-11-08
申请人： AMS AG
发明人： STEINER, Matthias , FITZI, Andreas
IPC分类号： H03F1/26 , H03F3/00 , H03F3/45 , H03F3/42
CPC分类号： H03F1/26 , H03F3/005 , H03F3/423 , H03F3/4521 , H03F3/45645 , H03F2200/129 , H03F2200/264 , H03F2200/372 , H03F2200/555 , H03F2200/75 , H03F2203/45082 , H03F2203/45088 , H03F2203/45091 , H03F2203/45116 , H03F2203/45134 , H03F2203/45156 , H03F2203/45171 , H03F2203/45174 , H03F2203/45208 , H03F2203/45221 , H03F2203/45244 , H03F2203/45352 , H03F2203/45416 , H03F2203/45434 , H03F2203/45481 , H03F2203/45512 , H03F2203/45544 , H03F2203/45551 , H03F2203/45561 , H03F2203/45616
摘要： An amplifier arrangement has a first differential stage with a first transistor pair, a second differential stage with a first and a second transistor pair, each pair having a common source connection coupled to a drain terminal to a respective one of the transistors of the first differential stage. The amplifier arrangement further has a first complementary differential stage with a transistor pair having opposite conductivity type compared to the transistor pair of the first differential stage, and a second complementary differential stage with a first and a second transistor pair of the complementary conductivity type. The first and the second complementary differential stage are connected symmetrically compared to the first and the second differential stage. The transistors of the second complementary differential stage are symmetrically connected to the transistors of the second differential stage such that respective first, second, third and fourth current paths are formed. A pair of output terminals is coupled to the first and the fourth current path. Gate terminals of the transistors of each of the stages are coupled to a respective pair of input terminals.
摘要翻译：放大器装置具有带有第一晶体管对的第一差分级，具有第一和第二晶体管对的第二差分级，每一对具有公共源极连接，该公共源极连接耦合至漏极端子第一差分级的一个晶体管。放大器装置还具有第一互补差分级和第二互补差分级，第一互补差分级具有与第一差分级的晶体管对相比导电类型相反的晶体管对，第二互补差分级具有互补导电类型的第一和第二晶体管对。与第一和第二差动级相比，第一和第二互补差动级对称地连接。第二互补差分级的晶体管对称地连接到第二差分级的晶体管，使得分别形成第一，第二，第三和第四电流路径。一对输出端子耦合到第一和第四电流路径。每个级的晶体管的栅极端子耦合到相应的一对输入端子。

26. 发明申请

WO2013108499A1 半導体集積回路审中-公开
标题翻译：半导体集成电路
公开(公告)号：WO2013108499A1
公开(公告)日：2013-07-25
申请号：PCT/JP2012/081456
申请日：2012-12-05
申请人：三菱電機株式会社 , 冨澤淳 , 西川和康 , 諸熊健一
发明人：冨澤　淳 , 西川　和康 , 諸熊　健一
IPC分类号： H03F1/34 , G01D5/24 , G01R27/26 , H03F3/70
CPC分类号： G01R27/2605 , H03F3/45192 , H03F3/45475 , H03F3/45932 , H03F2203/45422 , H03F2203/45424 , H03F2203/45512 , H03F2203/45536 , H03F2203/45544 , H03F2203/45561 , H03F2203/45674 , H03F2203/45676
摘要：　連続時間型ＣＶ変換器を構成する半導体集積回路において、ＭＯＳ抵抗の高抵抗状態を維持可能な技術を提供することを目的とする。半導体集積回路は、一対の容量型センサＣＳＮ，ＣＳＰと、差動増幅器Ａ１と、直列接続された導電型が互いに異なる第１ＭＯＳトランジスタ対ＭＮ１，ＭＰ１を有する第１ＭＯＳ抵抗Ｒ１と、直列接続された導電型が互いに異なる第２ＭＯＳトランジスタ対ＭＮ２，ＭＰ２を有する第２ＭＯＳ抵抗Ｒ２と、第１負荷容量ＣＬＰと、第２負荷容量ＣＬＮと、バイアス回路Ｂとを備える。バイアス回路Ｂは、差動増幅器Ａ１の差動出力端子の電圧に基づいて、第１及び第２ＭＯＳ抵抗Ｒ１，Ｒ２の抵抗を制御する。
摘要翻译：本发明的目的是提供一种在构成连续C-V转换器的半导体集成电路中可以保持MOS电阻的高电阻状态的技术。该半导体集成电路具备：一对电容式传感器（CSN，CSP）; 差分放大器（A1）; 第一MOS电阻器（R1），其包括串联连接的导电类型不同的一对第一MOS晶体管（MN1，MP1）; 第二MOS电阻器（R2），其包括串联连接的导电类型不同的一对第二MOS晶体管（MN2，MP2）; 第一负载电容（CLP）; 第二负载电容（CLN）; 和偏置电路（B）。偏置电路（B）基于差分放大器（A1）的差分输出端子处的电压来控制第一和第二MOS电阻器（R1，R2）的电阻。

27. 发明申请

US20140077882A1 System and Method for a Programmable Gain Amplifier 有权
标题翻译：可编程增益放大器的系统和方法
公开(公告)号：US20140077882A1
公开(公告)日：2014-03-20
申请号：US13623583
申请日：2012-09-20
申请人： INFINEON TECHNOLOGIES AG
发明人： Dieter Draxelmayr , Michael Kropfitsch , Jose Luis Ceballos
IPC分类号： H03G3/00
CPC分类号： H03F3/005 , H03F3/45475 , H03F2200/411 , H03F2203/45512 , H03F2203/45544 , H03F2203/45561 , H03G1/0094
摘要： In accordance with an embodiment, a system includes a programmable gain amplifier having a switchable feedback capacitor coupled in parallel with a first capacitor and a controller. The controller is configured to couple the feedback capacitor between an input node of the programmable gain amplifier and an output node of the programmable gain amplifier in a first gain setting, and switch a first terminal of the feedback capacitor from the output of the programmable gain amplifier to a reference node while a second terminal of the feedback capacitor remains coupled to the input node of the programmable gain amplifier for a first time period when transitioning from the first gain setting to a second gain setting.
摘要翻译：根据实施例，系统包括可编程增益放大器，其具有与第一电容器和控制器并联耦合的可切换反馈电容器。控制器被配置为在第一增益设置中将可编程增益放大器的输入节点和可编程增益放大器的输出节点之间的反馈电容器耦合，并且从可编程增益放大器的输出端切换反馈电容器的第一端子到反馈电容器的第二端子在从第一增益设置转换到第二增益设置的第一时间段期间保持耦合到可编程增益放大器的输入节点。

28. 发明申请

US20130229211A1 TRANSMISSION/RECEPTION DEVICE AND INFORMATION PROCESSING DEVICE 有权
标题翻译：传输/接收设备和信息处理设备
公开(公告)号：US20130229211A1
公开(公告)日：2013-09-05
申请号：US13866061
申请日：2013-04-19
申请人： FUJITSU LIMITED
发明人： Ryuichi Nishiyama , Jun Yamada , Naoya Shibayama
IPC分类号： H03H11/26 , H03L7/00
CPC分类号： H03H11/265 , H03F3/195 , H03F3/45183 , H03F2203/45544 , H03F2203/45548 , H03F2203/45561 , H03F2203/45674 , H03L7/00 , H03L7/0814 , H04L25/0274 , H04L25/028 , H04L25/0292
摘要： A transmission/reception device includes a transmission circuit configured to apply a delay to at least one of a positive signal and a negative signal of differential signals to be sent to another device, detect a direction of a differential signal skew between the positive signal and the negative signal, to at least one of which the delay is applied, and control the delay in a manner as to reduce the differential signal skew; and a reception circuit configured to apply a delay to at least one of a positive signal and a negative signal of differential signals sent from another transmission/reception device, detect a direction of a differential signal skew between the positive signal and the negative signal, to at least one of which the delay is applied, and control the delay in a manner as to reduce the differential signal skew.
摘要翻译：发送/接收装置包括：发送电路，被配置为对要发送到另一个设备的差分信号的正信号和负信号中的至少一个施加延迟，检测正信号和正信号之间的差分信号偏移的方向负信号到其中施加了延迟的至少一个，并且以减少差分信号偏移的方式来控制延迟; 以及接收电路，被配置为对从另一发送/接收装置发送的差分信号的正信号和负信号中的至少一个施加延迟，检测正信号和负信号之间的差分信号偏差的方向，其中施加了延迟中的至少一个，并且以减少差分信号偏移的方式来控制延迟。

29. 发明授权

US08400748B2 Magnetic coupler device and magnetically coupled isolator 失效
标题翻译：磁耦合器件和磁耦合隔离器
公开(公告)号：US08400748B2
公开(公告)日：2013-03-19
申请号：US12531042
申请日：2008-01-31
申请人： Masaaki Yamamoto , Yuichi Kariya , Katsuhisa Toshima , Nobukiyo Kobayashi , Takeshi Yano
发明人： Masaaki Yamamoto , Yuichi Kariya , Katsuhisa Toshima , Nobukiyo Kobayashi , Takeshi Yano
IPC分类号： H01H47/00
CPC分类号： H04B5/00 , H01F5/003 , H01L43/08 , H03F3/181 , H03F3/189 , H03F3/45475 , H03F3/45991 , H03F2200/03 , H03F2200/451 , H03F2200/78 , H03F2203/45538 , H03F2203/45554 , H03F2203/45561 , H03F2203/45576 , H03F2203/45591 , H03F2203/45594 , H03F2203/45621
摘要： In a magnetic coupler device comprising: a magnetic field generation circuit generating a magnetic field according to an input current; and a detection bridge circuit including a pair of magnetoresistance effect devices, a resistance value of each of the magnetoresistance effect devices changing by applying a magnetic field generated by said magnetic field generation circuit to each of the magnetoresistance effect devices, and having two outputs between which a voltage difference is generated according to an intensity of the magnetic field generated by said magnetic field generation circuit, by forming a geometric shape of each of said magnetic field generation circuit and said detection bridge circuit in line symmetric or point symmetric, a high S/N ratio is obtained even with high frequency.
摘要翻译：一种磁耦合装置，包括：磁场产生电路，根据输入电流产生磁场; 以及包括一对磁阻效应器件的检测桥电路，每个磁阻效应器件的电阻值通过将由所述磁场产生电路产生的磁场施加到每个磁阻效应器件而变化，并且具有两个输出根据由所述磁场产生电路产生的磁场的强度，通过以线对称或点对称的方式形成所述磁场产生电路和所述检测桥式电路中的每一个的几何形状，产生电压差，高S / 即使在高频下也能获得N比。

30. 发明授权

US08154337B1 Apparatus and method for automated offset reduction in matched differential input devices 有权
标题翻译：匹配差分输入装置自动偏移减少的装置和方法
公开(公告)号：US08154337B1
公开(公告)日：2012-04-10
申请号：US12455656
申请日：2009-06-04
申请人： Benjamin Hoomes , Adam Abed
发明人： Benjamin Hoomes , Adam Abed
IPC分类号： H03F1/02
CPC分类号： H03F3/187 , H03F3/195 , H03F3/245 , H03F3/45085 , H03F3/45183 , H03F3/45282 , H03F3/45381 , H03F3/45475 , H03F3/45753 , H03F3/45762 , H03F3/45771 , H03F3/45986 , H03F2200/411 , H03F2200/78 , H03F2203/45522 , H03F2203/45528 , H03F2203/45561 , H03F2203/45591 , H03F2203/45594 , H03F2203/45618 , H03F2203/45641 , H03F2203/45726
摘要： An amplifier includes an input stage, a comparator coupled to an output of the differential input stage, and a trimming controller coupled to an output of the comparator. The input stage includes a plurality of trim devices coupled in parallel with a first input device. The trimming controller is adapted to configure the trim devices based on an output of the comparator. The trim devices may selectively control a total effective device area of the first input device. Each of the trim devices, when enabled, may add a specified area to the total effective device area of the first input device. The input stage may also include a second plurality of trim devices coupled in parallel with a second input device.
摘要翻译：放大器包括输入级，耦合到差分输入级的输出的比较器和耦合到比较器的输出的微调控制器。输入级包括与第一输入装置并联耦合的多个修整装置。修整控制器适于基于比较器的输出来配置修整装置。装饰装置可以选择性地控制第一输入装置的总有效装置区域。每个修剪设备启用时，可以将指定的区域添加到第一输入设备的总有效设备区域。输入级还可以包括与第二输入装置并联耦合的第二多个修整装置。

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