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21. 发明申请

US20080106641A1 METHOD FOR CONTROLLING DISPLAY DEVICE 有权
标题翻译：用于控制显示装置的方法
公开(公告)号：US20080106641A1
公开(公告)日：2008-05-08
申请号：US11936058
申请日：2007-11-06
申请人： Yu-Pin Chou
发明人： Yu-Pin Chou
IPC分类号： H04N7/01
CPC分类号： H04N7/0122 , G09G3/20 , G09G2310/0232 , G09G2340/0407 , G09G2340/0442 , G09G2340/0464
摘要： A method for controlling a display device is disclosed. The method includes receiving an input video image having a plurality of active scan lines, controlling the display device to display a plurality of background scan lines on a first display area with a first scan line frequency, and controlling the display device to display an output image on a second display area with a second scan line frequency. A second aspect ratio of the output image is substantially equal to a first aspect ratio of the input video image. The second scan line frequency is substantially lower than the first scan line frequency.
摘要翻译：公开了一种用于控制显示装置的方法。该方法包括：接收具有多条主动扫描线的输入视频图像，控制显示装置在具有第一扫描线频率的第一显示区域上显示多条背景扫描线，并且控制显示装置显示输出图像在具有第二扫描线频率的第二显示区域上。输出图像的第二宽高比基本上等于输入视频图像的第一宽高比。第二扫描线频率基本上低于第一扫描线频率。

22. 发明申请

US20080062185A1 FRAME SYNCHRONIZATION METHOD AND DEVICE UTILIZING FRAME BUFFER 有权
标题翻译：框架同步方法和使用框架缓冲器的设备
公开(公告)号：US20080062185A1
公开(公告)日：2008-03-13
申请号：US11531281
申请日：2006-09-13
申请人： Jin-Sheng Gong , Yu-Pin Chou , Hsu-Jung Tung
发明人： Jin-Sheng Gong , Yu-Pin Chou , Hsu-Jung Tung
IPC分类号： G09G5/36
CPC分类号： G09G5/37 , G06F3/14 , G09G5/12 , G09G2340/0435 , G09G2340/10
摘要： A frame synchronization method includes: temporarily storing input data of at least one source frame in a frame buffer according to an input time sequence; generating an output time sequence according to the input time sequence and a delay time; generating output data of a destination frame according to the input data of the source frame; and outputting the output data of the destination frame according to an output time sequence; wherein an average frame rate of the source frame is substantially the same as that of the destination frame.
摘要翻译：帧同步方法包括：根据输入的时间序列临时存储帧缓冲器中的至少一个源帧的输入数据; 根据输入时间序列和延迟时间生成输出时间序列; 根据源帧的输入数据生成目的地帧的输出数据; 并根据输出时间序列输出目的地帧的输出数据; 其中所述源帧的平均帧速率与所述目的地帧的平均帧速率基本相同。

23. 发明申请

US20080007656A1 Sync signal acquisition device 有权
标题翻译：同步信号采集装置
公开(公告)号：US20080007656A1
公开(公告)日：2008-01-10
申请号：US11822392
申请日：2007-07-05
申请人： Jui-Yuan Tsai , Szu-Ping Chen , Yu-Pin Chou
发明人： Jui-Yuan Tsai , Szu-Ping Chen , Yu-Pin Chou
IPC分类号： H04N5/06 , H04N9/72
CPC分类号： H04N5/08 , H04N5/185 , H04N9/44
摘要： A sync signal acquisition device is disclosed which comprises a transistor, a resistor, a clamper, an analog multiplexer and a comparator. While operating in a composite HS mode, prior to the generation of the sync signal HS, the invention uses a conventional circuit to extract a composite sync signal at start-up, thereby allowing related circuits to generate the sync signal HS and a clamping signal. Then, a mode selecting signal is used to disable the automatic clamping mode and switch the analog multiplexer to a forced clamping mode. At this point, the output voltage of the damper is set by a user instead of process; accordingly, the DC voltage level is more controllable, but not subject to drift due to process changes or temperature changes.
摘要翻译：公开了一种同步信号采集装置，其包括晶体管，电阻器，钳位器，模拟多路复用器和比较器。当在复合HS模式下操作时，在产生同步信号HS之前，本发明使用常规电路在启动时提取复合同步信号，从而允许相关电路产生同步信号HS和钳位信号。然后，使用模式选择信号来禁用自动钳位模式并将模拟多路复用器切换到强制钳位模式。此时，阻尼器的输出电压由使用者而不是过程设定; 因此，直流电压电平更可控，但由于过程变化或温度变化而不会发生漂移。

24. 发明申请

US20060092172A1 METHOD AND APPARATUS FOR NON-LINEAR DITHERING OF IMAGES 有权
标题翻译：用于非线性图像的方法和装置
公开(公告)号：US20060092172A1
公开(公告)日：2006-05-04
申请号：US11163887
申请日：2005-11-02
申请人： Hsu-Jung Tung , Chun-Hsing Hsieh , Yu-Pin Chou , Hsien-Chun Chang
发明人： Hsu-Jung Tung , Chun-Hsing Hsieh , Yu-Pin Chou , Hsien-Chun Chang
IPC分类号： G09G5/02
CPC分类号： G09G3/2055
摘要： A method for dithering an image is disclosed, which includes: storing a plurality of dithering parameters corresponding to a predetermined function for a predetermined input intensity range; and dithering pixels of the predetermined input intensity range according to the plurality of dithering parameters.
摘要翻译：公开了一种用于抖动图像的方法，其包括：在预定的输入强度范围内存储对应于预定功能的多个抖动参数; 以及根据多个抖动参数的预定输入强度范围的抖动像素。

25. 发明授权

US08471958B2 Method for controlling display device 有权
标题翻译：控制显示装置的方法
公开(公告)号：US08471958B2
公开(公告)日：2013-06-25
申请号：US11936058
申请日：2007-11-06
申请人： Yu-Pin Chou
发明人： Yu-Pin Chou
IPC分类号： H04N7/01
CPC分类号： H04N7/0122 , G09G3/20 , G09G2310/0232 , G09G2340/0407 , G09G2340/0442 , G09G2340/0464
摘要： A method for controlling a display device is disclosed. The method includes receiving an input video image having a plurality of active scan lines, controlling the display device to display a plurality of background scan lines on a first display area with a first scan line frequency, and controlling the display device to display an output image on a second display area with a second scan line frequency. A second aspect ratio of the output image is substantially equal to a first aspect ratio of the input video image. The second scan line frequency is substantially lower than the first scan line frequency.
摘要翻译：公开了一种用于控制显示装置的方法。该方法包括：接收具有多条主动扫描线的输入视频图像，控制显示装置在具有第一扫描线频率的第一显示区域上显示多条背景扫描线，并且控制显示装置显示输出图像在具有第二扫描线频率的第二显示区域上。输出图像的第二宽高比基本上等于输入视频图像的第一宽高比。第二扫描线频率基本上低于第一扫描线频率。

26. 发明授权

US08446189B2 Power-on reset circuit 有权
标题翻译：上电复位电路
公开(公告)号：US08446189B2
公开(公告)日：2013-05-21
申请号：US12794227
申请日：2010-06-04
申请人： Yu-Pin Chou , Hsien-Chun Chang , Wen-Che Wu
发明人： Yu-Pin Chou , Hsien-Chun Chang , Wen-Che Wu
IPC分类号： H03L7/00
CPC分类号： H03K17/20
摘要： A power-on reset circuit includes a clamping signal generator and a determining device. The clamping signal generator is adapted to receive a trigger signal, and generates a clamping signal with reference to the trigger signal. The clamping signal generator includes an output unit for generating the clamping signal according to a feedback signal, and a feedback unit for generating the feedback signal according to first and second intermediate signals. The first intermediate signal is generated with reference to the clamping signal. The second intermediate signal is generated according to the trigger signal. The determining device is adapted to receive the trigger signal, is coupled to the clamping signal generator for receiving the clamping signal therefrom, and is operable to generate a reset signal according to the trigger signal and the clamping signal.
摘要翻译：上电复位电路包括钳位信号发生器和确定装置。钳位信号发生器适于接收触发信号，并且参考触发信号产生钳位信号。钳位信号发生器包括用于根据反馈信号产生钳位信号的输出单元和用于根据第一和第二中间信号产生反馈信号的反馈单元。参考钳位信号产生第一中间信号。根据触发信号产生第二中间信号。确定装置适于接收触发信号，耦合到钳位信号发生器用于从其接收钳位信号，并且可操作以根据触发信号和钳位信号产生复位信号。

27. 发明授权

US08180932B2 Signal receiving method for determining transmission format of input signal and related signal receiving circuit 有权
标题翻译：用于确定输入信号和相关信号接收电路的传输格式的信号接收方法
公开(公告)号：US08180932B2
公开(公告)日：2012-05-15
申请号：US12125075
申请日：2008-05-22
申请人： An-Ming Lee , Tzu-Chien Tzeng , Yu-Pin Chou , Tzuo-Bo Lin
发明人： An-Ming Lee , Tzu-Chien Tzeng , Yu-Pin Chou , Tzuo-Bo Lin
IPC分类号： G06F3/00
CPC分类号： H04L25/0272 , H04L25/0262
摘要： The present invention discloses a signal receiving method for determining a transmission format of an input signal and a related signal receiving circuit. The signal receiving method includes: receiving the input signal; generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and determining the transmission format of the input signal according to the signal detecting result. The signal receiving circuit includes: an input interface, for receiving an input signal; a detecting module, for generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and a determining unit, for determining the transmission format of the input signal according to the signal detecting result.
摘要翻译：本发明公开了一种用于确定输入信号和相关信号接收电路的传输格式的信号接收方法。信号接收方法包括：接收输入信号; 根据所述信号传输通道的输出结果产生与至少多个信号传输通道的信号传输通道相对应的信号检测结果; 以及根据信号检测结果确定输入信号的传输格式。信号接收电路包括：输入接口，用于接收输入信号; 检测模块，用于根据所述信号传输通道的输出结果产生与至少多个信号传输通道的信号传输通道相对应的信号检测结果; 以及确定单元，用于根据信号检测结果确定输入信号的传输格式。

28. 发明申请

US20100308877A1 POWER-ON RESET CIRCUIT 有权
标题翻译：上电复位电路
公开(公告)号：US20100308877A1
公开(公告)日：2010-12-09
申请号：US12794227
申请日：2010-06-04
申请人： Yu-Pin Chou , Hsien-Chun Chang , Wen-Che Wu
发明人： Yu-Pin Chou , Hsien-Chun Chang , Wen-Che Wu
IPC分类号： H03L7/00
CPC分类号： H03K17/20
摘要： A power-on reset circuit includes a clamping signal generator and a determining device. The clamping signal generator is adapted to receive a trigger signal, and generates a clamping signal with reference to the trigger signal. The clamping signal generator includes an output unit for generating the clamping signal according to a feedback signal, and a feedback unit for generating the feedback signal according to first and second intermediate signals. The first intermediate signal is generated with reference to the clamping signal. The second intermediate signal is generated according to the trigger signal. The determining device is adapted to receive the trigger signal, is coupled to the clamping signal generator for receiving the clamping signal therefrom, and is operable to generate a reset signal according to the trigger signal and the clamping signal.
摘要翻译：上电复位电路包括钳位信号发生器和确定装置。钳位信号发生器适于接收触发信号，并且参考触发信号产生钳位信号。钳位信号发生器包括用于根据反馈信号产生钳位信号的输出单元和用于根据第一和第二中间信号产生反馈信号的反馈单元。参考钳位信号产生第一中间信号。根据触发信号产生第二中间信号。确定装置适于接收触发信号，耦合到钳位信号发生器用于从其接收钳位信号，并且可操作以根据触发信号和钳位信号产生复位信号。

29. 发明申请

US20080048740A1 METHOD AND APPARATUS FOR GENERATING CLOCK SIGNAL 审中-公开
标题翻译：用于产生时钟信号的方法和装置
公开(公告)号：US20080048740A1
公开(公告)日：2008-02-28
申请号：US11773940
申请日：2007-07-05
申请人： Yu-Pin Chou
发明人： Yu-Pin Chou
IPC分类号： H03L7/06
CPC分类号： H03L7/081
摘要： The present invention relates to an apparatus and a method thereof for generating a clock signal. The apparatus includes a clock generating module and at least one delay stage. The clock generating module receives a reference signal through a first signal path, receives a feedback signal through a second signal path, and provides a clock signal to a third signal path according to the reference signal, wherein the feedback signal corresponds to the clock signal. The at least one delay stage is located on at least one of the first, second, and third signal paths for providing a corresponding delay on the signal path at which the at least one delay stage is positioned.
摘要翻译：本发明涉及一种用于产生时钟信号的装置及其方法。该装置包括时钟产生模块和至少一个延迟级。时钟产生模块通过第一信号路径接收参考信号，通过第二信号路径接收反馈信号，并根据参考信号向第三信号路径提供时钟信号，其中反馈信号对应于时钟信号。所述至少一个延迟级位于所述第一，第二和第三信号路径中的至少一个上，用于在所述至少一个延迟级所位于的信号路径上提供对应的延迟。

30. 发明申请

US20080032658A1 Analog front end device 审中-公开
标题翻译：模拟前端设备
公开(公告)号：US20080032658A1
公开(公告)日：2008-02-07
申请号：US11882039
申请日：2007-07-30
申请人： Jui-Yuan Tsai , Yu-Pin Chou
发明人： Jui-Yuan Tsai , Yu-Pin Chou
IPC分类号： H04B1/26
CPC分类号： H04N9/64
摘要： The invention discloses an analog front end device comprising a band-gap voltage reference circuit and at least one conversion circuit, wherein the conversion circuit includes a clamper, an input buffer, a low-pass filter, a high frequency gain unit and an analog to digital converter. The analog front end device utilize a high frequency gain unit to increase high frequency gain of the image analog signal for increasing the usable number of sampling phase of the image analog signal.
摘要翻译：本发明公开了一种包括带隙电压参考电路和至少一个转换电路的模拟前端装置，其中转换电路包括钳位器，输入缓冲器，低通滤波器，高频增益单元和模拟 - 数字转换器。模拟前端装置利用高频增益单元增加图像模拟信号的高频增益，以增加图像模拟信号的可用采样相位数。

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