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21. 发明授权

US07531860B2 Image sensor and method of forming the same 失效
标题翻译：图像传感器及其形成方法
公开(公告)号：US07531860B2
公开(公告)日：2009-05-12
申请号：US12047941
申请日：2008-03-13
申请人： Ki-Hong Kim
发明人： Ki-Hong Kim
IPC分类号： H01L31/062 , H01L31/113 , H01L31/0232 , H01L31/00
CPC分类号： H01L27/14636 , H01L27/14627
摘要： A method for forming an image sensor is provided. The method includes providing a semiconductor substrate having a pixel region and a peripheral circuit region, forming a photoelectric transformation section at the semiconductor substrate of the pixel region, forming a plurality of interlayer dielectrics over the semiconductor substrate with interconnections interposed therebetween, forming a passivation layer, partially patterning the passivation layer at the peripheral circuit region to form a via hole exposing the interconnection and removing the passivation layer and the underlying interlayer dielectric at the pixel region. The method further includes forming a conductive layer to fill the via hole and etching the conductive layer to remove the conductive layer at the pixel region and form a via plug and a conductive pad at the peripheral circuit region. The via plug fills the via hole and the conductive pad protrudes outwardly from the via hole.
摘要翻译：提供了一种用于形成图像传感器的方法。该方法包括提供具有像素区域和外围电路区域的半导体衬底，在像素区域的半导体衬底处形成光电转换部分，在半导体衬底上形成多个层间电介质，其间插入互连，形成钝化层，在外围电路区域部分地图案化钝化层以形成暴露互连并在像素区域去除钝化层和下层层间电介质的通孔。该方法还包括形成导电层以填充通孔并蚀刻导电层以去除像素区域处的导电层，并在外围电路区域形成通孔塞和导电垫。通孔插头填充通孔，导电垫从通孔向外突出。

22. 发明申请

US20080219995A1 IL-32 MONOCLONAL ANTIBODIES AND USES THEREOF 失效
标题翻译： IL-32单克隆抗体及其用途
公开(公告)号：US20080219995A1
公开(公告)日：2008-09-11
申请号：US12032298
申请日：2008-02-15
申请人： Ki-Hong Kim , Jung-Hyun Shim , Min-chul Cho , Jung-Woo Kang , Hee-Sook Choi , Eun-Hee Seo , Eun-young Song , Hee-Gu Lee , Mi-Young Park , Do-Young Yoon
发明人： Ki-Hong Kim , Jung-Hyun Shim , Min-chul Cho , Jung-Woo Kang , Hee-Sook Choi , Eun-Hee Seo , Eun-young Song , Hee-Gu Lee , Mi-Young Park , Do-Young Yoon
IPC分类号： A61K39/395 , C07K16/00 , C12N5/00 , G01N33/53
CPC分类号： C07K16/244 , G01N2333/54 , Y10S435/975 , Y10S530/809
摘要： The present invention provides monoclonal antibodies specific for interleukin-32 (IL-32, previously referred to as “natural killer cell transcript 4” or “NK4”) and hybridomas secreting monoclonal antibodies specific for IL-32. Also provided are diagnostic methods and kits (e.g., ELISA, Western blot, etc.) which utilize monoclonal antibodies specific for IL-32.
摘要翻译：本发明提供对白细胞介素-32（IL-32，以前称为“天然杀伤细胞转录物4”或“NK4”）特异性的单克隆抗体和分泌特异于IL-32的单克隆抗体的杂交瘤。还提供了使用针对IL-32特异性的单克隆抗体的诊断方法和试剂盒（例如ELISA，Western印迹等）。

23. 发明申请

US20060012396A1 Level shifter and method thereof 有权
公开(公告)号：US20060012396A1
公开(公告)日：2006-01-19
申请号：US11175415
申请日：2005-07-07
申请人： Nyun-Tae Kim , Ki-Hong Kim
发明人： Nyun-Tae Kim , Ki-Hong Kim
IPC分类号： H03K19/0175
CPC分类号： H03K19/01721 , H03K17/08122 , H03K19/00315 , H03K19/018521
摘要： A level shifter and method thereof. The level shifter may include a protective circuit configured to receive an input signal having an input voltage level, the input signal received on an input line, the protective circuit reducing the input voltage level to generate a stabilized input signal and a first inverter configured to invert the stabilized input signal and to output an inverted output signal at an inverted output voltage level to a first node. In an example method, an input signal may be received at an input voltage level, the input voltage level may be reduced to output a stabilized input signal, the stabilized input signal may be inverted to output an inverted output signal at an inverted output voltage level to a first node and the first node may be transitioned to a node voltage level based on the input signal. The level shifter and method thereof may reduce a power consumption and/or a chip size of a semiconductor device.

24. 发明授权

US09112054B2 Methods of manufacturing semiconductor devices 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US09112054B2
公开(公告)日：2015-08-18
申请号：US13181907
申请日：2011-07-13
申请人： Kwan-Heum Lee , Wook-Je Kim , Soon-Wook Jung , Sang-Bom Kang , Ki-Hong Kim
发明人： Kwan-Heum Lee , Wook-Je Kim , Soon-Wook Jung , Sang-Bom Kang , Ki-Hong Kim
IPC分类号： H01L21/336 , H01L21/8238 , H01L29/78
CPC分类号： H01L21/823807 , H01L21/823814 , H01L29/7848
摘要： A semiconductor device and a method of manufacturing a semiconductor device are provided. In a method of manufacturing a semiconductor device, a gate structure is formed on a substrate. An epitaxial layer is formed on a top surface of the substrate adjacent to the gate structure. An elevated source/drain (ESD) layer and an impurity region are formed by implanting impurities and carbon in the epitaxial layer and an upper portion of the substrate using the gate structure as an ion implantation mask. A metal silicide layer is formed on the ESD layer.
摘要翻译：提供半导体器件和制造半导体器件的方法。在制造半导体器件的方法中，在衬底上形成栅极结构。在与栅极结构相邻的衬底的顶表面上形成外延层。通过使用栅极结构作为离子注入掩模，将外延层中的杂质和碳注入到衬底的上部，形成升高的源极/漏极（ESD）层和杂质区。在ESD层上形成金属硅化物层。

25. 发明申请

US20140234689A1 PACKAGING MATERIAL FOR BATTERY HAVING HEAT DISSIPATION PROPERTY 审中-公开
标题翻译：用于具有散热性能的电池的包装材料
公开(公告)号：US20140234689A1
公开(公告)日：2014-08-21
申请号：US14233864
申请日：2012-07-20
申请人： Ki-Hong Kim , Jeong-Gyoum Kim , Jong-Woon Yoon , Hong-Keon Kim
发明人： Ki-Hong Kim , Jeong-Gyoum Kim , Jong-Woon Yoon , Hong-Keon Kim
IPC分类号： H01M10/613
CPC分类号： B32B9/045 , B32B7/12 , B32B15/088 , B32B15/09 , B32B15/20 , B32B27/08 , B32B27/20 , B32B27/32 , B32B27/36 , B32B27/365 , B32B2264/108 , B32B2307/302 , B32B2307/306 , B32B2307/714 , B32B2307/75 , B32B2439/00 , B32B2457/10 , H01M2/0287 , H01M2/1094 , H01M2/348 , H01M10/613 , H01M10/6551
摘要： The present invention relates to a packaging material for a battery including a deposited body consisting of an outermost layer, a barrier layer, and an innermost layer, wherein a heat dissipation layer consisting of a carbon material or a mixture of a carbon material and a resin is formed to afford a slip property, flame resistance, printability, and the like as well as a heat dissipation property to the packaging material. The present invention also relates to a packaging material for a battery having a heat dissipation function, containing a carbon material in at least one layer of the above layers.
摘要翻译：本发明涉及包括由最外层，阻挡层和最内层组成的沉积体的电池用包装材料，其中，由碳材料或碳材料与树脂的混合物构成的散热层形成为提供滑动性，阻燃性，可印刷性等以及对包装材料的散热性能。本发明还涉及一种具有散热功能的电池用包装材料，在上述层的至少一层中含有碳材料。

26. 发明申请

US20130225305A1 EXPANDED 3D SPACE-BASED VIRTUAL SPORTS SIMULATION SYSTEM 审中-公开
标题翻译：扩展3D空间虚拟运动模拟系统
公开(公告)号：US20130225305A1
公开(公告)日：2013-08-29
申请号：US13566928
申请日：2012-08-03
申请人： Ung-Yeon YANG , Yong-Wan Kim , Ki-Suk Lee , Byung-Seok Roh , Ki-Hong Kim
发明人： Ung-Yeon YANG , Yong-Wan Kim , Ki-Suk Lee , Byung-Seok Roh , Ki-Hong Kim
IPC分类号： A63B69/36 , A63F13/00
CPC分类号： A63F13/812 , A63B69/36 , A63B2024/0012 , A63F13/00 , A63F13/285 , A63F13/335 , A63F13/53 , G02B27/22 , G06F3/011 , H04N13/30 , H04N13/344
摘要： An expanded 3D space-based virtual sports simulation system is provided. The expanded 3D space-based virtual sports simulation system includes: a plurality of user tracking devices configured to track a user's body motion; a first display device configured to display a first image including content; a second display device configured to display a second image including an image of the user's body motion tracked through the user tracking devices; and a control unit configured to set image display spaces of the respective display devices such that physical spaces for displaying an image including a 3D image are divided or shared among the respective display devices, and to provide images to the respective display devices according to a scenario.
摘要翻译：提供了一个扩展的基于3D空间的虚拟运动模拟系统。扩展的基于3D空间的虚拟运动模拟系统包括：多个用户跟踪装置，被配置为跟踪用户的身体运动; 第一显示装置，被配置为显示包括内容的第一图像; 第二显示装置，被配置为显示包括通过所述用户跟踪装置跟踪的用户身体运动的图像的第二图像; 以及控制单元，被配置为设置各个显示设备的图像显示空间，使得在各个显示设备之间划分或共享用于显示包括3D图像的图像的物理空间，并且根据场景向各个显示设备提供图像。

27. 发明授权

US08476631B2 Thin film transistor with offset structure and electrodes in a symmetrical arrangement 有权
标题翻译：具有偏移结构的薄膜晶体管和对称布置的电极
公开(公告)号：US08476631B2
公开(公告)日：2013-07-02
申请号：US13084357
申请日：2011-04-11
申请人： Ki-Hong Kim , Jeong-Hwan Kim , Yong-Jae Jang , Jung-Hyun Kim
发明人： Ki-Hong Kim , Jeong-Hwan Kim , Yong-Jae Jang , Jung-Hyun Kim
IPC分类号： H01L29/786
CPC分类号： H01L29/41733 , H01L29/78609 , H01L29/78624 , H01L29/78696
摘要： A thin film transistor (TFT) having an offset structure is disclosed. The TFT maintains a sufficiently low “off” current and a sufficiently high “on” current. The TFT includes an active region. The active region includes a gate electrode; an active layer that overlaps with the gate electrode; a gate insulating layer between the gate electrode and the active layer; and a source/drain electrode layer including source/drain electrodes that are electrically connected to the active region. Some of the source/drain electrodes overlap partially with the gate electrode. Other of the source/drain electrodes are offset from the gate electrode. The source/drain electrodes and the gate electrode are in a symmetrical arrangement.
摘要翻译：公开了一种具有偏移结构的薄膜晶体管（TFT）。 TFT保持足够低的“截止”电流和足够高的“导通”电流。 TFT包括有源区。有源区包括栅电极; 与栅电极重叠的有源层; 栅电极和有源层之间的栅极绝缘层; 以及包括电连接到有源区的源极/漏极的源极/漏极电极层。一些源极/漏极电极部分地与栅电极重叠。源极/漏极中的其他源极与栅电极偏移。源极/漏极和栅电极处于对称的布置。

28. 发明申请

US20130162630A1 METHOD AND APPARATUS FOR DISPLAYING STEREOSCOPIC IMAGE CONTENTS USING PIXEL MAPPING 审中-公开
标题翻译：使用像素映射显示立体图像内容的方法和装置
公开(公告)号：US20130162630A1
公开(公告)日：2013-06-27
申请号：US13560043
申请日：2012-07-27
申请人： Hong-Kee KIM , Seong-Won Ryu , Ung-Yeon Yang , Ki-Hong Kim
发明人： Hong-Kee KIM , Seong-Won Ryu , Ung-Yeon Yang , Ki-Hong Kim
IPC分类号： G06T15/00
CPC分类号： H04N13/366 , H04N13/31
摘要： A method and apparatus for displaying a stereoscopic image using pixel mapping are provided. The method for displaying the stereoscopic image generates pixel mapping data obtained by mapping a viewpoint position of an observer with pixel information on a screen corresponding to the viewpoint position of the observer using barrier information and panel information, and displays stereoscopic image contents in a pixel area on the screen corresponding to the discerned viewpoint position of the observer based on the generated pixel mapping data. Accordingly, it is possible to prevent distortion of the stereoscopic image by preventing mutually different viewpoints from being mixed.
摘要翻译：提供了一种使用像素映射显示立体图像的方法和装置。用于显示立体图像的方法通过使用屏障信息和面板信息生成将与观察者的视点位置相对应的屏幕上的像素信息映射到观察者的视点位置而获得的像素映射数据，并将立体图像内容显示在像素区域基于生成的像素映射数据，对应于观察者的识别视点位置的屏幕。因此，可以通过防止相互不同的观点混合来防止立体图像的失真。

29. 发明授权

US08332662B2 Semiconductor integrated circuit and testing method thereof 有权
标题翻译：半导体集成电路及其测试方法
公开(公告)号：US08332662B2
公开(公告)日：2012-12-11
申请号：US12249495
申请日：2008-10-10
申请人： Sun-Kwon Kim , Byeong-Hoon Lee , Ki-Hong Kim , Hyuck-Jun Cho
发明人： Sun-Kwon Kim , Byeong-Hoon Lee , Ki-Hong Kim , Hyuck-Jun Cho
IPC分类号： G06F21/00
CPC分类号： G06K19/0723
摘要： A semiconductor integrated circuit including a detector and a secure checker. The detector generates a detection signal upon sensing an abnormal state in an operating environment of the semiconductor integrated circuit. The secure checker generates a check signal to find an operating condition of the detector and receives the detection signal. The detector activates the detection signal in response to the check signal.
摘要翻译：一种包括检测器和安全检查器的半导体集成电路。该检测器在感测半导体集成电路的工作环境中的异常状态时产生检测信号。安全检查器产生检查信号以找到检测器的操作条件并接收检测信号。检测器响应于检查信号激活检测信号。

30. 发明申请

US20110297937A1 THIN FILM TRANSISTOR WITH OFFSET STRUCTURE 有权
标题翻译：具有偏移结构的薄膜晶体管
公开(公告)号：US20110297937A1
公开(公告)日：2011-12-08
申请号：US13084357
申请日：2011-04-11
申请人： Ki-Hong Kim , Jeong-Hwan Kim , Yong-Jae Jang , Jung-Hyun Kim
发明人： Ki-Hong Kim , Jeong-Hwan Kim , Yong-Jae Jang , Jung-Hyun Kim
IPC分类号： H01L29/04
CPC分类号： H01L29/41733 , H01L29/78609 , H01L29/78624 , H01L29/78696
摘要： A thin film transistor (TFT) having an offset structure is disclosed. The TFT maintains a sufficiently low “off” current and a sufficiently high “on” current. The TFT includes an active region. The active region includes a gate electrode; an active layer that overlaps with the gate electrode; a gate insulating layer between the gate electrode and the active layer; and a source/drain electrode layer including source/drain electrodes that are electrically connected to the active region. Some of the source/drain electrodes overlap partially with the gate electrode. Other of the source/drain electrodes are offset from the gate electrode. The source/drain electrodes and the gate electrode are in a symmetrical arrangement.
摘要翻译：公开了一种具有偏移结构的薄膜晶体管（TFT）。 TFT保持足够低的“截止”电流和足够高的“导通”电流。 TFT包括有源区。有源区包括栅电极; 与栅电极重叠的有源层; 栅电极和有源层之间的栅极绝缘层; 以及包括电连接到有源区的源极/漏极的源极/漏极电极层。一些源极/漏极电极部分地与栅电极重叠。源极/漏极中的其他源极与栅电极偏移。源极/漏极和栅电极处于对称的布置。

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