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    • 22. 发明授权
    • Solid-state imaging device comprising a holding circuit and driving method thereof
    • 固态成像装置,包括保持电路及其驱动方法
    • US08817143B2
    • 2014-08-26
    • US13271466
    • 2011-10-12
    • Takahiko MurataTakayoshi YamadaYoshihisa KatoShigetaka Kasuga
    • Takahiko MurataTakayoshi YamadaYoshihisa KatoShigetaka Kasuga
    • H04N3/14H04N5/217
    • H04N5/361H01L27/14643H04N5/3742H04N5/3745
    • A plurality of pixel circuits arranged in rows and columns, and each of which outputs an electric signal according to an amount of received light; a first column signal line provided for each of the columns, and for sequentially transferring the electric signals from said pixel circuits in a corresponding column; and a holding circuit provided for each of the pixel circuits in each column, and which holds the electric signal transferred through the column signal line in the corresponding column are provided. A holding circuit includes a first capacitor which holds a first electric signal of the corresponding pixel circuit in a reset state; and a second capacitor which holds a second electric signal after the corresponding pixel circuit receives light. A difference circuit calculates a difference between two electric signals held by the first capacitor and the second capacitor in a same holding circuit.
    • 多个以行和列排列的像素电路,每个像素电路根据接收的光量输出电信号; 为每个列提供的第一列信号线,并且用于从相应列中的所述像素电路顺序传送电信号; 并且提供为每列中的每个像素电路提供并保持通过相应列中的列信号线传送的电信号的保持电路。 保持电路包括:第一电容器,其将相应像素电路的第一电信号保持在复位状态; 以及在相应的像素电路接收光之后保持第二电信号的第二电容器。 差分电路在相同的保持电路中计算由第一电容器和第二电容器保持的两个电信号之间的差。
    • 24. 发明授权
    • Insulated wire and manufacturing method of the same
    • 绝缘导线及其制造方法相同
    • US08309851B2
    • 2012-11-13
    • US12656407
    • 2010-01-28
    • Tomiya AbeYoshihisa Kato
    • Tomiya AbeYoshihisa Kato
    • H01B3/30
    • H01B3/308H01B3/427H01B3/447H01B3/448
    • An insulated wire includes a conductor, and an insulating layer of a porous member formed on the conductor by using a water-in-oil type emulsion (W/O emulsion) including a thermosetting liquid solventless varnish as the oil and water drops of water-soluble polymer contained in the thermosetting liquid solventless varnish as the water. The insulating layer of the porous member is formed by that the water-in-oil type emulsion is coated so as to form a thin film as a coated film, the thermosetting liquid solventless varnish as the oil is polymerized and cured after the formation of the thin film, and the water drops as the water is dried and removed after the curing of the thermosetting liquid solventless varnish.
    • 绝缘线包括导体和通过使用包含热固性液体无溶剂清漆的油包水型乳液(W / O乳液)形成在导体上的多孔构件的绝缘层作为油 - 水 - 包含在热固性液体无溶剂清漆中的可溶性聚合物作为水。 多孔构件的绝缘层是通过涂覆油包水型乳液形成薄膜作为涂膜而形成的,作为油的热固性无溶剂清漆在形成之后被聚合和固化 在热固性液体无溶剂清漆固化后水分干燥和除去时,水滴下降。
    • 26. 发明授权
    • Semiconductor memory cell and semiconductor memory array using the same
    • 半导体存储单元和半导体存储器阵列使用相同
    • US07842989B2
    • 2010-11-30
    • US12272184
    • 2008-11-17
    • Yoshihisa Kato
    • Yoshihisa Kato
    • H01L21/02
    • H01L27/1159G11C11/22G11C11/221
    • A memory element including a first FET, and a selection switch including a second FET are connected in series, and a semiconductor film and a dielectric film stacked over a substrate form a common channel and a common gate insulating film in the first and second FETs. A first gate electrode of the first FET and a second gate electrode of the second FET are formed on the dielectric film, and a drain electrode and a source electrode are formed on the semiconductor film. Under the semiconductor film, a back-gate electrode is formed with a ferroelectric film interposed therebetween, and the ends of the semiconductor film that forms the channel are located inwardly of the ends of the back-gate electrode.
    • 包括第一FET的存储元件和包括第二FET的选择开关串联连接,并且在衬底上形成半导体膜和介电膜形成第一和第二FET中的公共沟道和公共栅极绝缘膜。 第一FET的第一栅电极和第二FET的第二栅电极形成在电介质膜上,在半导体膜上形成漏电极和源电极。 在半导体膜下方,形成有介于其间的铁电体膜的背栅极电极,形成沟道的半导体膜的端部位于背栅电极的端部的内侧。
    • 30. 发明授权
    • Semiconductor storage apparatus
    • 半导体存储装置
    • US07506099B2
    • 2009-03-17
    • US11519221
    • 2006-09-12
    • Shunichi IwanariYasushi GohouYoshihisa Kato
    • Shunichi IwanariYasushi GohouYoshihisa Kato
    • G06F12/00
    • G06F12/123G06F2212/2022
    • A semiconductor storage apparatus comprising: a ferroelectric memory; an SRAM 30; a counter 41; a CAM 10 that judges whether or not a block of data requested to be read out from the ferroelectric memory is stored in the SRAM 30; a storage control unit 51 that, if a result of the judgment is negative, performs a control to read out the requested block of data from the ferroelectric memory and stores a copy of the read-out block of data into a unit storage area in the SRAM 30 that corresponds to the count value indicated by the counter 41; and a counter control unit 52 that causes the counter 41 to update the count value each time a result of the judgment is negative.
    • 一种半导体存储装置,包括:铁电存储器; 一个SRAM 30; 柜台41 判断从铁电存储器请求读出的数据块是否存储在SRAM30中的CAM10; 存储控制单元51,如果判断结果为否定,则执行控制以从强电介质存储器读出所请求的数据块,并将读出的数据块的副本存储在该单元存储区域中 对应于由计数器41指示的计数值的SRAM 30; 以及计数器控制单元52,每当判断结果为负时,使计数器41更新计数值。