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    • 24. 发明申请
    • Method and apparatus for designing semiconductor integrated circuit
    • 半导体集成电路设计方法及设备
    • US20050050502A1
    • 2005-03-03
    • US10823649
    • 2004-04-14
    • Takashi KuriharaKazutaka Takeuchi
    • Takashi KuriharaKazutaka Takeuchi
    • G06F17/50G06F9/45H01L21/82H01L21/822H01L27/04
    • G06F17/5036G06F17/5068
    • A method for accurately determining the provisional quantity and provisional locations of power supply pads prior to detailed layout of a semiconductor integrated circuit. The method decreases redesigning, shortens the design time, and lowers design costs. The method includes performing a power supply network analysis of the core section to obtain voltage values of the nodes, calculating current values between the nodes from the voltage values of the nodes and the resistances between the nodes, and calculating current values of the power supply pads from the current values between the nodes. The method further includes determining whether to eliminate or add a power supply pad depending on whether the current value of each power supply pad exceeds the current capacity of an associated IO buffer.
    • 一种用于在半导体集成电路的详细布局之前准确地确定电源焊盘的临时位置和临时位置的方法。 该方法减少了重新设计,缩短了设计时间,降低了设计成本。 该方法包括执行核心部分的电源网络分析以获得节点的电压值,从节点的电压值和节点之间的电阻计算节点之间的电流值,并计算电源焊盘的电流值 从节点之间的当前值。 该方法还包括根据每个电源焊盘的当前值是否超过相关联的IO缓冲器的当前容量来确定是否消除或添加电源焊盘。
    • 25. 发明授权
    • Method and apparatus for laying out power supply wiring
    • 布线电源线路的方法和装置
    • US06854094B2
    • 2005-02-08
    • US10261491
    • 2002-10-02
    • Masuo InuiTakashi Kurihara
    • Masuo InuiTakashi Kurihara
    • G06F17/50H01L21/82H01L21/822H01L27/04
    • G06F17/5077
    • A method for designing power supply wiring of a semiconductor integrated circuit having a logic circuit. A first power consumption value of the logic circuit is calculated based on logic connection information, and the power supply wiring is laid out in accordance with the first power consumption value. Logic modification connection information relating to the modified logic circuit is generated when the logic circuit is modified after the power supply wiring is laid out. A second power consumption value of the modified logic circuit is calculated based on the logic modification connection information. When the second power consumption value exceeds the first power consumption value, it is determined that the power supply wiring must be re-laid out. It is thus easily determined whether to re-lay out the power supply wiring without performing power supply network analysis.
    • 一种用于设计具有逻辑电路的半导体集成电路的电源布线的方法。 基于逻辑连接信息计算逻辑电路的第一功耗消耗值,并且根据第一功耗值布置电源布线。 在布置电源布线之后,当修改逻辑电路时,产生与修改的逻辑电路相关的逻辑修改连接信息。 基于逻辑修改连接信息计算修改后的逻辑电路的第二功耗值。 当第二功率消耗值超过第一功耗值时,确定必须重新布置电源布线。 因此容易确定是否重新布线电源线,而不进行电源网络分析。
    • 28. 发明授权
    • Method for producing a liquid crystal display device
    • 液晶显示装置的制造方法
    • US5907383A
    • 1999-05-25
    • US37411
    • 1998-03-10
    • Takashi KuriharaYasuhiro KumeKenji Majima
    • Takashi KuriharaYasuhiro KumeKenji Majima
    • G02F1/13G02F1/1333G02F1/1339
    • G02F1/133377
    • A method for producing a liquid crystal display device including a pair of substrates and a liquid crystal layer held between the pair of substrates, wherein the liquid crystal layer includes a polymeric region and a liquid crystal region substantially surrounded by the polymeric region, and liquid crystal molecules in the liquid crystal region are axis-symmetrically oriented, the method including the steps of: injecting a precursor mixture containing a liquid crystal material and a polymerizable material between the pair of substrates; heating the precursor mixture to a first temperature which is equivalent to or higher than a miscible temperature of the precursor mixture; cooling the precursor mixture from the first temperature to a second temperature which is lower than the miscible temperature; forming the polymeric region substantially surrounding the liquid crystal region by polymerizing the polymerizable material; and providing a tilt angle to the liquid crystal molecules in a liquid crystal droplet phase-separated from the precursor mixture by continuously applying a prescribed external field to the precursor mixture at least while the precursor mixture is being cooled from the miscible temperature to the second temperature
    • 一种液晶显示装置的制造方法,包括一对基板和保持在所述一对基板之间的液晶层,其中所述液晶层包括聚合物区域和基本上被所述聚合物区域包围的液晶区域,以及液晶 液晶区域中的分子是轴对称取向的,该方法包括以下步骤:在一对基板之间注入含有液晶材料和可聚合材料的前体混合物; 将前体混合物加热到等于或高于前体混合物的混溶温度的第一温度; 将前体混合物从第一温度冷却至低于可混溶温度的第二温度; 通过聚合可聚合材料形成基本上围绕液晶区域的聚合物区域; 并且通过在将前体混合物从可混溶温度冷却至第二温度的过程中至少在前体混合物中连续地施加规定的外部场地,使与从前体混合物相分离的液晶小滴中的液晶分子提供倾斜角
    • 29. 发明授权
    • Active matrix substrate and inspecting method thereof
    • 有源矩阵基板及其检测方法
    • US5777348A
    • 1998-07-07
    • US664574
    • 1996-06-17
    • Takashi Kurihara
    • Takashi Kurihara
    • H01L29/786G02F1/1368H01L21/66H01L27/12H01L29/04H01L31/036
    • H01L22/22H01L27/12
    • An active matrix substrate has a plurality of TFT elements provided in a matrix form, a gate line block and a source line block for supplying signals to the TFT elements, and a short circuit member for short-circuiting the gate line block and the source line block. The short circuit member includes a first segment and a second segment provided parallelly to each other between the gate line block and the source line block. The first segment changes from a short-circuiting state to an insulating state with laser radiation. The second segment either changes from an insulating state to a short-circuiting state with laser radiation, or has a higher electric resistance than the first segment in the short-circuiting state. Hence, destruction of insulating films and, hence, inadequate display are prevented even after inspection.
    • 有源矩阵基板具有以矩阵形式设置的多个TFT元件,用于向TFT元件提供信号的栅极线块和源极线块,以及用于使栅极线块和源极线短路的短路元件 块。 短路构件包括在栅极线块和源极线块之间彼此平行设置的第一段和第二段。 第一段通过激光辐射从短路状态变为绝缘状态。 第二段通过激光辐射从绝缘状态变为短路状态,或者在短路状态下具有比第一段更高的电阻。 因此,即使在检查之后,也可以防止绝缘膜的破坏,因此显示不足。