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21. 发明申请

US20130151796A1 SYSTEM AND METHOD FOR CALIBRATION OF SERIAL LINKS USING A SERIAL-TO-PARALLEL LOOPBACK 有权
标题翻译：使用串行到并行循环校准串行链路的系统和方法
公开(公告)号：US20130151796A1
公开(公告)日：2013-06-13
申请号：US13316386
申请日：2011-12-09
申请人： Alok Gupta
发明人： Alok Gupta
IPC分类号： G06F12/00 , G06F13/12
CPC分类号： G06F13/12 , G06F12/12 , G06F13/4234 , G11C2029/3602
摘要： A system and method for calibration of serial links using serial-to-parallel loopback. Embodiments of the present invention are operable for calibrating serial links using parallel links thereby reducing the number of links that need calibration. The method includes sending serialized data over a serial interface and receiving parallel data via a parallel interface. The serialized data is looped back via the parallel interface. The method further includes comparing the parallel data and the serialized data for a match thereof and calibrating the serial interface by adjusting the sending of the serialized data until the comparing detects the match. The adjusting of the sending is operable to calibrate the sending of the serialized data over the serial interface.
摘要翻译：一种使用串行到并行环回校准串行链路的系统和方法。本发明的实施例可用于使用并行链路校准串行链路，从而减少需要校准的链路的数量。该方法包括通过串行接口发送串行数据，并通过并行接口接收并行数据。序列化数据通过并行接口环回。该方法还包括比较并行数据和串行数据以进行匹配，并通过调整串行化数据的发送来校准串行接口，直到比较检测到匹配为止。发送的调整可以通过串行接口校准串行化数据的发送。

22. 发明授权

US08407441B2 Method and apparatus for calibrating write timing in a memory system 有权
公开(公告)号：US08407441B2
公开(公告)日：2013-03-26
申请号：US13111446
申请日：2011-05-19
申请人： Thomas J. Giovannini , Alok Gupta , Ian Shaeffer , Steven C. Woo
发明人： Thomas J. Giovannini , Alok Gupta , Ian Shaeffer , Steven C. Woo
IPC分类号： G06F12/00
CPC分类号： G11C11/4076 , G06F1/08 , G06F3/0629 , G06F3/0634 , G06F5/06 , G06F12/0646 , G06F13/1689 , G11C7/1078 , G11C7/1087 , G11C7/1093 , G11C11/409 , G11C11/4096 , G11C2207/2254
摘要： A system that calibrates timing relationships between signals involved in performing write operations is described. This system includes a memory controller which is coupled to a set of memory chips, wherein each memory chip includes a phase detector configured to calibrate a phase relationship between a data-strobe signal and a clock signal received at the memory chip from the memory controller during a write operation. Furthermore, the memory controller is configured to perform one or more write-read-validate operations to calibrate a clock-cycle relationship between the data-strobe signal and the clock signal, wherein the write-read-validate operations involve varying a delay on the data-strobe signal relative to the clock signal by a multiple of a clock period.

23. 发明申请

US20080044068A1 METHOD, APPARATUS AND COMPUTER PROGRAM FOR DISPLAYING MARKS IN AN IMAGE DATA SET 有权
标题翻译：用于在图像数据集中显示标记的方法，装置和计算机程序
公开(公告)号：US20080044068A1
公开(公告)日：2008-02-21
申请号：US11465386
申请日：2006-08-17
申请人： Carl J. G. Evertsz , Anke Bodicker , Sriram Krishnan , Balaji Krishnapuram , R. Bharat Rao , Dennis O'Dell , Alok Gupta
发明人： Carl J. G. Evertsz , Anke Bodicker , Sriram Krishnan , Balaji Krishnapuram , R. Bharat Rao , Dennis O'Dell , Alok Gupta
IPC分类号： G06K9/00 , G06F3/00
CPC分类号： G06T7/0012 , G06F19/00 , G06F19/321 , G06T2207/30068
摘要： A method and an apparatus display marks in an image data set, wherein an image data set comprising marks is provided and wherein during a review phase not all marks within the image data set are displayed at the same time. A list of the marks can be generated by sorting the marks depending on a predetermined sorting criterion and wherein the marks are displayed temporally one after another within the image data set in accordance with the generated list. The image data set is for example a medical image data set, wherein the marks are CAD marks and wherein the sorting criterion is the probability of marking illness, in particular the suspiciousness.
摘要翻译：方法和装置在图像数据组中显示标记，其中提供了包括标记的图像数据组，并且其中在检查阶段期间不是同时显示图像数据集内的所有标记。可以通过根据预定的分类标准对标记进行排序来生成标记的列表，并且其中根据所生成的列表，在图像数据集中，这些标记在时间上依次显示。图像数据集是例如医学图像数据集，其中标记是CAD标记，其中分类标准是标记疾病的概率，特别是可疑性。

24. 发明申请

US20060215778A1 Automatic frequency control for a wireless communication system with multiple subcarriers 有权
标题翻译：具有多个子载波的无线通信系统的自动频率控制
公开(公告)号：US20060215778A1
公开(公告)日：2006-09-28
申请号：US11372931
申请日：2006-03-09
申请人： Vinay Murthy , Alok Gupta , Seong Taek Chung , Fuyun Ling
发明人： Vinay Murthy , Alok Gupta , Seong Taek Chung , Fuyun Ling
IPC分类号： H04K1/10
CPC分类号： G06F1/0353 , H04L5/0007 , H04L5/0048 , H04L27/2659 , H04L27/266 , H04L27/2662 , H04L27/2675 , H04L27/2678
摘要： Techniques for performing frequency control in an OFDM system are described. In one aspect, frequency acquisition is performed based on a received pilot, and frequency tracking is performed based on received OFDM symbols. For frequency acquisition, an initial frequency error estimate may be derived based on the received pilot, and an automatic frequency control (AFC) loop may be initialized with the initial frequency error estimate. For frequency tracking, a frequency error estimate may be derived for each received OFDM symbol, and the AFC loop may be updated with the frequency error estimate. Frequency error in input samples is corrected by the AFC loop with the initial frequency error estimate as well as the frequency error estimate for each received OFDM symbol. In another aspect, a variable number of samples of a received OFDM symbol are selected, e.g., based on the received OFDM symbol timing, for use for frequency error estimation.
摘要翻译：描述在OFDM系统中执行频率控制的技术。在一个方面，基于接收到的导频执行频率采集，并且基于接收的OFDM符号执行频率跟踪。对于频率获取，可以基于接收到的导频来导出初始频率误差估计，并且可以利用初始频率误差估计来初始化自动频率控制（AFC）循环。对于频率跟踪，可以针对每个接收的OFDM符号导出频率误差估计，并且可以用频率误差估计来更新AFC循环。通过具有初始频率误差估计的AFC回路以及每个接收的OFDM符号的频率误差估计来校正输入采样中的频率误差。在另一方面，例如基于所接收的OFDM符号定时，选择接收到的OFDM符号的可变数目的样本，以用于频率误差估计。

25. 发明申请

US20060203950A1 Dual-loop automatic frequency control for wireless communication 有权
公开(公告)号：US20060203950A1
公开(公告)日：2006-09-14
申请号：US11358996
申请日：2006-02-21
申请人： Seong Chung , Vinay Murthy , Alok Gupta , Fuyun Ling
发明人： Seong Chung , Vinay Murthy , Alok Gupta , Fuyun Ling
IPC分类号： H03D3/24
CPC分类号： H03J7/04 , H03J1/0083
摘要： Techniques for performing frequency control using dual-loop automatic frequency control (AFC) are described. The dual-loop AFC includes an inner loop that corrects short-term frequency variations (e.g., due to Doppler effect) and an outer loop that corrects long-term frequency variations (e.g., due to component tolerances and temperature variations). In one design, a first inner loop is implemented for frequency control of a first system (e.g., a broadcast system), a second inner loop is implemented for frequency control of a second system (e.g., a cellular system), and at least one outer loop is implemented for adjusting a reference frequency used to receive signals from the first and second systems. Each inner loop estimates and corrects the frequency error in an input signal for the associated system and may be enabled when receiving the input signal from the system. The reference frequency may be used for frequency downconversion, sampling and/or other purposes.

26. 发明申请

US20060075326A1 Research software tool with flowchart graphic user interface 审中-公开
标题翻译：具有流程图图形用户界面的研究软件工具
公开(公告)号：US20060075326A1
公开(公告)日：2006-04-06
申请号：US10945455
申请日：2004-09-20
申请人： Parag Patel , Alok Gupta , Claudia Carver
发明人： Parag Patel , Alok Gupta , Claudia Carver
IPC分类号： G06F17/24
CPC分类号： G06F16/951 , G06F16/382
摘要： A research software tool for use with an online external resource. The research software tool includes a flowchart graphic user interface. The flowchart graphic user interface includes a graphically indicated first defined area, and a text string displayable within the first defined area. The flowchart graphic user interface further includes a graphically indicated second defined area, and a text string displayable within the second defined area. At least one of the text strings is user selectable. The flowchart graphic user interface further includes relationship symbology displayable between the first and second defined areas. The research software tool further includes a user selectable link corresponding to the at least one of the text strings. The user selectable link is configured to interface with the online external resource.
摘要翻译：用于在线外部资源的研究软件工具。研究软件工具包括流程图图形用户界面。流程图图形用户界面包括图形指示的第一定义区域和可在第一定义区域内显示的文本串。流程图图形用户界面还包括图形指示的第二定义区域和可在第二定义区域内显示的文本串。至少有一个文本字符串是用户可选择的。流程图图形用户界面还包括可在第一和第二定义区域之间显示的关系符号。研究软件工具还包括对应于文本串中的至少一个的用户可选择链接。用户可选链接配置为与在线外部资源进行接口。

27. 发明授权

US06201543B1 Framework for segmentation of cylindrical structures using two dimensional hybrid models 失效
标题翻译：使用二维混合模型对圆柱形结构进行分割的框架
公开(公告)号：US06201543B1
公开(公告)日：2001-03-13
申请号：US08992869
申请日：1997-12-17
申请人： Thomas O'Donnell , Marie Pierre Jolly , Alok Gupta
发明人： Thomas O'Donnell , Marie Pierre Jolly , Alok Gupta
IPC分类号： G06T1500
CPC分类号： G06T17/20 , G06K9/6207 , G06T7/0012 , G06T7/12 , G06T7/149 , G06T2207/10081 , G06T2207/30101
摘要： A method of modeling a structure comprises the steps of initializing a parametric component of a hybrid model from a volumetric image, the volumetric image comprising image planes, creating starting points for two dimensional segmentations at intersections between the parametric component and the image planes, segmenting a boundary of the structure by applying active contours, sampling the active contours to create a dataset and parametrically and locally fitting the hybrid model to the dataset to represent the structure.
摘要翻译：对结构进行建模的方法包括以下步骤：从体积图像初始化混合模型的参数分量，所述体积图像包括图像平面，为参数分量和图像平面之间的交点处的二维分割创建起始点，分割通过应用主动轮廓对结构的边界进行采样，对活动轮廓进行采样以创建数据集，并将混合模型参数化和局部拟合到数据集以表示结构。

28. 发明授权

US09646656B2 Time-multiplexed communication protocol for transmitting a command and address between a memory controller and multi-port memory 有权
公开(公告)号：US09646656B2
公开(公告)日：2017-05-09
申请号：US13463720
申请日：2012-05-03
申请人： Alok Gupta
发明人： Alok Gupta
IPC分类号： G06F12/02 , G11C5/06 , G11C7/10 , G11C7/22
CPC分类号： G11C5/066 , G11C7/1075 , G11C7/22
摘要： One embodiment sets forth a technique for time-multiplexed communication for transmitting command and address information between a controller and a multi-port memory device over a single connection. Command and address information for each port of the multi-port memory device is time-multiplexed within the controller to produce a single stream of commands and addresses for different memory requests. The single stream of commands and addresses is transmitted by the controller to the multi-port memory device where the single stream is demultiplexed to generate separate streams of commands and addresses for each port of the multi-port memory device.

29. 发明授权

US09330031B2 System and method for calibration of serial links using a serial-to-parallel loopback 有权
标题翻译：使用串行到并行环回校准串行链路的系统和方法
公开(公告)号：US09330031B2
公开(公告)日：2016-05-03
申请号：US13316386
申请日：2011-12-09
申请人： Alok Gupta
发明人： Alok Gupta
IPC分类号： G06F12/00 , G06F13/12 , G06F12/12 , G11C29/36
CPC分类号： G06F13/12 , G06F12/12 , G06F13/4234 , G11C2029/3602
摘要： A system and method for calibration of serial links using serial-to-parallel loopback. Embodiments of the present invention are operable for calibrating serial links using parallel links thereby reducing the number of links that need calibration. The method includes sending serialized data over a serial interface and receiving parallel data via a parallel interface. The serialized data is looped back via the parallel interface. The method further includes comparing the parallel data and the serialized data for a match thereof and calibrating the serial interface by adjusting the sending of the serialized data until the comparing detects the match. The adjusting of the sending is operable to calibrate the sending of the serialized data over the serial interface.
摘要翻译：一种使用串行到并行环回校准串行链路的系统和方法。本发明的实施例可用于使用并行链路校准串行链路，从而减少需要校准的链路的数量。该方法包括通过串行接口发送串行数据，并通过并行接口接收并行数据。序列化数据通过并行接口环回。该方法还包括比较并行数据和串行数据以进行匹配，并通过调整串行化数据的发送来校准串行接口，直到比较检测到匹配为止。发送的调整可以通过串行接口校准串行化数据的发送。

30. 发明授权

US09263106B2 Efficient command mapping scheme for short data burst length memory devices 有权
标题翻译：用于短数据突发长度存储器件的高效命令映射方案
公开(公告)号：US09263106B2
公开(公告)日：2016-02-16
申请号：US13279172
申请日：2011-10-21
申请人： Alok Gupta
发明人： Alok Gupta
IPC分类号： G06F12/00 , G11C7/10 , G11C7/22 , G06F13/28
CPC分类号： G11C7/109 , G06F13/28 , G11C7/22
摘要： An exemplary system of the present disclosure comprises a memory controller, a command bus, a data bus, a memory device and a memory. The memory device is coupled to the memory controller by the command bus and the data bus. The memory stores instructions that when executed by the computer system perform a method of requesting data from the memory device. This method comprises receiving a plurality of commands for the memory device from the command bus, the memory device clocked by a clock. At least one command of the plurality of commands includes a first command and a second command within a single clock cycle of said clock. At least one of the first command and second command is a data access command. The first command is executed during a first clock cycle and the second command is executed during a second subsequent clock cycle.
摘要翻译：本公开的示例性系统包括存储器控制器，命令总线，数据总线，存储器件和存储器。存储器件通过命令总线和数据总线耦合到存储器控制器。存储器存储当由计算机系统执行时执行从存储器件请求数据的方法的指令。该方法包括从命令总线接收用于存储器设备的多个命令，即由时钟计时的存储器件。多个命令中的至少一个命令包括在所述时钟的单个时钟周期内的第一命令和第二命令。第一命令和第二命令中的至少一个是数据访问命令。第一个命令在第一个时钟周期内执行，第二个命令在第二个后续时钟周期内被执行。

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