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    • 22. 发明授权
    • Bipolar transistor with a reduced collector series resistance
    • 双极晶体管具有减小的集电极串联电阻
    • US5877539A
    • 1999-03-02
    • US727088
    • 1996-10-07
    • Toru Yamazaki
    • Toru Yamazaki
    • H01L29/73H01L21/331H01L21/8222H01L21/8248H01L21/8249H01L27/06H01L29/06H01L29/08H01L29/417H01L29/732H01L29/00H01L27/082
    • H01L29/66272H01L21/8249H01L27/0623H01L29/0692H01L29/0821H01L29/41708
    • A collector structure in a bipolar transistor on a semiconductor substrate is surrounded by trench isolations. A well region has a first impurity concentration and extends in an upper portion of the semiconductor substrate surrounded by the trench isolations. The well region is a first conductivity type and a burying layer horizontally extends under the well region. The burying layer is positioned shallower than the bottom of the trench isolations. Collector plug electrodes extend in a vertical direction and along inside walls of the trench isolations. The collector plug electrodes are the first conductivity type and have a second impurity concentration higher than the first impurity concentration. The collector plug electrodes have a bottom level which is about the same as the bottom of the trench isolations. A collector diffusion layer extends in a vertical direction and along inside vertical walls of the collector plug electrodes. The collector diffusion layer has a bottom level which extends horizontally beneath the collector plug electrodes so that the bottom of the collector diffusion layer is deeper than the bottom of the trench isolations so as to have the collector diffusion layer contact the burying layer.
    • 在半导体衬底上的双极晶体管中的集电极结构被沟槽隔离包围。 阱区具有第一杂质浓度并且在被沟槽隔离包围的半导体衬底的上部中延伸。 阱区是第一导电类型,并且埋层在水平区域下方水平延伸。 掩埋层的位置比沟槽隔离层的底部浅。 集电极插头电极沿垂直方向和沟槽隔离物的内壁延伸。 集电器插头电极是第一导电类型,并且具有高于第一杂质浓度的第二杂质浓度。 收集器插头电极具有与沟槽隔离件的底部大致相同的底部电平。 收集器扩散层在垂直方向上延伸并且沿着收集器插塞电极的垂直壁延伸。 集电极扩散层具有在集电极插塞电极下方水平延伸的底部电平,使得集电极扩散层的底部比沟槽隔离的底部更深,以使集电极扩散层与埋入层接触。
    • 25. 发明授权
    • Sewing apparatus equipped with an automatic thread supply device
    • 缝纫设备配有自动供线装置
    • US5249538A
    • 1993-10-05
    • US689509
    • 1991-04-23
    • Minoru NakanoToru Yamazaki
    • Minoru NakanoToru Yamazaki
    • D05B1/20D05B3/02D05B19/00D05B19/12D05B45/00D05B47/04D05B69/00D05B73/02
    • D05B45/00D05B19/12D05B47/04D05D2205/18
    • A sewing apparatus displays a stitch pattern and forcibly supplies a thread based on the displayed stitch pattern. The apparatus comprises a sewing mechanism, an automatic thread supply device, a key input unit, a memory, a selector and a display. The sewing mechanism has a sewing section which includes a needle and a looper driven in accordance with a rotation of a main shaft. The automatic thread supply device forcibly carries a needle thread and a looper thread to the sewing section. The key input unit sets lengths per stitch of the needle thread and the looper thread which are to be supplied by the automatic thread supply device to the sewing section. The memory stores a plurality of stitch patterns in correspondence with combinations of the lengths of the threads to be supplied per stitch. The selector selects one of the stitch patterns corresponding to the combination set by the key input unit. The display displays in graphics the stitch pattern selected by the selector.
    • 缝制装置显示针迹图案,并根据显示的针迹图案强制提供线。 该装置包括缝纫机构,自动线程供给装置,按键输入单元,存储器,选择器和显示器。 缝纫机构具有包括根据主轴的旋转而被驱动的针和打针器的缝合部。 自动供线装置将缝合线和针刺线强行装入缝纫部。 键输入单元将自动线供给装置向缝纫部供给的针线和针刺线的线圈长度设定。 存储器存储与针对每针要提供的线程的长度的组合相对应的多个针迹图案。 选择器选择与由键输入单元设定的组合相对应的针脚图案之一。 显示屏以图形显示选择器选择的针迹图案。
    • 26. 发明授权
    • bi-CMOS buffer cascaded to CMOS driver having PMOS pull-up transistor
with threshold voltage greater than VBE of bi-CMOS bipolar pull-up
transistor
    • 双CMOS缓冲器级联到具有PMOS上拉晶体管的CMOS驱动器,阈值电压大于双CMOS双极上拉晶体管的VBE
    • US4806797A
    • 1989-02-21
    • US92262
    • 1987-09-02
    • Toru Yamazaki
    • Toru Yamazaki
    • H03K19/08H01L21/331H01L21/8249H01L27/06H01L29/73H03K19/00H03K19/0944H03K19/0948H03K17/16H03K17/56
    • H03K19/09448H03K19/0013
    • For reduction in power consumption, there is disclosed a buffer circuit for a subsequent stage having a CMOS inverter circuit with a preselected threshold voltage coupled between a positive voltage source and a source of ground voltage comprising an input node to which an input signal appears, an output node coupled to the gate electrodes of the CMOS inverter circuit, and a n-p-n type bipolar transistor having a base electrode coupled to the input node, an emitter electrode coupled to the output node and a collector electrode coupled to the source of positive voltage, the bipolar transistor provides a conduction path from the source of positive voltage to the output node when the bipolar transistor is turned on, and the output node is electrically connected to the source of ground voltage when the bipolar transistor is turned off, wherein the bipolar transistor turns on in the presence of a preselected difference voltage between the emitter electrode and the base electrode and the preselected difference voltage is smaller in value than the preselected threshold voltage, so that the CMOS inverter circuit is prevented from a conduction path passing therethrough.
    • 为了降低功率消耗,公开了一种用于下一级的缓冲电路,其具有CMOS反相器电路,其具有耦合在正电压源和地电压源之间的预选阈值电压,该电压源包括输入信号出现的输入节点, 耦合到CMOS反相器电路的栅电极的输出节点和耦合到输入节点的基极的npn型双极晶体管,耦合到输出节点的发射极和耦合到正电压源的集电极, 当双极晶体管导通时,双极晶体管提供从正电压源到输出节点的导通路径,并且当双极晶体管截止时,输出节点电连接到接地电压源,其中双极晶体管转换 在发射电极和基极之间存在预选的差分电压和预压 所选择的差分电压的值比预选的阈值电压小,从而防止CMOS反相器电路穿过其中的传导路径。
    • 27. 发明授权
    • High frequency filter for electric instruments
    • 电动乐器高频滤波器
    • US4743868A
    • 1988-05-10
    • US847533
    • 1986-04-03
    • Taisei KatohToru YamazakiToshiki Saburi
    • Taisei KatohToru YamazakiToshiki Saburi
    • H03H1/00H05K1/02H04B3/28
    • H03H1/0007H05K1/0233
    • A high frequency filter in combination with an internal electronic circuit element of the flat-plate type, such as a hybrid integrated circuit element contained within a casing, includes an electrode member arranged on a circuit board within the casing to be grounded, an insulation substance layer, integrally formed on the electrode member and being made of a dielectric material whose dielectric constant decreases or increases in accordance with an increase or a decrease of wireless frequency applied thereto, and an electrode strip integrally formed on the insulation substance layer for connection to an external electric circuit. The internal electronic circuit element is integrally provided on either the electrode member or the insulation substance layer and connected to the electrode strip, and the electrode member is mounted on the circuit board to carry the electronic circuit element in place.
    • 高频滤波器与平板式内部电子电路元件(例如容纳在壳体内的混合集成电路元件)组合包括布置在待接地的壳体内的电路板上的电极构件,绝缘物质 层,整体地形成在电极构件上,并且由其介电常数随着施加到其上的无线频率的增加或减少而减小或增加的介电材料制成,以及一体地形成在绝缘物质层上用于连接到 外部电路。 内部电子电路元件一体地设置在电极构件或绝缘物质层上并连接到电极条,并且电极构件安装在电路板上以将电子电路元件运送到位。