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21. 发明授权

US06639575B1 Liquid crystal display 有权
标题翻译：液晶显示器
公开(公告)号：US06639575B1
公开(公告)日：2003-10-28
申请号：US09531162
申请日：2000-03-17
申请人： Takanori Tsunashima , Yoshiro Aoki , Kazuo Nakamura , Hajime Sato
发明人： Takanori Tsunashima , Yoshiro Aoki , Kazuo Nakamura , Hajime Sato
IPC分类号： G09G336
CPC分类号： G09G3/3648 , G09G3/3677 , G09G3/3688 , G09G2300/0408 , G09G2330/02
摘要： There is provided a driving circuit including active matrix type liquid crystal display capable of decreasing the electric power consumption of CMOS buffers contained in a scanning line driving circuit and picture signal line driving circuit. The liquid crystal display has an active matrix type liquid crystal display elements comprising switching elements connected to a plurality of scanning lines and a plurality of picture signal lines perpendicular to the scanning lines. The liquid crystal display includes a digital circuit wherein at least one of a scanning line driving circuit for applying a scanning pulse to the switching elements via the scanning lines and a picture signal line driving circuit for applying a picture signal to the picture signal lines comprises one stage of CMOS buffer or a plurality of CMOS buffers connected in multi stages, the CMOS transistor or each of the CMOS transistors including an N-type thin-film transistor and P-type thin-film transistor which are formed on the same substrate. In the liquid crystal display, one transistor, which has a longer off-state time during operation of the circuit, of the N-type thin-film transistor and P-type thin-film transistor constituting the CMOS buffer, has a longer gate length than that of the other transistor.
摘要翻译：提供了一种包括有源矩阵型液晶显示器的驱动电路，其能够降低包含在扫描线驱动电路和图像信号线驱动电路中的CMOS缓冲器的功耗。液晶显示器具有有源矩阵型液晶显示元件，其包括连接到多条扫描线的开关元件和垂直于扫描线的多条图像信号线。液晶显示器包括数字电路，其中用于经由扫描线向扫描脉冲施加扫描脉冲的扫描线驱动电路和用于向图像信号线施加图像信号的图像信号线驱动电路中的至少一个包括一个 CMOS缓冲器或者多级连接的CMOS缓冲器级，CMOS晶体管或者每个CMOS晶体管包括形成在同一衬底上的N型薄膜晶体管和P型薄膜晶体管。在液晶显示器中，在构成CMOS缓冲器的N型薄膜晶体管和P型薄膜晶体管中，在电路工作期间具有较长截止时间的一个晶体管具有较长的栅极长度比另一个晶体管。

22. 发明授权

US06629191B1 Nonvolatile memory apparatus for storing data from a host 有权
标题翻译：用于存储来自主机的数据的非易失性存储装置
公开(公告)号：US06629191B1
公开(公告)日：2003-09-30
申请号：US09340140
申请日：1999-06-28
申请人： Kunihiro Katayama , Takayuki Tamura , Kazuo Nakamura
发明人： Kunihiro Katayama , Takayuki Tamura , Kazuo Nakamura
IPC分类号： G06F1206
CPC分类号： G06F12/0246 , G06F2212/7211
摘要： In a memory including a flash memory, the life of the memory is prevented from being decreased due to the high frequency of rewrite operations of data to a specific area. When the erasure frequency of a block 301, storing four sectors of data, is high, each sector of block 301 is transferred to different blocks 302-305 to avoid deterioration of the data of block 301 due to the high frequency of rewriting.
摘要翻译：在包括闪速存储器的存储器中，由于将数据重写到特定区域的高频率，防止存储器的寿命减少。当存储四个数据扇区的块301的擦除频率高时，块301的每个扇区被传送到不同的块302-305，以避免由于重写的高频而导致块301的数据的劣化。

23. 发明授权

US06587797B1 Fluid consumption amount-measuring method and apparatus for the same 失效
标题翻译：流体消耗量测量方法和装置
公开(公告)号：US06587797B1
公开(公告)日：2003-07-01
申请号：US09622037
申请日：2001-02-28
申请人： Yuji Kamada , Wataru Sato , Kazuo Nakamura , Nozomi Hayakawa
发明人： Yuji Kamada , Wataru Sato , Kazuo Nakamura , Nozomi Hayakawa
IPC分类号： F16K3112
CPC分类号： G01F15/0755 , G01F1/34 , G01F1/363 , G01F1/40 , G01F1/42
摘要： At first, a stop valve is fully opened to measure a pressure value P1 on the downstream side of the stop valve 66 under this condition. Subsequently, a pressure value P2 on the downstream side of the stop valve is measured when the flow velocity of compressed air flowing through the stop valve is set to be the sound pressure while adjusting the opening degree of the stop valve. Further, a pressure value P3 on the downstream side of the stop valve is measured when an ON/OFF valve is turned ON to release the compressed air from a nozzle. The consumption amount Q of the compressed air flowing through a fluid-operated apparatus is calculated by a calculating unit on the basis of the pressure values P1, P2, P3 and an effective cross-sectional area Sn of the nozzle.
摘要翻译：首先，在该状态下，截止阀完全打开以测量截止阀66的下游侧的压力值P1。随后，当在流过截止阀的压缩空气的流速被设定为声压同时调整截止阀的开度时，测量截止阀下游侧的压力值P2。此外，当ON / OFF阀打开时测量在截止阀下游侧的压力值P3，以从喷嘴释放压缩空气。基于压力值P1，P2，P3和喷嘴的有效截面积Sn，通过计算单元计算流过流体动力装置的压缩空气的消耗量Q。

24. 发明授权

US06359806B1 Memory device 有权
标题翻译：内存设备
公开(公告)号：US06359806B1
公开(公告)日：2002-03-19
申请号：US09558036
申请日：2000-04-26
申请人： Atsushi Nozoe , Kazuo Nakamura , Kunihiro Katayama
发明人： Atsushi Nozoe , Kazuo Nakamura , Kunihiro Katayama
IPC分类号： G11C1606
CPC分类号： G06F11/1068
摘要： A nonvolatile memory device having an error correcting function, capable of outputting read-out data (uncorrected) while simultaneously generating syndromes. After the syndrome formation, the memory device outputs an error status signal (ERR) and, depending on the presence or absence of an externally supplied request (SC), again outputs read-out data (this time corrected).
摘要翻译：一种具有纠错功能的非易失性存储装置，能够在同时产生校正子的同时输出读出数据（未校正）。在综合征形成之后，存储器件输出错误状态信号（ERR），并且根据外部提供的请求（SC）的存在或不存在，再次输出读出数据（此时间被校正）。

25. 发明授权

US06351412B1 Memory card 有权
标题翻译：存储卡
公开(公告)号：US06351412B1
公开(公告)日：2002-02-26
申请号：US09636736
申请日：2000-08-11
申请人： Atsushi Nozoe , Kazuo Nakamura , Kunihiro Katayama
发明人： Atsushi Nozoe , Kazuo Nakamura , Kunihiro Katayama
IPC分类号： G11C1606
CPC分类号： G06F11/1068
摘要： A nonvolatile memory device having an error correcting function, capable of outputting read-out data (uncorrected) while simultaneously generating syndromes. After the syndrome formation, the memory device outputs an error status signal (ERR) and, depending on the presence or absence of an externally supplied request (SC), again outputs read-out data (this time corrected).
摘要翻译：一种具有纠错功能的非易失性存储装置，能够在同时产生校正子的同时输出读出数据（未校正）。在综合征形成之后，存储器件输出错误状态信号（ERR），并且根据外部提供的请求（SC）的存在或不存在，再次输出读出数据（此时间被校正）。

26. 发明授权

US6070221A Interrupt controller 有权
标题翻译：中断控制器
公开(公告)号：US6070221A
公开(公告)日：2000-05-30
申请号：US130350
申请日：1998-08-13
申请人： Kazuo Nakamura
发明人： Kazuo Nakamura
IPC分类号： G06F9/48 , G06F13/26
CPC分类号： G06F13/26
摘要： An interrupt controller comprises a plurality of interrupt handling elements that are given different identification numbers for identification to which priorities are assigned. A first priority encoder accepts a plurality of level signals which are given different level numbers respectively representing the priorities assigned to the identification numbers, and then encodes the level number assigned to the highest-priority level signal included among all level signals at a low potential so as to generate an interrupt level number representing the encoded level number. Each interrupt handling element includes a current-sinking unit for sinking one of the level signals specified by the output of a level number register into a ground so that the specified level signal sinks to a low potential, and a comparator for comparing the level number represented by the output of the level number register with the interrupt level number from the first priority encoder to generate a comparison result signal indicating the comparison result. A second priority encoder accepts a plurality of comparison result signals from the plurality of interrupt handling elements, and then encodes the identification number assigned to one of the interrupt handling elements whose identification number has the highest priority and which is included among all interrupt handling elements each of which has furnished a comparison signal indicating that a corresponding level number is equal to the interrupt level number from the priority encoder so as to generate an interrupt identification number representing the encoded identification number.
摘要翻译：中断控制器包括多个中断处理元件，其被赋予不同的识别号码，用于识别优先级被分配给哪个识别号码。第一优先编码器接受多个电平信号，这些电平信号被分别表示分配给识别号码的优先级的不同电平数字，然后将分配给包括在所有电平信号中的最高优先级电平信号的电平编码为低电位编码以产生表示编码级数的中断级数。每个中断处理元件包括电流吸收单元，用于将由电平数寄存器的输出指定的电平信号中的一个信号吸入地，以使指定的电平信号陷入低电位;以及比较器，用于比较表示的电平数通过电平数量寄存器的输出与来自第一优先级编码器的中断级别编号，以产生指示比较结果的比较结果信号。第二优先级编码器接受来自多个中断处理单元的多个比较结果信号，然后对分配给识别号码具有最高优先级的中断处理单元之一的识别号进行编码，并将其包括在所有中断处理单元中其中提供了一个比较信号，指示对应的电平数等于来自优先编码器的中断电平数，以产生表示编码的识别号的中断识别号。

27. 发明授权

US5937375A Voice-presence/absence discriminator having highly reliable lead portion detection 失效
标题翻译：具有高可靠性的引线部分检测的声音/不存在鉴别器
公开(公告)号：US5937375A
公开(公告)日：1999-08-10
申请号：US758250
申请日：1996-11-27
申请人： Kazuo Nakamura
发明人： Kazuo Nakamura
IPC分类号： G10L11/02 , G10L11/06 , G10L15/04 , G10L9/18
CPC分类号： G10L25/78
摘要： A voice presence/absence discriminator can accurately determine the presence or absence of a voice in a frame that includes an uttered syllable head portion of an input voice and avoids performing erroneous determinations in bad environments such as those where background noise is of a high magnitude. In a sub-frame power calculation section, a sub-frame power Pm is calculated in units of sub-frames prepared by dividing a frame into four sub-frame portions. Based on this sub-frame power Pm, in a frame maximum power production section, a moving average (short-period average value) of the power of a sub-frame and the power of a sub-frame that precedes this sub-frame by one unit are calculated in units of a sub-frame and the short-period average values are compared with each other among the sub-frames that constitute the same frame to thereby select a maximum one of them as the frame maximum power Pf of this frame. As a result, even when voicing has been started from an ending half of the frame, there is no possibility that the frame maximum power Pf will be determined to be small in magnitude and this frame is reliably determined to be a voice presence frame in a voice presence determination portion.
摘要翻译：语音存在/不存在鉴别器可以准确地确定包括输入语音的发音音节头部的帧中的语音的存在或不存在，并且避免在恶劣环境（例如背景噪声为高大小的那些环境）中执行错误确定。在子帧功率计算部分中，以通过将帧划分为四个子帧部分而准备的子帧为单位计算子帧功率Pm。基于该子帧功率Pm，在帧最大功率产生部中，子帧的功率的移动平均（短周期平均值）和在该子帧之前的子帧的功率由以子帧为单位计算一个单位，并且在构成相同帧的子帧之间比较短周期平均值，从而选择其中最大的一个作为该帧的帧最大功率Pf 。结果，即使从帧的结束一半开始发声，也不可能将帧最大功率Pf确定为小幅度，并且该帧被可靠地确定为是在帧的最大功率Pf中的语音存在帧语音存在确定部分。

28. 发明授权

US5708800A High speed microprocessor for processing and transferring N-bits of M-bit data 失效
标题翻译：用于处理和传送N位M位数据的高速微处理器
公开(公告)号：US5708800A
公开(公告)日：1998-01-13
申请号：US487170
申请日：1995-06-07
申请人： Hiroshi Tateishi , Hiroki Takahashi , Kazuo Nakamura
发明人： Hiroshi Tateishi , Hiroki Takahashi , Kazuo Nakamura
IPC分类号： G06F12/04 , G06F5/00 , G06F9/30 , G06F9/315 , G06F7/10
CPC分类号： G06F5/00
摘要： A microprocessor comprises a control section for receiving a transfer instruction and transferring N-bits of M-bit data stored at a transfer-source address in a first memory to a transfer-destination address in a second memory in response to a received transfer instruction. In this microprocessor, the transfer of N-bits is performed with the execution of a single transfer instruction. Hence, the memory area required for storing the transfer instructions is reduced, and the residual memory area can be used for other purposes, which improves the efficiency in the use of the memory. The control section stores in the first memory of the microprocessor all the interim results obtained during the execution of a transfer instruction and outputs only the final result to the external memory, reducing the number of machine cycles required for data transfer between the microprocessor and the memory, and further reducing the execution time for data transfer in the microprocessor.
摘要翻译：微处理器包括控制部分，用于响应于接收到的传送指令，接收传送指令并将存储在第一存储器中的传送源地址的N位的M位数据传送到第二存储器中的传送目的地地址。在该微处理器中，通过执行单个传送指令来执行N位的传送。因此，存储转移指令所需的存储区域减少，并且剩余存储区域可以用于其他目的，这提高了存储器的使用效率。控制部分在微处理器的第一存储器中存储在执行传送指令期间获得的所有中间结果，并且仅将最终结果输出到外部存储器，从而减少微处理器和存储器之间的数据传送所需的机器周期数并且进一步减少微处理器中的数据传输的执行时间。

29. 发明授权

US5442466A Plate sheet conveying mechanism having integrally formed sheet guide 失效
标题翻译：具有一体形成的片材引导件的片材输送机构
公开(公告)号：US5442466A
公开(公告)日：1995-08-15
申请号：US88387
申请日：1993-07-09
申请人： Shinji Kameyama , Takeo Yoshihiro , Yoshiki Aoyama , Kazuo Nakamura , Shuichi Akedo , Masayuki Mizuno
发明人： Shinji Kameyama , Takeo Yoshihiro , Yoshiki Aoyama , Kazuo Nakamura , Shuichi Akedo , Masayuki Mizuno
IPC分类号： H04N1/00 , H04N1/12 , H04N1/193 , H04N1/04
CPC分类号： H04N1/00588 , H04N1/00519 , H04N1/0057 , H04N1/00591 , H04N1/00602 , H04N1/121 , H04N1/193 , H04N2201/02404
摘要： In one of aspects of the invention, an automatic sheet conveying mechanism comprises upper and lower casings mutually coupling sheet conveying paths in a releasable state, and a sheet guide plate for partitioning the sheet conveying paths together with the lower casing, guiding the lower surface of the sheet being conveyed, and defining the projecting extent of the functional parts supported by the lower casing into the sheet conveying path, in which the sheet guide plate is formed integrally with the lower casing.
摘要翻译：在本发明的一个方面，自动片材输送机构包括上下壳体，其相互联接片材输送路径处于可释放状态;以及片材引导板，用于将片材输送路径与下壳体一起分隔，引导下表面片材被输送，并且将由下壳体支撑的功能部件的突出范围限定为片材输送路径，其中片材引导板与下壳体一体地形成。

30. 发明授权

US5343081A Synapse circuit which utilizes ballistic electron beams in two-dimensional electron gas 失效
标题翻译：在二维电子气中利用弹道电子束的突触电路
公开(公告)号：US5343081A
公开(公告)日：1994-08-30
申请号：US933118
申请日：1992-08-21
申请人： Kazuo Nakamura
发明人： Kazuo Nakamura
IPC分类号： H01L29/06 , G06G7/60 , G06N3/063 , H01L27/10 , H01L29/00 , H01L29/66 , H01L29/76 , H01L29/80 , H01L39/22 , H03K19/195 , G06G7/12 , H01J17/36
CPC分类号： H01L29/7606 , G06N3/0635 , Y10S250/91
摘要： According to the present invention, there is provided a semiconductor synapse circuit comprising a semiconductor having an electrically charged carrier gas which is provided with a plurality of electrically isolated input channels providing narrowed areas 21 through 24 respectively for restricting the emitting direction of the electrically charged carriers from emitter electrodes 11 through 14 as the exit, gate electrodes 31 through 34 for applying an electrostatic potential for changing the traveling direction of the carriers emitted from the input channels, a single narrowed area 41 positioned opposed to the exits 21 through 24 of the input channels for passing through only the carriers traveling in the restricted direction and an acceptor electrode 40 for collecting the carriers which have passed through the single narrowed area.Since it utilizes the ballistic performance of the carriers, as compared with the conventionally proposed circuit, a synapse circuit whose area is greatly reduced and whose operating speed is improved can be realized. Thus, it becomes possible to further improve the degree of integration and reduce the delay time at the line.
摘要翻译：根据本发明，提供了一种半导体突触电路，其包括具有带电荷的载气的半导体，该半导体具有多个电隔离的输入通道，该多个电隔离的输入通道分别用于限制带电载体的发射方向从作为出射口的发射电极11至14，用于施加用于改变从输入通道发射的载流子的行进方向的静电电位的栅电极31至34，与输入端的出口21至24相对定位的单个变窄区域41 用于仅通过在限制方向上行进的载体的通道和用于收集已经通过单个变窄区域的载体的受电极40。由于利用载波的弹道性能，与现有技术的电路相比，可以实现面积大大降低，工作速度提高的突触电路。因此，可以进一步提高集成度并减少线路上的延迟时间。

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