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21. 发明授权

US5216424A Binary data converter 失效
标题翻译：二进制数据转换器
公开(公告)号：US5216424A
公开(公告)日：1993-06-01
申请号：US707145
申请日：1991-05-31
申请人： Hiroyuki Kouno , Sumitaka Takeuchi , Keisuke Okada
发明人： Hiroyuki Kouno , Sumitaka Takeuchi , Keisuke Okada
IPC分类号： G06F7/38 , G06F7/48 , H03M7/04
CPC分类号： H03M7/04 , G06F7/48
摘要： A binary data converter is adapted to convert a positive binary data into a negative binary data represented by a complement on two and vice verse. The conversion is effected as follows. A least significant bit of an inputted binary data is outputted as the least significant bit of the converted binary date as it is. With respect to bit signal other than the least significant bit, respective input bit signals less significant than the corresponding input bit signal are ORed. Depending on the result thereof, inverted or non-inverted signals of the corresponding input bit signals are outputted as the bit signals of the converted binary data. Therefore, carry delay is not generated, and thus the operation speed can be increased. Further, the simple circuit structures can reduce the number of required elements.
摘要翻译：二进制数据转换器适于将正二进制数据转换成由二进制补码表示的负二进制数据。转换如下进行。输入的二进制数据的最低有效位作为转换的二进制日期的最低有效位被原样输出。对于除了最低有效位之外的位信号，相对于相应的输入位信号而言，相对于输入位信号的有效值为“或”。根据其结果，相应的输入位信号的反相或非反转信号作为转换的二进制数据的位信号被输出。因此，不产生进位延迟，能够提高运转速度。此外，简单的电路结构可以减少所需元件的数量。

22. 发明授权

US4903027A A/D converter comprising encoder portion having function of multiplying analogue input by digital input 失效
标题翻译： A / D转换器包括具有通过数字输入将模拟输入相乘的编码器部分
公开(公告)号：US4903027A
公开(公告)日：1990-02-20
申请号：US159405
申请日：1988-02-11
申请人： Sumitaka Takeuchi , Keisuke Okada
发明人： Sumitaka Takeuchi , Keisuke Okada
IPC分类号： H03M1/14 , G06J1/00 , H03M1/36
CPC分类号： G06J1/00 , H03M1/365
摘要： An A/D converter of a serial-parallel comparison type has both multiplying functions of an analog input data and a digital input data. The analog input data V.sub.X is converted into a digital code I.sub.c corresponding to two more significant digits, by a first parallel comparing portion and a first determining circuit, and converted into a digital code I.sub.f corresponding to two less significant digits by a second parallel comparing portion and a second determining circuit. The digital codes I.sub.c and I.sub.f are alternately applied to a control circuit by a first selector circuit. Two more significant bits R.sub.c and two less significant bits R.sub.f of a 4-bit digital input data are respectively applied to a control signal generating circuit by a second selector circuit. Multiplications of R.sub.c I.sub.c, RfIc, R.sub.c I.sub.f and R.sub.f I.sub.f are serially performed within the time period of one conversion by the control signal generating circuit and the control circuit. The multiplied results are shifted four bits, two bits, two bits and 0 bits, respectively, and then, added to each other. As a result, the product of the analogue input data and the digital input data is calculated.
摘要翻译：并行比较型的A / D转换器具有模拟输入数据和数字输入数据的乘法功能。通过第一并行比较部分和第一确定电路将模拟输入数据VX转换成对应于两个有效数字的数字代码Ic，并且被转换成数字代码如果对应于由第二并行比较部分的两个较低有效数字和第二确定电路。数字代码Ic和If由第一选择器电路交替地施加到控制电路。 4位数字输入数据的两个有效位Rc和两个较低有效位Rf由第二选择器电路分别施加到控制信号发生电路。 RcIc，RfIc，RcIf和RfIf的乘法在控制信号发生电路和控制电路的一次转换的时间段内连续执行。相乘的结果分别移位四位，两位，两位和0位，然后相加。结果，计算模拟输入数据和数字输入数据的乘积。

23. 发明授权

US4896284A Semiconductor integrated circuit for multiplying analog and digital values 失效
标题翻译：用于将模拟和数字值相乘的半导体集成电路
公开(公告)号：US4896284A
公开(公告)日：1990-01-23
申请号：US226636
申请日：1988-08-01
申请人： Sumitaka Takeuchi , Keisuke Okada , Masatoshi Kimura
发明人： Sumitaka Takeuchi , Keisuke Okada , Masatoshi Kimura
IPC分类号： H03M1/36 , G06F7/52 , G06J1/00
CPC分类号： G06J1/00 , G06F7/523 , H03M1/365
摘要： A semiconductor integrated circuit so arranged that selection is made out of output signals of a decision circuit which determines the levels of analog values inputted as an object for multiplication and multiplication is carried out with respect to the selected signal and the digital value inputted as an object for multiplication, the result of the multiplication being added with the digital value as shifted to the higher position of specified bits, a multiplication result being thereby calculated with respect to the analog value and the digital value, whereby the required area of wiring connections is reasonably reduced and faster operation is assured.
摘要翻译：一种半导体集成电路，其被配置为根据所选择的信号和作为对象输入的数字值，执行确定作为乘法和乘法对象输入的模拟值的电平的判定电路的输出信号的选择为了乘法，乘法的结果被加上移动到指定位的较高位置的数字值，由此相对于模拟值和数字值计算乘法结果，由此所需的接线连接面积是合理的减少和更快的操作得到保证。

24. 发明授权

US4799009A Semiconductor testing device 失效
标题翻译：半导体测试装置
公开(公告)号：US4799009A
公开(公告)日：1989-01-17
申请号：US479117
申请日：1983-03-31
申请人： Tetsuo Tada , Keisuke Okada
发明人： Tetsuo Tada , Keisuke Okada
IPC分类号： G01R31/26 , G01R1/073 , G01R31/28 , H01L21/66 , G01R1/06 , G01R31/02
CPC分类号： H01L22/00 , G01R1/07342 , G01R31/2886 , H01L2924/0002
摘要： A wafer testing device in which a plurality of wafers can be tested simultaneously significantly reducing the time required for testing each chip. A prober is provided which receives a wafer to be tested. A probe card is coupled to the prober having a window through which a plurality of semiconductor memory chips on the wafer are observable. A plurality of probes are coupled to the periphery of the window in such a manner that the probes can be brought into contact with bonding pads on the plurality of semiconductor memory chips. A tester is connected to the probes which is capable of simultaneously testing each of the plurality of chips.
摘要翻译：可以同时测试多个晶片的晶片测试装置显着地减少了测试每个芯片所需的时间。提供一个接收要测试的晶片的探测器。探针卡耦合到具有窗口的探测器，通过该窗口可以观察到晶片上的多个半导体存储器芯片。多个探针以这样的方式联接到窗口的周边，使得探针可以与多个半导体存储器芯片上的接合焊盘接触。测试器连接到能够同时测试多个芯片中的每一个的探头。

25. 发明授权

US07927025B2 Optical fiber branch cable, method of wiring the same, and method of providing the same 有权
标题翻译：光纤分支电缆，接线方法及其提供方法
公开(公告)号：US07927025B2
公开(公告)日：2011-04-19
申请号：US12085528
申请日：2007-02-15
申请人： Kenichiro Ohtsuka , Katsuyuki Aihara , Keisuke Okada , Masaji Yahagi , Hiroshi Nagai , Hideaki Tajima , Kimio Ito , Toshiyuki Igarashi
发明人： Kenichiro Ohtsuka , Katsuyuki Aihara , Keisuke Okada , Masaji Yahagi , Hiroshi Nagai , Hideaki Tajima , Kimio Ito , Toshiyuki Igarashi
IPC分类号： G02B6/38 , G02B6/44
CPC分类号： G02B6/4471 , G02B6/4475
摘要： An optical fiber branch cable is provided that comprises a branch portion disposed stably with respect to a multi-core optical fiber cable of a trunk line from which branching is performed, that is excellent in handleability as a cable, and that exhibits high workability.In the optical fiber branch cable of the invention, in a middle of a multi-core optical fiber cable 2 of a trunk line, a branch portion 11 is disposed. The branch portion 11 has: a base member 16 which is attached so as to cover a tensile-strength wire 9 in a portion where a cable jacket 10 of the multi-core optical fiber cable 2 is removed away; a multi-core optical connector 30 which is connected to the tip end of a tape unit 4 drawn out from the multi-core optical fiber cable 2; an extra-length housing portion 18 which houses an extra length of the tape unit 4 to which the multi-core optical connector 30 is connected; and a connector attaching portion 19 to which the multi-core optical connector 30 is attachable in a plural number.
摘要翻译：提供一种光纤分支电缆，其包括相对于执行分支的中继线的多芯光纤线缆稳定地设置的分支部分，其作为电缆的可处理性优异并且表现出高的可加工性。在本发明的光纤分支电缆中，在中继线的多芯光缆2的中间配置有分支部11。分支部分11具有：基部构件16，其被附接成在多芯光缆2的电缆护套10被去除的部分中覆盖抗拉强度线9; 连接到从多芯光缆2引出的带单元4的前端的多芯光连接器30; 一个额外长度的容纳部分18，其容纳多芯光学连接器30连接到的带单元4的额外长度; 多芯光连接器30可连接多个的连接器安装部19。

26. 发明申请

US20110042001A1 MANUFACTURING METHOD FOR PLASMA DISPLAY PANEL 失效
标题翻译：等离子显示面板的制造方法
公开(公告)号：US20110042001A1
公开(公告)日：2011-02-24
申请号：US12990199
申请日：2010-02-25
申请人： Masahiro Sakai , Keisuke Okada , Yayoi Okui
发明人： Masahiro Sakai , Keisuke Okada , Yayoi Okui
IPC分类号： B29C65/02 , B32B37/00
CPC分类号： H01J9/385 , H01J9/39 , H01J9/395 , H01J11/12 , H01J11/52
摘要： The present invention aims to provide a manufacturing method for a PDP which allows even high-definition and ultra-high-definition PDPs to demonstrate an excellent image display capability at improved luminous efficiency, by suppressing variation of a discharge gas composition, and by eliminating an impurity gas in a discharge space effectively.To achieve the aim, deterioration of an absorbent material 39 composed of copper ion-exchanged ZSM-5-type zeolite is prevented, by performing both sealing and evacuation steps for the front substrate 2 and back substrate 9 in a non-oxidizing gas atmosphere. This maintains properties of the absorbent material 39 for absorbing the impurity gas without degradation, even if the absorbent material 39 absorbs a Xe gas in a discharge gas introducing step.
摘要翻译：本发明的目的在于提供一种PDP的制造方法，其通过抑制放电气体成分的变化，能够使均匀的高分辨率和超高分辨率的PDP以提高的发光效率显示出优异的图像显示能力，有效排放空间中的杂质气体。为了达到目的，通过在非氧化性气体气氛中对前基板2和后基板9进行密封和抽空步骤，防止由离子交换的ZSM-5型沸石组成的吸收材料39的劣化。即使吸收材料39在放电气体导入工序中吸收Xe气体，也能够保持吸收材料39的吸收杂质气体而不劣化的特性。

27. 发明授权

US07501762B2 Plasma display panel and process for producing the same 失效
标题翻译：等离子显示面板及其制造方法
公开(公告)号：US07501762B2
公开(公告)日：2009-03-10
申请号：US11484590
申请日：2006-07-12
申请人： Tomohiro Okumura , Hiroyuki Yamakita , Noriyasu Echigo , Mitsuo Saitoh , Junko Asayama , Keisuke Okada
发明人： Tomohiro Okumura , Hiroyuki Yamakita , Noriyasu Echigo , Mitsuo Saitoh , Junko Asayama , Keisuke Okada
IPC分类号： H01J17/49
CPC分类号： H01J9/02 , H01J11/12 , H01J11/38
摘要： There are provided a PDP having a higher luminous efficiency and a process for producing the same. In a plasma display panel filled with a discharge gas between a front plate and a rear plate opposed to each other, the front plate 100 comprises a glass substrate 1, electrodes 2 (transparent electrodes 2a and bus electrodes 2b) on the glass substrate 1, the first dielectric layer 4 covering the electrodes 2 and the glass substrate 1 and containing a fluorine atom, the second dielectric layer 5 covering the first dielectric layer 4 and containing a fluorine atom at a less amount than that in the first dielectric layer 4, and a protective layer 6 covering the second dielectric layer 5.
摘要翻译：提供了具有较高发光效率的PDP及其制造方法。在前板和背板之间填充有放电气体的等离子体显示面板中，前板100包括玻璃基板1，玻璃基板1上的电极2（透明电极2a和总线电极2b）覆盖电极2和玻璃基板1并含有氟原子的第一电介质层4，覆盖第一电介质层4并且含有比第一介电层4中的氟原子少的氟原子的第二电介质层5，以及覆盖第二电介质层5的保护层6。

28. 发明授权

US07151879B2 Optical fiber ribbon that is easily branched into individual optical fibers and optical fiber cable using the same 有权
标题翻译：易于分支成单个光纤的光纤带和使用其的光纤电缆
公开(公告)号：US07151879B2
公开(公告)日：2006-12-19
申请号：US10702076
申请日：2003-11-06
申请人： Hiroki Ishikawa , Kaoru Okuno , Atsushi Suzuki , Tomoyuki Hattori , Itaru Sakabe , Keisuke Okada , Hisashi Tanji
发明人： Hiroki Ishikawa , Kaoru Okuno , Atsushi Suzuki , Tomoyuki Hattori , Itaru Sakabe , Keisuke Okada , Hisashi Tanji
IPC分类号： G02B6/06
CPC分类号： G02B6/4403 , G02B6/441 , G02B6/4411
摘要： A plurality of optical fibers are arranged in parallel and peripheries of the plurality of these optical fibers are integrally formed using a sheath. Here, the sheath is formed over the entire length of optical fiber ribbons and a flat portion of the sheath is formed substantially parallel to a common tangent of the neighboring optical fibers. A maximum value of a thickness of the optical fiber ribbons is set to a value which is larger than an outer diameter of the optical fibers by 40 μm or less. Due to such a constitution, it is possible to easily branch the optical fibers from the integrally formed optical fiber ribbons.
摘要翻译：多根光纤平行配置，并且使用护套将多根光纤的周边整体地形成。这里，护套形成在光纤带的整个长度上，并且护套的平坦部分基本上平行于相邻光纤的公切线形成。将光纤带的厚度的最大值设定为大于光纤的外径40μm以下的值。由于这样的结构，可以容易地从整体形成的光纤带分支光纤。

29. 发明授权

US5146479A Up/down counter for counting binary data stored in flip flops 失效
标题翻译：用于计数存储在触发器中的二进制数据的上/下计数器
公开(公告)号：US5146479A
公开(公告)日：1992-09-08
申请号：US709580
申请日：1991-06-05
申请人： Keisuke Okada , Masatoshi Kimura
发明人： Keisuke Okada , Masatoshi Kimura
IPC分类号： H03K23/00 , G06F7/50 , G06F7/505
CPC分类号： G06F7/5055
摘要： An updown counter up-counts binary data stored in respective flip-flops in an up-count mode, and down-counts the binary data stored in the respective flip-flops in a down-count mode. When a command for an up-count mode is applied by an up/down control signal, the binary data stored in the respective flip-flops is converted into a complement on two after converting it into a complement on one. When a command for a down-count mode is applied by an up/down control signal, the binary data stored in the respective flip-flops is converted into a complement on one after converting it into a complement on two. The converted data is used to rewrite the data stored in the respective flip-flops.
摘要翻译：上升计数器以递增计数模式对存储在相应触发器中的二进制数据进行递增计数，并且以递减计数模式对存储在各个触发器中的二进制数据进行下计数。当通过向上/向下控制信号施加递增计数模式的命令时，存储在各个触发器中的二进制数据在将其转换成一个补码后被转换为二进制补码。当通过上/下控制信号施加递减计数模式的命令时，存储在各个触发器中的二进制数据在将其转换成二进制补码之后被转换成一个补码。转换的数据用于重写存储在各个触发器中的数据。

30. 发明授权

US5099171A Cathode-ray tube panel having thin conductive film 失效
标题翻译：具有导电薄膜的阴极射线管板
公开(公告)号：US5099171A
公开(公告)日：1992-03-24
申请号：US465177
申请日：1990-02-26
申请人： Nobutaka Daiku , Keisuke Okada
发明人： Nobutaka Daiku , Keisuke Okada
IPC分类号： H01J29/86 , H01J29/88
CPC分类号： H01J29/861 , H01J29/868
摘要： A cathode-ray tube panel, wherein the outer surface (12) of the cathode-ray tube panel (10) is made in the form of a roughened surface (14) having microscopic irregularities and the roughened surface is formed with a thin electrically conductive film (15) made of SnO.sub.2 and Sb.sub.2 O.sub.3, thereby making the panel both antistatic and antireflective.
摘要翻译： PCT No.PCT / JP88 / 00786 Sec。 371日期1990年2月26日 102（e）1990年2月26日PCT PCT公布1988年8月8日PCT。出版物WO90 / 01790 日本1990年2月22日。一种阴极射线管面板，其中阴极射线管板（10）的外表面（12）制成具有微小凹凸的粗糙表面（14）的形式，粗糙表面形成有由SnO 2和Sb 2 O 3制成的薄导电膜（15），从而使面板具有抗静电和抗反射性。

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