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    • 21. 发明申请
    • SHIELD CONNECTOR
    • 屏蔽连接器
    • US20110195603A1
    • 2011-08-11
    • US13017121
    • 2011-01-31
    • Michiyo FujiwaraMasaki Okamoto
    • Michiyo FujiwaraMasaki Okamoto
    • H01R13/648
    • H01R13/6596H01R13/745H01R13/748H01R2201/26
    • A shield connector (30) has a housing (40) with a terminal mounting portion (41), a receptacle (55) and a mounting flange (61). Male terminals (31) are mounted in the terminal mounting portion (41) and have tabs that project into the receptacle (55). A shield shell (100) including a shell main body (110) and resilient contact pieces (120) for grounding the shell main body (110) to a mounting member. The resilient contact pieces (120) have leading ends (121) accommodated in accommodating portions (67) formed in the mounting flange (61), and the housing (40) includes protection walls (70) located lateral to the resilient contact pieces (120).
    • 屏蔽连接器(30)具有带有端子安装部分(41),插座(55)和安装凸缘(61)的壳体(40)。 公端子(31)安装在端子安装部分(41)中并且具有突出到插座(55)中的突片。 一种包括壳主体(110)和用于将壳主体(110)接地到安装构件的弹性接触片(120)的屏蔽壳(100)。 弹性接触件(120)具有容纳在安装凸缘(61)中形成的容纳部分(67)中的前端(121),壳体(40)包括位于弹性接触件(120)侧面的保护壁 )。
    • 22. 发明授权
    • Memory controller having a plurality of memory regions for protection against power failure
    • 存储器控制器具有用于防止电源故障的多个存储区域
    • US07925843B2
    • 2011-04-12
    • US11032213
    • 2005-01-11
    • Keizo UenoMasaki Okamoto
    • Keizo UenoMasaki Okamoto
    • G06F13/14
    • G11C16/102
    • A memory controller (1) writes data continuously to a first and a second blocks (20A), (20B) which are provided by dividing a memory region of a nonvolatile memory (2), and reads the data therefrom. The controller includes: a first writer (12A) which writes data to the first block (20A); and a second writer (12B) which writes data to the second block (20B) after completion of the writing by the first writer (12A) and a lapse of a waiting time generally equal to a length of time necessary for a power breakdown to drop a power source voltage down to a voltage value to at least disable the writing of data to the memory region.
    • 存储器控制器(1)将数据连续地写入通过划分非易失性存储器(2)的存储区域而提供的第一和第二块(20A),(20B),并从其读取数据。 控制器包括:向第一块(20A)写入数据的第一写入器(12A); 以及在由第一写入器(12A)写入完成之后将数据写入第二块(20B)的第二写入器(12B)以及通常等于功率击穿所需时间长度下降的等待时间的下降 将电源电压降低到电压值以至少禁止将数据写入存储器区域。
    • 26. 发明申请
    • Method of manufacturing semiconductor device and semiconductor device
    • 制造半导体器件和半导体器件的方法
    • US20060186548A1
    • 2006-08-24
    • US11346890
    • 2006-02-03
    • Yoshiyuki EnomotoHiroyuki KawashimaMasaki Okamoto
    • Yoshiyuki EnomotoHiroyuki KawashimaMasaki Okamoto
    • H01L23/52
    • H01L23/53295H01L21/76808H01L21/76811H01L21/76813H01L21/76814H01L21/76829H01L21/76832H01L21/76835H01L21/76838H01L23/5226H01L23/53238H01L23/5329H01L2924/0002H01L2924/00
    • The present invention provides a method of manufacturing a semiconductor device and a semiconductor device that allow use of interlayer and interconnect insulating films having a low dielectric constant in forming a dual damascene structure. A first insulating film, a second insulating film, a first-mask forming layer, a second-mask forming layer, a third-mask forming layer, and a fourth-mask forming layer are sequentially deposited over a substrate. The fourth-mask forming layer is patterned to form a fourth mask having an interconnect trench pattern. After a resist mask is formed on the fourth mask, the layers to the second insulating film are etched to open via holes. The third-mask forming layer is etched through the fourth mask to thereby form a third mask having the interconnect trench pattern and to extend the via holes downward partway across the first insulating film. The second-mask forming layer is etched through the fourth mask to thereby form a second mask having the interconnect trench pattern, and the first insulating film that remains under the bottoms of the via holes is removed. Subsequently, the second insulating film is etched through the second mask to thereby form an interconnect trench, and then the second mask is removed.
    • 本发明提供一种制造半导体器件和半导体器件的方法,该半导体器件和半导体器件允许在形成双镶嵌结构时使用具有低介电常数的中间层和互连绝缘膜。 第一绝缘膜,第二绝缘膜,第一掩模形成层,第二掩模形成层,第三掩模形成层和第四掩模形成层依次沉积在衬底上。 图案化第四掩模形成层以形成具有互连沟槽图案的第四掩模。 在第四掩模上形成抗蚀剂掩模之后,蚀刻到第二绝缘膜的层以打开通孔。 通过第四掩模蚀刻第三掩模形成层,从而形成具有互连沟槽图案的第三掩模,并且在第一绝缘膜上向下延伸通孔。 通过第四掩模蚀刻第二掩模形成层,从而形成具有互连沟槽图案的第二掩模,并且去除留在通孔底部的第一绝缘膜。 随后,通过第二掩模蚀刻第二绝缘膜,从而形成互连沟槽,然后去除第二掩模。
    • 27. 发明申请
    • Novel crystals of triazaspiro [5.5] undecane derivative
    • 三氮杂螺[5.5]十一烷衍生物的新晶体
    • US20060052407A1
    • 2006-03-09
    • US10527193
    • 2003-09-17
    • Yoshikazu TakaokaMasaki OkamotoYuuichi Genba
    • Yoshikazu TakaokaMasaki OkamotoYuuichi Genba
    • A61K31/4747C07D471/10
    • C07D471/10
    • The present invention relates to a new crystal of triazaspiro[5.5]undecane derivatives. The crystal of a non-solvate of (3R)-1-butyl-2,5-dioxo-3-[(1R)-1-hydroxy-1-cyclohexylmethyl]-9-[4-(4-carboxyphenyloxy)phenylmethyl]-1,4,9-triazaspiro[5.5]undecane hydrochloride have safety as drug substance, and have possibility to supply at large scale. And the crystal have an antagonistic activity against the interaction between chemokine and chemokine receptor, therefore, it is useful for manufacture of an agent for treating and/or preventing diseases such as various inflammatory diseases, asthma, atopic dermatitis, nettle rash, allergy disease, nephritis, nephropathy, hepatitis, arthritis, chronic rheumatoid arthritis, autoimmune disease, transplanted organ rejection reactions, acquired immunodeficiency syndrome and the like.
    • 本发明涉及三氮杂螺[5.5]十一烷衍生物的新晶体。 (3R)-1-丁基-2,5-二氧代-3 - [(1R)-1-羟基-1-环己基甲基] -9- [4-(4-羧基苯氧基)苯基甲基] -1,4,9-三氮杂螺[5.5]十一烷盐酸盐作为药物具有安全性,具有大规模供应的可能性。 并且晶体对趋化因子和趋化因子受体之间的相互作用具有拮抗作用,因此可用于制备用于治疗和/或预防各种炎性疾病,哮喘,特应性皮炎,荨麻疹,过敏性疾病, 肾炎,肾病,肝炎,关节炎,慢性类风湿关节炎,自身免疫性疾病,移植器官排斥反应,获得性免疫缺陷综合征等。
    • 30. 发明授权
    • Terminal fitting for a wedge-base bulb and a bulb socket comprising such a terminal fitting
    • 用于楔形灯泡的端子接头和包括这种端子接头的灯泡座
    • US06217387B1
    • 2001-04-17
    • US09223539
    • 1998-12-30
    • Hisashi SawadaMasaki Okamoto
    • Hisashi SawadaMasaki Okamoto
    • H01K100
    • H01R33/09H01R43/16
    • A high strength terminal fitting 30 for a wedge-base bulb is provided which is not likely to be deformed while being assembled into a bulb socket. The terminal fitting 30 is provided with a pair of holding pieces 35, and a tab 31 formed by bending a portion of one holding piece 35R to have a steplike shape is provided with a tab side portion 38 extending toward the other holding piece 35L. A first small projection 39A of a receiving portion 39 formed by bending the other holding piece 35L1 is placed on the upper surface of the tab side portion 38. Even if the tab side portion 38 continuous with the tab 31 tries to undergo an upward displacement upon being subjected to an insertion resistance which acts during the insertion of the tab 31 into a tab mount hole 25 formed in a bulb socket 20, the first small projection 39A of the receiving porion 39 restricts the upward displacement of the tab side portion 38, thereby preventing the deformation thereof.
    • 提供了一种用于楔形灯泡的高强度端子接头30,其在组装到灯泡插座中时不容易变形。 端子配件30设置有一对保持片35,并且将具有台阶状的一个保持片35R的一部分弯曲而形成的突片31设置有朝向另一保持片35L延伸的突片侧部38。 通过弯曲另一保持片35L1形成的接收部分39的第一小突起39A被放置在突片侧部分38的上表面上。即使与突片31连续的突片侧部分38试图经受向上移位, 在将突片31插入形成在灯泡插座20中的突片安装孔25中时受到插入阻力的作用,接收部分39的第一小突起39A限制突出部侧部分38的向上移位,从而 防止其变形。