专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明专利

CA2420378C NON-VOLATILE PASSIVE MATRIX AND METHOD FOR READOUT OF THE SAME 未知
公开(公告)号：CA2420378C
公开(公告)日：2006-05-09
申请号：CA2420378
申请日：2001-08-24
申请人： THIN FILM ELECTRONICS ASA
发明人： CARLSSON JOHAN , GUSTAFSSON GORAN , WOMACK RICHARD , THOMPSON MICHAEL
IPC分类号： G11C11/22 , G11C5/02 , G11C7/06 , G11C7/10 , G11C8/12 , G11C8/14 , H01L21/8246 , H01L27/105
摘要： In a non-volatile passive matrix memory device (10) comprising an electrical ly polarizable dielectric memory material (12) exhibiting hysteresis between first and second sets (14; 15) of addressing electrodes constituting word lines (WL) and bit lines (BL) of the memory device. A memory cell (13) is defined in the memory material (12) at the overlap between a word line (WL) and a bit line (BL). The word lines (WL) are divided into segments (S) each segment sharing and being defined by adjoining bit lines (BL). Means (25) ar e provided for connecting each bit lines (BL) of a segment (S) with a sensing means (26) enabling simultaneous connections of all memory cells (13) of a word line segment (15) for readout via the bit lines (BL). Each sensing mean s (26) senses the charge flow in a bit line (BL) in order to determine a store d logicalvalue. In a readout method,a word line (WL) of a segment (S) is activated by setting its potential to a switching voltage Vs of the memory cell (13) during at least a portion of a read cycle, while keeping the bit lines (BL) of a segment (S) at zero potential, during which read cycle a logical value stored in the individual memory cells (13) is sensed by the sensing means (26).

22. 发明专利

ES2251519T3 DISPOSITIVO SENSOR PARA MEMORIA DE MATRIZ PASIVA Y METODO DE LECTURA CORRESPONDIENTE. 未知
公开(公告)号：ES2251519T3
公开(公告)日：2006-05-01
申请号：ES01984547
申请日：2001-08-24
申请人： THIN FILM ELECTRONICS ASA
发明人： THOMPSON MICHAEL , WOMACK RICHARD
IPC分类号： G11C11/22 , G11C27/02 , G11C11/15 , G11C7/06
摘要： Un dispositivo sensor (10) para leer datos almacenados en una memoria de matriz pasiva consistente en celdas de memoria en forma de condensadores ferroeléctricos, en el que el referido dispositivo sensor (10) detecte una respuesta de corriente correspondiente a los datos, típicamente un uno binario o un cero binario, y realice una integración de dos valores de lectura, caracterizado porque el dispositivo sensor (10) incorpore un circuito integrador (11) para detectar la respuesta de corriente y medios (16, 17, 18) para almacenar y comparar dos valores de lectura consecutivos obtenidos en una salida (15) del circuito integrador (11).

23. 发明专利

CA2555581A1 NON-SWITCHING PRE-AND POST-DISTURB COMPENSATIONAL PULSES 未知
公开(公告)号：CA2555581A1
公开(公告)日：2005-08-25
申请号：CA2555581
申请日：2005-02-07
申请人： THIN FILM ELECTRONICS ASA
发明人： KARLSSON CHRISTER , WOMACK RICHARD , THOMPSON MICHAEL O , BJORKLID STAFFAN , HAMBERG PER
IPC分类号： G11C11/22 , G11C8/18 , G11C16/34
摘要： In a method for operating a passive matrix-addessable ferroelectric or electret memory device comprising memory cells in the form of a ferroelectri c or electret thin-film polarizable memory material exhibiting hysteresis, particularly a ferroelectric or electret polymer thin film, and a first set of parallel electrodes forming word line electrodes in the device and a second set of parallel electrodes forming bit lines in the device, the word lines being oriented orthogonally to the bit lines, such that the word lines and b it lines are in direct contact with the memory cells, which can be set to eithe r of two polarization states or switched between these by applying a switching voltage larger than a coercive voltage of the memory material between a word line and a bit line, a voltage pulse protocol with at least one disturb generating operation cycle is applied for switching selected addressed cells to determined polarization state. The voltage pulse protocol further compris es a pre-disturb and/or post-disturb cycle before and after the disturb generating operation cycle respectively in order to minimize the effect of disturb voltages on non-addressed memory cells, when such voltages are generated thereto in the operation cycle when it is applied for either a wri te or read operation.

24. 发明专利

ES2238053T3 MATRIZ PASIVA NO VOLATIL Y METODO PARA LA LECTURA DE LA MISMA. 未知
公开(公告)号：ES2238053T3
公开(公告)日：2005-08-16
申请号：ES01985301
申请日：2001-08-24
申请人： THIN FILM ELECTRONICS ASA
发明人： THOMPSON MICHAEL , WOMACK RICHARD , GUSTAFSSON GORAN , CARLSSON JOHAN
IPC分类号： G11C7/06 , G11C7/10 , G11C11/22 , H01L21/8246 , H01L27/105 , G11C5/00
摘要： Dispositivo (10) que constituye una memoria de matriz pasiva no volátil y comprende un material de memoria dieléctrico eléctricamente polarizable (12) que presenta histéresis, y en particular un material ferroeléctrico, estando dicho material de memoria (12) previsto de forma tal que está intercalado en una capa entre un primer conjunto y un segundo conjunto (14; 15) de respectivos electrodos de direccionamiento paralelos, constituyendo los electrodos del primer conjunto (14) líneas de palabra (WL1, ...m) del dispositivo que constituye una memoria y estando dichos electrodos del primer conjunto previstos de forma tal que guardan una relación prácticamente de ortogonalidad con los electrodos del segundo conjunto (15), constituyendo éstos últimos las líneas de bit (BL1, ...n) del dispositivo que constituye una memoria, estando una celda de memoria (13) con una estructura del tipo de la de un condensador definida en el material de memoria (12) en los cruces entre las líneas de palabra y las líneas de bit, constituyendo las celdas de memoria (13) del dispositivo que constituye una memoria los elementos de una matriz pasiva (11), pudiendo ser cada celda de memoria (13) direccionada selectivamente para una operación de grabación/lectura a través de una línea de palabra (WL) y de una línea de bit (BL), teniendo lugar una operación de grabación en una celda de memoria (13) a base de establecer un deseado estado de polarización en la celda por medio de un voltaje que es aplicado a la celda a través de la respectiva línea de palabra (WL) y de la respectiva línea de bit (BL) que definen la celda, estableciendo dicho voltaje aplicado un determinado estado de polarización en la celda de memoria (13) o siendo dicho voltaje aplicado capaz de conmutar entre los estados de polarización de la misma, y teniendo lugar una operación de lectura a base de aplicar un voltaje mayor que el voltaje coercitivo (Vc) a la celda de memoria (13) y de detectar al menos un parámetro eléctrico de una corrientede salida en las líneas de bit (BL).

25. 发明专利

AU2002223158B2 Sensing device for a passive matrix memory and a read method for use therewith 未知
公开(公告)号：AU2002223158B2
公开(公告)日：2005-03-03
申请号：AU2002223158
申请日：2001-08-24
申请人： THIN FILM ELECTRONICS ASA
发明人： WOMACK RICHARD , THOMPSON MICHAEL
IPC分类号： G11C11/15 , G11C11/22 , G11C27/02 , G11C011/22 , G11C007/06
摘要： A sensing device for reading data stored in a passive matrix memory including memory cells in the form of ferroelectric capacitors, includes an integrator circuit for sensing the current response and a device for storing and comparing two consecutive read values, one of which is a reference value. In a read method for use with the sensing device a bit line is connected to the sensing device for sensing a charge flowing therebetween and a memory cell at the crossing of the former and activated word line, whereafter two consecutive reads of the memory cell are performed and integrated over predetermined time periods in order to generate first and second read values which are compared for determining a logical value dependent on the sensed charge.

26. 发明专利

NO20014137L 未知
公开(公告)号：NO20014137L
公开(公告)日：2002-02-25
申请号：NO20014137
申请日：2001-08-24
申请人： THIN FILM ELECTRONICS ASA
发明人： THOMPSON MICHAEL , WOMACK RICHARD
IPC分类号： G11C20060101 , G11C7/06

27. 发明专利

DE60109307T2 未知
公开(公告)号：DE60109307T2
公开(公告)日：2006-04-13
申请号：DE60109307
申请日：2001-08-24
申请人： THIN FILM ELECTRONICS ASA OSLO
发明人： THOMPSON MICHAEL , WOMACK RICHARD , GUSTAFSSON GOERAN , CARLSSON JOHAN
IPC分类号： G11C5/00 , G11C7/06 , G11C7/10 , G11C11/22 , H01L21/8246 , H01L27/105
摘要： In a non-volatile passive matrix memory device (10) comprising an electrically polarizable dielectric memory material (12) exhibiting hysteresis, first and second sets (14; 15) of addressing electrodes constitute word lines (WL) and bit lines (BL) of the memory device. A memory cell (13) is defined in the memory material (12) at the overlap between a word line (WL) and a bit line (BL). The word lines (WL) are divided into segments (S) with each segments sharing and being defined by adjoining bit lines (BL). Means (25) are provided for connecting each bit line (BL) of a segment (S) with a sensing means (26), thus enabling simultaneous connections of all memory cells (13) of a word line segment (15) for readout via the bit lines (BL) of the segment (S). Each sensing means (26) senses the charge flow in a bit line (BL) in order to determine a stored logical value. In a readout method a word line (WL) of a segment (S) is activated by setting its potential to a switching voltage Vs of the memory cell (13) during at least a portion of a read cycle, while keeping the bit lines (BL) of the segment (S) at zero potential, during which read cycle a logical value stored in the individual memory cells (13) is sensed by the sensing means (26). -Use in a volumetric data storage apparatus.

28. 发明专利

NO20043977L 未知
公开(公告)号：NO20043977L
公开(公告)日：2006-03-24
申请号：NO20043977
申请日：2004-09-23
申请人： THIN FILM ELECTRONICS ASA
发明人： KARLSON CHRISTER , LOVGREN NIKLAS , WOMACK RICHARD
IPC分类号： G11C7/02 , G11C20060101 , G11C7/06 , G11C11/22
摘要： In a method for reading the memory cell in a passive matrix-addressable ferroelectric or electret memory array with memory cells in the form of ferroelectric or electret capacitors, sensing means connected to the bit line of memory cell is activated in order to initiate a charge measurement and a first charge value is registered, whereafter a switching voltage is applied to the memory cell and a second charge value is registered. A readout value is obtained by subtracting the first charge value from the second charge value. A sensing device for performing an embodiment of the method comprises a first amplifier stage with an integrator circuit and connected with a second amplifier stage (A 2 ) following the first amplifier stage and with an integrator circuit, and a sampling capacitor connected between an output of the first amplifier stage and an input of the second amplifier stage.

29. 发明专利

NO20043977A 未知
公开(公告)号：NO20043977A
公开(公告)日：2006-03-24
申请号：NO20043977
申请日：2004-09-23
申请人： THIN FILM ELECTRONICS ASA
发明人： KARLSON CHRISTER , LOVGREN NIKLAS , WOMACK RICHARD
IPC分类号： G11C7/02 , G11C20060101 , G11C7/06 , G11C11/22
CPC分类号： G11C11/22 , G11C7/062

30. 发明专利

DK1316090T3 未知
公开(公告)号：DK1316090T3
公开(公告)日：2005-05-30
申请号：DK01985301
申请日：2001-08-24
申请人： THIN FILM ELECTRONICS ASA
发明人： GUSTAFSSON GOERAN , CARLSSON JOHAN , THOMPSON MICHAEL , WOMACK RICHARD
IPC分类号： G11C7/06 , G11C7/10 , G11C11/22 , H01L21/8246 , H01L27/105 , G11C5/00 , G11C7/00
摘要： In a non-volatile passive matrix memory device (10) comprising an electrically polarizable dielectric memory material (12) exhibiting hysteresis, first and second sets (14; 15) of addressing electrodes constitute word lines (WL) and bit lines (BL) of the memory device. A memory cell (13) is defined in the memory material (12) at the overlap between a word line (WL) and a bit line (BL). The word lines (WL) are divided into segments (S) with each segments sharing and being defined by adjoining bit lines (BL). Means (25) are provided for connecting each bit line (BL) of a segment (S) with a sensing means (26), thus enabling simultaneous connections of all memory cells (13) of a word line segment (15) for readout via the bit lines (BL) of the segment (S). Each sensing means (26) senses the charge flow in a bit line (BL) in order to determine a stored logical value. In a readout method a word line (WL) of a segment (S) is activated by setting its potential to a switching voltage Vs of the memory cell (13) during at least a portion of a read cycle, while keeping the bit lines (BL) of the segment (S) at zero potential, during which read cycle a logical value stored in the individual memory cells (13) is sensed by the sensing means (26). -Use in a volumetric data storage apparatus.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式