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21. 发明授权

US09054679B2 Flip-flop circuit and semiconductor device 有权
标题翻译：触发电路和半导体器件
公开(公告)号：US09054679B2
公开(公告)日：2015-06-09
申请号：US14022551
申请日：2013-09-10
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Masashi Fujita
IPC分类号： H03K3/289 , H03K3/012 , H03K3/037 , H03K3/3562 , H03K3/356
CPC分类号： H03K3/012 , H03K3/0375 , H03K3/356156 , H03K3/35625
摘要： A flip-flop circuit consuming lower power than a conventional flip-flop circuit is provided. Further, a flip-flop circuit having a smaller number of transistors than a conventional flip-flop circuit to have a reduced footprint is provided. An n-channel transistor is used as a transistor which is to be turned on at a high level potential and a p-channel transistor is used as a transistor which is to be turned on at a low level potential, whereby the flip-flop circuit can operate only with a clock signal and without an inverted signal of the clock signal, and the number of transistors that operate only with a clock signal in the flip-flop circuit can be reduced.
摘要翻译：提供了一种比传统触发器电路消耗更低功率的触发器电路。此外，提供了具有比传统触发器电路更少数量的晶体管以减小占用面积的触发器电路。使用n沟道晶体管作为要在高电平电位导通的晶体管，并且使用p沟道晶体管作为要在低电平电位导通的晶体管，由此触发器电路可以仅使用时钟信号并且没有时钟信号的反相信号操作，并且可以减少仅在触发器电路中的时钟信号操作的晶体管的数量。

22. 发明申请

US20140362631A1 STORAGE CIRCUIT 有权
标题翻译：存储电路
公开(公告)号：US20140362631A1
公开(公告)日：2014-12-11
申请号：US14306310
申请日：2014-06-17
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Masashi Fujita
IPC分类号： G11C5/14 , G11C14/00 , G11C5/06
CPC分类号： G11C5/14 , G11C5/06 , G11C14/00 , G11C14/0054 , G11C29/50004
摘要： A storage circuit includes a volatile storage portion in which storage of a data signal is controlled by a clock signal and an inverted clock signal, and a nonvolatile storage portion in which a data signal supplied to the volatile storage portion can be held even after supply of power supply voltage is stopped. A wiring which supplies a power supply voltage and is connected to a protective circuit provided for a wiring for supplying the clock signal is provided separately from a wiring which supplies a power supply voltage and which is connected to the storage circuit. The timing of stop and restart of supply of the power supply voltage supplied to the wiring which is connected to the protective circuit is different from that of stop and restart of supply of the power supply voltage supplied to the wiring which is connected to the storage circuit.
摘要翻译：存储电路包括易失性存储部分，其中数据信号的存储由时钟信号和反相时钟信号控制，以及非易失性存储部分，其中提供给易失性存储部分的数据信号即使在供给电源电压停止。提供电源电压并连接到为提供时钟信号的布线提供的保护电路的布线与提供电源电压并连接到存储电路的布线分开设置。提供给与保护电路连接的布线的电源电压的停止和重新开始的定时不同于提供给连接到存储电路的布线的电源电压的停止和重新开始。

23. 发明授权

US08878706B2 Serial-parallel conversion circuit, method for driving the same, display device, and semiconductor device 有权
标题翻译：串行并行转换电路，其驱动方法，显示装置和半导体装置
公开(公告)号：US08878706B2
公开(公告)日：2014-11-04
申请号：US13753937
申请日：2013-01-30
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Masashi Fujita
IPC分类号： H03M9/00 , H03K17/041 , G09G5/00
CPC分类号： H03M9/00 , G09G5/00 , G09G5/006 , G09G2370/08 , H03K17/04106
摘要： A serial-parallel conversion circuit for converting a high-speed serial signal to a parallel signal is provided. Further, a display device with high image quality and fewer external connection terminals is provided. Furthermore, a method for driving a serial-parallel conversion circuit for converting a high-speed serial signal to a parallel signal is provided. A serial-parallel conversion circuit includes a plurality of units in each of which a sampling switch and an amplifier are connected to each other. In the serial-parallel conversion circuit, each sampling switch is configured to output part of a serial signal to its respective amplifier only through one transistor.
摘要翻译：提供了一种用于将高速串行信号转换为并行信号的串并转换电路。此外，提供了具有高图像质量和较少外部连接端子的显示装置。此外，提供了一种用于驱动用于将高速串行信号转换为并行信号的串并转换电路的方法。串行并行转换电路包括多个单元，每个单元中的每一个采样开关和放大器彼此连接。在串并转换电路中，每个采样开关被配置为仅通过一个晶体管将一部分串行信号输出到其相应的放大器。

24. 发明申请

US20140070861A1 Flip-Flop Circuit and Semiconductor Device 有权
标题翻译：触发电路和半导体器件
公开(公告)号：US20140070861A1
公开(公告)日：2014-03-13
申请号：US14022551
申请日：2013-09-10
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Masashi Fujita
IPC分类号： H03K3/012
CPC分类号： H03K3/012 , H03K3/0375 , H03K3/356156 , H03K3/35625
摘要： A flip-flop circuit consuming lower power than a conventional flip-flop circuit is provided. Further, a flip-flop circuit having a smaller number of transistors than a conventional flip-flop circuit to have a reduced footprint is provided. An n-channel transistor is used as a transistor which is to be turned on at a high level potential and a p-channel transistor is used as a transistor which is to be turned on at a low level potential, whereby the flip-flop circuit can operate only with a clock signal and without an inverted signal of the clock signal, and the number of transistors that operate only with a clock signal in the flip-flop circuit can be reduced.
摘要翻译：提供了一种比传统触发器电路消耗更低功率的触发器电路。此外，提供了具有比传统触发器电路更少数量的晶体管以减小占用面积的触发器电路。使用n沟道晶体管作为要在高电平电位导通的晶体管，并且使用p沟道晶体管作为要在低电平电位导通的晶体管，由此触发器电路可以仅使用时钟信号并且没有时钟信号的反相信号操作，并且可以减少仅在触发器电路中的时钟信号操作的晶体管的数量。

25. 发明申请

US20130297889A1 STORAGE DEVICE 有权
标题翻译：储存设备
公开(公告)号：US20130297889A1
公开(公告)日：2013-11-07
申请号：US13873388
申请日：2013-04-30
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Masashi Fujita
IPC分类号： G06F12/08
CPC分类号： G06F12/0808 , G06F12/0895 , G11C11/412 , G11C11/413 , G11C11/417 , G11C16/00 , Y02D10/13
摘要： To provide a storage device with low power consumption. The storage device includes a plurality of cache lines. Each of the cache lines includes a data field which stores cache data; a tag which stores address data corresponding the cache data; and a valid bit which stores valid data indicating whether the cache data stored in the data field is valid or invalid. Whether power is supplied to the tag and the data field in each of the cache lines is determined based on the valid data stored in the valid bit.
摘要翻译：提供低功耗的存储设备。存储装置包括多个高速缓存行。每个高速缓存行包括存储高速缓存数据的数据字段; 存储对应于高速缓存数据的地址数据的标签; 以及存储指示存储在数据字段中的高速缓存数据是有效还是无效的有效数据的有效位。基于存储在有效位中的有效数据来确定是否向标签提供电力以及每个高速缓存行中的数据字段。

26. 发明申请

US20130162609A1 DISPLAY DEVICE 有权
标题翻译：显示设备
公开(公告)号：US20130162609A1
公开(公告)日：2013-06-27
申请号：US13718402
申请日：2012-12-18
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Hiroyuki Miyake , Kouhei Toyotaka , Kazunori Watanabe , Toru Tanabe , Makoto Kaneyasu , Masashi Fujita
IPC分类号： G09G3/20
CPC分类号： G09G3/20 , G09G2370/08
摘要： To provide a display device with high image quality and fewer terminals. The present invention is made with a focus on the positional relation between a serial-parallel conversion circuit and an external connection terminal for supplying a serial signal to the serial-parallel conversion circuit. The structure conceived is such that a serial-parallel conversion circuit and an external connection terminal for supplying a serial signal to the serial-parallel conversion circuit are provided close to each other so that an RC load between the serial-parallel conversion circuit and the external connection terminal is reduced
摘要翻译：提供具有高图像质量和更少终端的显示设备。本发明的重点是串行并行转换电路和用于向串行 - 并行转换电路提供串行信号的外部连接端子之间的位置关系。所构想的结构使得串行并行转换电路和用于向串行 - 并行转换电路提供串行信号的外部连接端子彼此靠近地设置，使得串行 - 并行转换电路和外部电路之间的RC负载连接端子减少

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