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    • 26. 发明申请
    • INTER-PROCESSOR FAILURE DETECTION AND RECOVERY
    • 处理器故障检测和恢复
    • US20120089861A1
    • 2012-04-12
    • US12902501
    • 2010-10-12
    • Charles S. CardinellRoger G. HathornBernhard LaubliTimothy J. Van Patten
    • Charles S. CardinellRoger G. HathornBernhard LaubliTimothy J. Van Patten
    • G06F11/07G06F11/00
    • G06F11/0757G06F11/0724
    • An approach to detecting processor failure in a multi-processor environment is disclosed. The approach may include having each CPU in the system responsible for monitoring another CPU in the system. A CPUn reads a timestampn+1 created by CPUn+1 which CPUn is monitoring from a shared memory location. The CPUn reads its own timestampn and compares the two timestamps to calculate a delta value. If the delta value is above a threshold, the CPUn determines that CPUn+1 has failed and initiates error handling for the CPUs in the system. One CPU may be designated a master CPU, and be responsible for beginning the error handling process. In such embodiments, the CPUn may initiate error handling by notifying the master CPU that CPUn+1 has failed. If CPUn+1 is the master CPU, the CPUn may take additional steps to initiate error handling, and may broadcast a non-critical interrupt to all CPUs, triggering error handling.
    • 公开了一种在多处理器环境中检测处理器故障的方法。 该方法可以包括使系统中的每个CPU负责监视系统中的另一个CPU。 CPUn读取CPUn + 1创建的时间戳+1,CPUn正在从共享内存位置进行监控。 CPUn读取自己的时间戳,并比较两个时间戳来计算增量值。 如果增量值高于阈值,CPUn确定CPUn + 1失败,并启动系统中CPU的错误处理。 一个CPU可能被指定为主CPU,并负责开始错误处理过程。 在这种实施例中,CPUn可以通过通知主CPU CPUn + 1失败来启动错误处理。 如果CPUn + 1是主CPU,CPUn可能会采取额外的步骤来启动错误处理,并可能会向所有CPU广播非关键中断,从而触发错误处理。
    • 29. 发明申请
    • FIBRE CHANNEL FRAMING AND SIGNALING OPTIONAL HEADER FOR ETHERNET FABRIC CONFIGURATION INFORMATION
    • 光纤通道框架和信号可选头以太网织物配置信息
    • US20100104280A1
    • 2010-04-29
    • US12257488
    • 2008-10-24
    • Scott M. CarlsonDaniel G. EisenhauerRoger G. HathornJeffrey W. PalmSandy K. KaoRenato J. Recio
    • Scott M. CarlsonDaniel G. EisenhauerRoger G. HathornJeffrey W. PalmSandy K. KaoRenato J. Recio
    • H04J14/00
    • H04L49/351H04L49/357H04L49/65
    • A Fibre Channel over Ethernet (FCoE) device obtains knowledge of the configuration of an attached Ethernet fabric from data fields within a frame header during a fabric initialization or login (FLOGI) process. FCoE N_Ports obtain similar information during the port initialization or login (PLOGI) process. The FCoE device may provide network management services to attached FCoE devices. Embodiments include a management module or processor within an FCoE N_Port. The management module or processor receives a frame having a header and validates and extracts information associated with an Ethernet fabric from the FCoE N_Ports and in order to provide management services based on the information associated with the Ethernet fabric. The FCoE N_Port communicatively couples to at least one additional FCoE N_Port through the Ethernet fabric. The FCoE N_Ports may be implemented within a disc storage drive, a host bus adapter, and/or an FCoE switch. The capability of an N_Port to obtain this information allows a management module or processor at the N_Port to manage the Ethernet fabric.
    • 以太网光纤通道(FCoE)设备在结构初始化或登录(FLOGI)过程期间从帧头内的数据字段获得关于连接的以太网结构的配置的知识。 FCoE N_Port在端口初始化或登录(PLOGI)过程中获取类似的信息。 FCoE设备可以向附加的FCoE设备提供网络管理服务。 实施例包括FCoE N_Port内的管理模块或处理器。 管理模块或处理器接收具有报头的帧,并且验证并从FCoE N_Port提取与以太网结构相关联的信息,并且基于与以太网结构相关联的信息来提供管理服务。 FCoE N_Port通过以太网架构通信地耦合到至少一个额外的FCoE N_Port。 FCoE N_Port可以在盘存储驱动器,主机总线适配器和/或FCoE交换机内实现。 N_Port获取此信息的能力允许N_Port的管理模块或处理器管理以太网结构。