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21. 发明授权

US07291558B2 Copper interconnect wiring and method of forming thereof 有权
标题翻译：铜互连布线及其形成方法
公开(公告)号：US07291558B2
公开(公告)日：2007-11-06
申请号：US11269382
申请日：2005-11-08
申请人： Robert M. Geffken , John J. Hautala , Steven R. Sherman , Arthur J. Learn
发明人： Robert M. Geffken , John J. Hautala , Steven R. Sherman , Arthur J. Learn
IPC分类号： H01L21/44
CPC分类号： H01L21/76867 , C23C14/0605 , C23C14/0635 , C23C14/0652 , C23C14/221 , C23C16/26 , C23C16/325 , C23C16/345 , C23C16/513 , H01J2237/0812 , H01L21/02074 , H01L21/02301 , H01L21/02304 , H01L21/321 , H01L21/32136 , H01L21/76822 , H01L21/76825 , H01L21/76832 , H01L21/76834 , H01L21/76843 , H01L21/76846 , H01L21/76849 , H01L21/76865 , H01L21/76883 , H01L21/76886 , H01L2924/0002 , H01L2924/00
摘要： Capping layer or layers on a surface of a copper interconnect wiring layer for use in interconnect structures for integrated circuits and methods of forming improved integration interconnection structures for integrated circuits by the application of gas-cluster ion-beam processing. Reduced copper diffusion and improved electromigration lifetime result and the use of selective metal capping techniques and their attendant yield problems are avoided.
摘要翻译：在用于集成电路的互连结构中用于铜互连布线层的表面上的覆盖层或层，以及通过应用气体簇离子束处理形成用于集成电路的改进的集成互连结构的方法。减少铜扩散和改善电迁移寿命，避免使用选择性金属封盖技术及其伴随产量问题。

22. 发明授权

US5339212A Sidewall decoupling capacitor 失效
标题翻译：侧壁去耦电容
公开(公告)号：US5339212A
公开(公告)日：1994-08-16
申请号：US984769
申请日：1992-12-03
申请人： Robert M. Geffken , Lawrence J. Dunlop
发明人： Robert M. Geffken , Lawrence J. Dunlop
IPC分类号： H01G4/012 , H01L23/64 , H01G1/14
CPC分类号： H01G4/012 , H01L23/642 , H01L2924/0002 , Y10T29/435
摘要： The invention provides a decoupling capacitor which utilizes a plurality of tungsten studs and metal interconnects to maximize the surface area of the capacitor, thereby increasing the capacitance. The metal interconnects only partially overlap the tungsten studs, forming the first plate of the capacitor, so that the tops of the studs as well as the sides and tops of the interconnects provide the increased surface area. A method of forming the capacitors, and a method of increasing capacitance of a capacitor, are also provided.
摘要翻译：本发明提供一种去耦电容器，其利用多个钨柱和金属互连来最大化电容器的表面积，从而增加电容。金属互连仅部分地重叠钨螺柱，形成电容器的第一板，使得螺柱的顶部以及互连件的侧面和顶部提供增加的表面积。还提供了形成电容器的方法以及增加电容器的电容的方法。

23. 发明授权

US07071532B2 Adjustable self-aligned air gap dielectric for low capacitance wiring 有权
公开(公告)号：US07071532B2
公开(公告)日：2006-07-04
申请号：US10605440
申请日：2003-09-30
申请人： Robert M. Geffken , William T. Motsiff
发明人： Robert M. Geffken , William T. Motsiff
IPC分类号： H01L29/00
CPC分类号： H01L21/76831 , H01L21/76811 , H01L21/7682 , H01L23/5222 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： An adjustable self aligned low capacitance integrated circuit air gap structure comprises a first interconnect adjacent a second interconnect on an interconnect level, spacers formed along adjacent sides of the first and second interconnects, and an air gap formed between the first and second interconnects. The air gap extends above an upper surface of at least one of the first and second interconnects and below a lower surface of at least one of the first and second interconnects, and the distance between the spacers defines the width of the air gap. The air gap is self-aligned to the adjacent sides of the first and second interconnects.

24. 发明授权

US06503827B1 Method of reducing planarization defects 失效
标题翻译：降低平坦化缺陷的方法
公开(公告)号：US06503827B1
公开(公告)日：2003-01-07
申请号：US09605806
申请日：2000-06-28
申请人： Susan G. Bombardier , Paul M. Feeney , Robert M. Geffken , David V. Horak , Matthew J. Rutten
发明人： Susan G. Bombardier , Paul M. Feeney , Robert M. Geffken , David V. Horak , Matthew J. Rutten
IPC分类号： H01L214763
CPC分类号： H01L21/76885 , H01L21/76834 , H01L21/7684
摘要： A method of reducing the planarization defects produced during the manufacture of semiconductor devices. A sacrificial layer, having defects produced during a interconnection feature planarization step, is removed prior to the formation of subsequent layers to reduce the replication of unwanted defects.
摘要翻译：一种减少在制造半导体器件期间产生的平坦化缺陷的方法。在互连特征平面化步骤之间产生的缺陷的牺牲层在形成后续层之前被去除以减少不想要的缺陷的复制。

25. 发明授权

US5585674A Transverse diffusion barrier interconnect structure 失效
标题翻译：横向扩散阻挡互连结构
公开(公告)号：US5585674A
公开(公告)日：1996-12-17
申请号：US557886
申请日：1995-11-14
申请人： Robert M. Geffken , Matthew J. Rutten
发明人： Robert M. Geffken , Matthew J. Rutten
IPC分类号： H01L21/768 , H01L23/528 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/5283 , H01L21/76838 , H01L2924/0002
摘要： The invention provides an interconnect line which comprises a metallization layer and a plurality of transverse diffusion barriers spaced within said metallization layer. The transverse diffusion barriers separate the length of metallization of the line into discrete sections, such that each section is only 20-50 microns in length. The diffusion barriers reduce electromigration and metal creep within the metal line, each of which can cause failure of the line. The invention further provides such an interconnect line formed within an insulator layer, for use in multi-level interconnect structures.
摘要翻译：本发明提供一种互连线，其包括金属化层和在所述金属化层内间隔开的多个横向扩散阻挡层。横向扩散障碍物将线的金属化长度分成离散的部分，使得每个部分的长度仅为20-50微米。扩散屏障可以减少金属线内的电迁移和金属蠕变，其中每一种都可能导致线路故障。本发明还提供形成在绝缘体层内的这种互连线，用于多级互连结构。

26. 发明授权

US5488013A Method of forming transverse diffusion barrier interconnect structure 失效
标题翻译：形成横向扩散阻挡互连结构的方法
公开(公告)号：US5488013A
公开(公告)日：1996-01-30
申请号：US428995
申请日：1995-04-26
申请人： Robert M. Geffken , Matthew J. Rutten
发明人： Robert M. Geffken , Matthew J. Rutten
IPC分类号： H01L21/768 , H01L23/528 , H01L21/28
CPC分类号： H01L23/5283 , H01L21/76838 , H01L2924/0002
摘要： An interconnect line is formed of a metallization layer and a plurality of transverse diffusion barriers spaced within said metallization layer. The transverse diffusion barriers separate the length of metallization of the line into discrete sections, such that each section is only 20-50 microns in length. The diffusion barriers reduce electromigration and metal creep within the metal line, each of which can cause failure of the line. The method further provides such an interconnect line formed within an insulator layer, for use in multi-level interconnect structures.
摘要翻译：互连线由金属化层和在所述金属化层内间隔开的多个横向扩散阻挡层形成。横向扩散障碍物将线的金属化长度分成离散的部分，使得每个部分的长度仅为20-50微米。扩散屏障可以减少金属线内的电迁移和金属蠕变，其中每一种都可能导致线路故障。该方法还提供形成在绝缘体层内的这种互连线，用于多级互连结构。

27. 发明授权

US4109372A Method for making an insulated gate field effect transistor utilizing a silicon gate and silicide interconnection vias 失效
标题翻译：利用硅栅极和硅化物互连通孔制造绝缘栅场效应晶体管的方法
公开(公告)号：US4109372A
公开(公告)日：1978-08-29
申请号：US793231
申请日：1977-05-02
申请人： Robert M. Geffken
发明人： Robert M. Geffken
IPC分类号： H01L29/78 , H01L21/027 , H01L21/28 , H01L21/285 , H01L21/86 , H01L29/417 , H01L29/49 , B01J17/00
CPC分类号： H01L21/0272 , H01L21/28525 , H01L21/86 , H01L29/41766 , H01L29/4925 , H01L29/4941 , Y10S148/103 , Y10S148/141 , Y10S148/147 , Y10S438/951
摘要： The invention disclosed pertains to a method for the manufacture of an integrated insulated gate field effect transistor semiconductor device wherein a silicon gate structure is simultaneously formed with a composite layer of silicon and a conductive silicide forming metal which upon subsequent annealing forms a conductive metallic silicide compound within the via interconnection means. The aforesaid structure is accomplished utilizing a photoresist lift-off technique as a masking material as well as a substance per se or in combination with other materials to define evaporative conductive metal dimensions on a diffused silicon substrate.
摘要翻译：所公开的本发明涉及一种用于制造集成绝缘栅场效应晶体管半导体器件的方法，其中硅栅极结构同时形成有复合层硅和形成导电硅化物的金属，随后的退火形成导电金属硅化物化合物在通孔互连装置内。上述结构是利用光致抗蚀剂剥离技术作为掩蔽材料以及本身或与其它材料组合以在扩散硅衬底上限定蒸发导电金属尺寸来完成的。

28. 发明授权

US06300236B1 Copper stud structure with refractory metal liner 有权
$Copper stud structure with refractory metal liner$
标题翻译：铜螺柱结构与难熔金属衬里
公开(公告)号：US06300236B1
公开(公告)日：2001-10-09
申请号：US09553581
申请日：2000-04-20
申请人： James M. E. Harper , Robert M. Geffken
发明人： James M. E. Harper , Robert M. Geffken
IPC分类号： H01L214763
CPC分类号： H01L21/76844 , H01L21/76807 , H01L21/76831 , H01L21/76877 , H01L21/76886 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A multilayer interconnected electronic component having increased electromigration lifetime is provided. The interconnections are in the form of studs and comprise vertical side walls having a refractory metal diffusion barrier liner along the sidewalls. The stud does not have a barrier layer at the base thereof and the base of the stud contacts the metallization on the dielectric layer of the component. An adhesion layer can be provided between the base of the stud and the surface of the metallization and the adhesion layer may be continuous or discontinuous. The adhesion layer is preferably a metal such as aluminum which dissolves in the stud or metallization upon heating of the component during fabrication or otherwise during use of the component. A preferred component utilizes a dual Damascene structure.
摘要翻译：提供了具有增加的电迁移寿命的多层互连电子部件。互连是螺柱的形式，并且包括具有沿侧壁的难熔金属扩散阻挡衬里的垂直侧壁。螺柱在其底部不具有阻挡层，并且螺柱的基部接触部件的电介质层上的金属化。可以在螺柱的基部和金属化物的表面之间提供粘合层，并且粘合层可以是连续的或不连续的。粘合层优选是在制造期间或者在组件的使用期间加热组件时溶解在螺柱或金属化中的诸如铝的金属。优选的组件使用双镶嵌结构。

29. 发明授权

US6150723A Copper stud structure with refractory metal liner 失效
$Copper stud structure with refractory metal liner$
标题翻译：铜螺柱结构与难熔金属衬里
公开(公告)号：US6150723A
公开(公告)日：2000-11-21
申请号：US941857
申请日：1997-09-30
申请人： James M. E. Harper , Robert M. Geffken
发明人： James M. E. Harper , Robert M. Geffken
IPC分类号： H05K3/46 , H01L21/768 , H01L23/522 , H01L23/532 , H01L23/485
CPC分类号： H01L21/76844 , H01L21/76807 , H01L21/76877 , H01L21/76886 , H01L23/53238 , H01L21/76831 , H01L2924/0002
摘要： A multilayer interconnected electronic component having increased electromigration lifetime is provided. The interconnections are in the form of studs and comprise vertical side walls having a refractory metal diffusion barrier liner along the sidewalls. The stud does not have a barrier layer at the base thereof and the base of the stud contacts the metallization on the dielectric layer of the component. An adhesion layer can be provided between the base of the stud and the surface of the metallization and the adhesion layer may be continuous or discontinuous. The adhesion layer is preferably a metal such as aluminum which dissolves in the stud or metallization upon heating of the component during fabrication or otherwise during use of the component. A preferred component utilizes a dual Damascene structure.
摘要翻译：提供了具有增加的电迁移寿命的多层互连电子部件。互连是螺柱的形式，并且包括具有沿侧壁的难熔金属扩散阻挡衬里的垂直侧壁。螺柱在其底部不具有阻挡层，并且螺柱的基部接触部件的电介质层上的金属化。可以在螺柱的基部和金属化物的表面之间提供粘合层，并且粘合层可以是连续的或不连续的。粘合层优选是在制造期间或者在组件的使用期间加热组件时溶解在螺柱或金属化中的诸如铝的金属。优选的组件使用双镶嵌结构。

30. 发明授权

US07759251B2 Dual damascene integration structure and method for forming improved dual damascene integration structure 有权
标题翻译：双镶嵌一体化结构和形成改进的双镶嵌一体化结构的方法
公开(公告)号：US07759251B2
公开(公告)日：2010-07-20
申请号：US11143421
申请日：2005-06-02
申请人： Robert M. Geffken , John J. Hautala
发明人： Robert M. Geffken , John J. Hautala
IPC分类号： H01L21/302
CPC分类号： H01L21/31144 , H01J2237/0812 , H01L21/02046 , H01L21/3105 , H01L21/31116 , H01L21/31138 , H01L21/76807 , H01L21/76808 , H01L21/76814 , H01L21/7682 , H01L21/76825 , H01L21/76831
摘要： Methods for forming a dual damascene dielectric structure in a porous ultra-low-k (ULK) dielectric material by using gas-cluster ion-beam processing are disclosed. These methods minimize hard-mask layers during dual damascene ULK processing and eliminate hard-masks in the final ULK dual damascene structure. Methods for gas-cluster ion-beam etching, densification, pore sealing and ashing are described that allow simultaneous removal of material and densification of the ULK interfaces. A novel ULK dual damascene structure is disclosed with densified interfaces and no hard-masks.
摘要翻译：公开了通过使用气体簇离子束处理在多孔超低k（ULK）介电材料中形成双镶嵌介质结构的方法。这些方法在双镶嵌ULK处理期间使硬掩模层最小化，并在最终的ULK双镶嵌结构中消除硬掩模。描述了用于气体簇离子束蚀刻，致密化，孔密封和灰化的方法，其允许同时去除材料和ULK界面的致密化。公开了一种新颖的ULK双镶嵌结构，其具有致密的界面并且没有硬掩模。

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