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21. 发明申请

US20090022415A1 METHOD AND SYSTEM FOR FILTERING IMAGE DATA 有权
标题翻译：滤波图像数据的方法和系统
公开(公告)号：US20090022415A1
公开(公告)日：2009-01-22
申请号：US12094572
申请日：2005-11-22
申请人： Michael Zarubinsky , Roy Kehat , Alexander Sverdlov
发明人： Michael Zarubinsky , Roy Kehat , Alexander Sverdlov
IPC分类号： G06K9/40
CPC分类号： H04N19/86 , H04N19/117 , H04N19/136 , H04N19/42
摘要： A device that includes at least one memory unit adapted to store image data; the device is characterized by including a configurable filter adapted to apply de-ringing filtering and de-blocking filtering such as to filter image data retrieved from the at least one memory unit, whereas the device is adapted to repetitively determine a configuration of the configurable filter in response to received image data and to at least one mode selection rule and to configure the configurable filter in response to the determination. A method for filtering image data, the method includes receiving or defining filtering mode selection rules; and receiving image data; whereas the method is characterized by including repeating the stages of: determining a configuration of a configurable filter that is adapted to perform de-ringing and de-blocking filtering, in response to the received image data and to at least one mode selection rule; configuring the configurable filter in response to the determination; and filtering, by the configurable filter, image data.
摘要翻译：一种包括适于存储图像数据的至少一个存储单元的装置; 该设备的特征在于包括适合于应用去振荡滤波和去块滤波的可配置滤波器，例如对从至少一个存储器单元检索的图像数据进行滤波，而该装置适于重复地确定可配置滤波器的配置响应于接收到的图像数据和至少一个模式选择规则并且响应于该确定来配置可配置的过滤器。一种用于过滤图像数据的方法，所述方法包括接收或定义过滤模式选择规则; 并接收图像数据; 而该方法的特征在于包括重复以下阶段：响应于所接收的图像数据和至少一个模式选择规则，确定适于执行去振铃和解块滤波的可配置滤波器的配置; 响应于确定配置可配置的过滤器; 并通过可配置的滤波器过滤图像数据。

22. 发明授权

US06313774B1 Delta-sigma analog-to-digital converter, and method 有权
标题翻译： Delta-sigma模数转换器和方法
公开(公告)号：US06313774B1
公开(公告)日：2001-11-06
申请号：US09574022
申请日：2000-05-19
申请人： Michael Zarubinsky , Yachin Afek
发明人： Michael Zarubinsky , Yachin Afek
IPC分类号： H03M300
CPC分类号： H03M3/412
摘要： An analog-to-digital converter (200) has a first stage (207) to integrate and quantize the difference between a feedback signal (R) and an input signal (X) to a first intermediate signal (Y1) with a first resolution (M1), a second stage (208) to integrate and quantize the first intermediate signal (Y1) to a second intermediate signal (Y2) with a second, lower resolution (M2), a feedback stage (260) to convert the second intermediate signal (Y2) to the feedback signal (R), and a third stage (206, 270, 280, 285) to differentiate the first intermediate signal (Y1) to a third intermediate signal (W1), to delay the second intermediate signal (Y2) to a fourth intermediate signal (W2), and to add the third and fourth intermediate signals (W1, W2) to an output signal (Y) having a resolution that results from the sum of the first (M1) and second (M2) resolutions.
摘要翻译：模数转换器（200）具有第一级（207），以将第一中间信号（Y1）的反馈信号（R）和输入信号（X）之间的差积分和量化为具有第一分辨率（ M1），第二级（208），用于将第一中间信号（Y1）积分和量化为具有第二较低分辨率（M2）的第二中间信号（Y2），反馈级（260）将第二中间信号（Y2）到反馈信号（R），以及第三级（206,270,280,285），以将第一中间信号（Y1）区分为第三中间信号（W1），以延迟第二中间信号（Y2 ）到第四中间信号（W2），并且将第三和第四中间信号（W1，W2）加到具有由第一（M1）和第二（M2）的和产生的分辨率的输出信号（Y）决议。

23. 发明授权

US06257756B1 Apparatus and method for implementing viterbi butterflies 失效
标题翻译：维特比蝴蝶的装置和方法
公开(公告)号：US06257756B1
公开(公告)日：2001-07-10
申请号：US08895067
申请日：1997-07-16
申请人： Michael Zarubinsky , Yoram Salant , Natan Baron
发明人： Michael Zarubinsky , Yoram Salant , Natan Baron
IPC分类号： G06F1110
CPC分类号： H03M13/6502 , H03M13/3961 , H03M13/4107 , H03M13/4161 , H03M13/4184 , H03M13/6569
摘要： The Viterbi algorithm (20) is performed with a reduced number of calculations when the comparing step (C, 80, 50) is anticipated before the selecting (S, 62, 64, 66, 68) and adding steps (A, 74, 76). During comparing (C), selection decisions (e.g., D (i)) are obtained by analyzing pairs of old path metrics (e.g., P (2i, j−1) at 91, P (2i+1, j−1) at 92) by subtracting and multiplying the path metrics with branch metrics (e.g., B (i, j) at 95) and combining intermediate sign (e.g., SP, SB, S&Dgr;) by e.g., and-logic (50). Selecting decisions (e.g., D (i/2, j+1), D (i/2+N/2, j+1) and new path metrics (e.g., P (i, j), P (i+12, j) are continuously stored and updated.
摘要翻译：当在选择（S，62,64,66,68）之前预期比较步骤（C，80,50）和添加步骤（A，74,76）时，执行维特比算法（20），减少计算次数）。在比较（C）期间，通过分析旧路径度量对（例如，在91处的P（2i，j-1），P（2i + 1，j-1）处的选择决策（例如，D（i）通过将路径度量与分支度量（例如，95处的B（i，j））相减并乘法，并通过例如逻辑（50）组合中间符号（例如，SP，SB，SDELTA）选择决策（例如，D（i / 2，j + 1），D（i / 2 + N / 2，j + 1）和新路径量度（例如，P（i，j） j）被连续存储和更新。

24. 发明授权

US06208211B1 Low jitter phase locked loop having a sigma delta modulator and a method thereof 有权
标题翻译：具有Σ-Δ调制器的低抖动锁相环及其方法
公开(公告)号：US06208211B1
公开(公告)日：2001-03-27
申请号：US09406014
申请日：1999-09-24
申请人： Eliav Zipper , Michael Zarubinsky , David Moshe , Yachin Afek
发明人： Eliav Zipper , Michael Zarubinsky , David Moshe , Yachin Afek
IPC分类号： H03B502
CPC分类号： H03L7/093 , H03L7/085 , H03L7/0995 , H03L7/18
摘要： A phase locked loop PLL has a current controlled oscillator ICO, having an input resistance Rin. Rin is proportional to a control current Idac sent to ICO. ICO is coupled to a capacitor, the capacitor and Rin introduce a pole Fpole in the transfer function of PLL. The PLL further has a sigma delta modulator, for providing a digital sigma delta modulated control signal SDO, SDO is converted to an analog control current Idac, that is provided to ICO and smoothed by Rin and the capacitor. The sigma delta modulator forces error signal outside a predetermined frequency BWsd; and Fpole tracks BWsd.
摘要翻译：锁相环PLL具有电流控制振荡器ICO，具有输入电阻Rin。 Rin与发送到ICO的控制电流Idac成正比。 ICO耦合到一个电容器，电容和Rin引入一个极点Fpole在PLL的传递函数。 PLL还具有Σ-Δ调制器，用于提供数字Σ-Δ调制控制信号SDO，将SDO转换为提供给ICO并由Rin和电容器平滑的模拟控制电流Idac。 Σ-Δ调制器将误差信号强制在预定频率BWsd之外; 和Fpole轨道BWsd。

25. 发明授权

US6028544A Digital-to-analog converter with noiseshaping modulator, commutator and plurality of unit converters, and method 失效
标题翻译：具有噪声调制器，换向器和多个单位转换器的数模转换器及方法
公开(公告)号：US6028544A
公开(公告)日：2000-02-22
申请号：US002421
申请日：1998-01-02
申请人： Michael Zarubinsky , Vladimir Koifman , Yachin Afek
发明人： Michael Zarubinsky , Vladimir Koifman , Yachin Afek
IPC分类号： H03M3/02 , H03M3/04 , H03M7/00 , H03M3/00
CPC分类号： H03M3/326 , H03M3/502 , H03M7/3026 , H03M7/304
摘要： A digital-to-analog converter (200) has a first portion (208) which receives a digital input signal X (201') and has serially coupled a second portion (209) which provides an analog output signal Y (202'). The first portion (208) is a delta-sigma modulator with integrators (210 and 215), adders (203 and 205), a comparator (220) and delay stages (230 and 235). The second portion (209) comprises a commutator (260), unit converters (280-n) and an analog adder (290). In the second portion, the unit converters (280-n) can be mismatched. The first portion (208) provides a noise-shaped intermediate signal V (221') which has substantially zero noise at that frequencies where the mismatches would lead to unwanted spectral tones.
摘要翻译：数模转换器（200）具有接收数字输入信号X（201'）的第一部分（208），并且串联地耦合提供模拟输出信号Y（202'）的第二部分（209）。第一部分（208）是具有积分器（210和215），加法器（203和205），比较器（220）和延迟级（230和235）的Δ-Σ调制器。第二部分（209）包括换向器（260），单位转换器（280-n）和模拟加法器（290）。在第二部分中，单位转换器（280-n）可能不匹配。第一部分（208）提供噪声形状的中间信号V（221'），该中间信号V（221'）在失配将导致不想要的频谱的频率处具有基本上为零的噪声。

26. 发明授权

US09948928B2 Method and apparatus for encoding an image 有权
公开(公告)号：US09948928B2
公开(公告)日：2018-04-17
申请号：US14131368
申请日：2011-07-20
申请人： Shlomo Beer-Gingold , Ofer Naaman , Michael Zarubinsky
发明人： Shlomo Beer-Gingold , Ofer Naaman , Michael Zarubinsky
IPC分类号： H04N11/02 , H04N19/635 , H04N19/513 , H04N19/13 , H04N19/63 , H04N19/136 , H04N19/169 , H04N19/426 , H04N19/93
CPC分类号： H04N19/426 , H04N19/13 , H04N19/136 , H04N19/1883 , H04N19/513 , H04N19/63 , H04N19/635 , H04N19/93
摘要： A method for processing an image, the method comprising retrieving an image, encoding the image as a string of components, deriving an exponent for each component, deriving mantissas wherein at least an approximation of each component can be derived from the exponents and mantissas, and wherein each exponent indicates the number of bits in its accompanying mantissa, compressing at least the exponents, and storing the exponents and the mantissas in a memory. There is also provided a apparatus for processing an image.

27. 发明授权

US08614719B2 Method for gamma correction and a device having gamma correction capabilities 有权
标题翻译：用于伽马校正的方法和具有伽马校正能力的装置
公开(公告)号：US08614719B2
公开(公告)日：2013-12-24
申请号：US12305160
申请日：2006-07-12
申请人： Michael Zarubinsky , Konstantin Berman , Arnold Yanof
发明人： Michael Zarubinsky , Konstantin Berman , Arnold Yanof
IPC分类号： G09G5/10 , H04N5/228 , H04N5/202 , H04N9/69
CPC分类号： H04N5/202
摘要： A device can perform gamma correction by receiving a non-gamma compensated input; selecting, in response to the input value, a selected approximating interval out of a group of low-brightness approximating intervals and out of a group of high-brightness approximating intervals; multiplying a portion of the input value by a selected approximating interval slope to provide an intermediate result; adding the intermediate result to a selected approximating interval offset to provide the gamma compensated output value; and outputting a gamma compensated output value.
摘要翻译：器件可以通过接收非伽马补偿输入来执行伽马校正; 响应于所述输入值，从一组低亮度近似间隔和一组高亮度近似间隔中选择一个选定的近似间隔; 将输入值的一部分乘以所选择的近似间隔斜率以提供中间结果; 将所述中间结果添加到选定的近似间隔偏移量以提供伽马补偿输出值; 并输出伽马补偿输出值。

28. 发明授权

US08526756B2 Method and system arranged for filtering an image 有权
标题翻译：布置用于过滤图像的方法和系统
公开(公告)号：US08526756B2
公开(公告)日：2013-09-03
申请号：US13258759
申请日：2009-04-09
申请人： Michael Zarubinsky , Shlomo Beer-Gingold , Michelle Kosashvili
发明人： Michael Zarubinsky , Shlomo Beer-Gingold , Michelle Kosashvili
IPC分类号： G06K9/40 , G06K9/34
CPC分类号： G06T5/10 , G06T2207/20021 , G06T2207/30148 , H04N5/2357
摘要： A method and a system, the system includes: a memory unit, an image region definer, a spectral analyzer, a determination module, and an image processor. The spectral analyzer is arranged to divide a frequency spectrum of each image region into at least three image region frequency range components (IRFRCs); and calculate an energy level for each IRFRC. The comparator configured to compare the energy level of each IRFRC to at least one frequency region threshold to provide a comparison result for each IRFRC; wherein each frequency region threshold is calculated based on an intensity parameter of an image section and based on an energy parameter of at least one reference image section; a determination module arranged to determine a processing operation for each IRFRC, based on a comparison result associated with the IRFRC and based on a configurable decision rule.
摘要翻译：一种方法和系统，该系统包括：存储单元，图像区域定义器，频谱分析器，确定模块和图像处理器。频谱分析器被布置成将每个图像区域的频谱分成至少三个图像区域频率范围分量（IRFRC）; 并计算每个IRFRC的能级。所述比较器被配置为将每个IRFRC的能量水平与至少一个频率区域阈值进行比较，以提供每个IRFRC的比较结果; 其中基于图像部分的强度参数并且基于至少一个参考图像部分的能量参数来计算每个频率区域阈值; 确定模块，其被布置为基于与所述IRFRC相关联的比较结果并且基于可配置决定规则来确定每个IRFRC的处理操作。

29. 发明授权

US08077698B2 Method and device for frame and slot synchronization 有权
标题翻译：用于帧和槽同步的方法和设备
公开(公告)号：US08077698B2
公开(公告)日：2011-12-13
申请号：US12331835
申请日：2008-12-10
申请人： Shlomo Beer-Gingold , Alexander Sverdlov , Michael Zarubinsky
发明人： Shlomo Beer-Gingold , Alexander Sverdlov , Michael Zarubinsky
IPC分类号： H04J3/06
CPC分类号： H04B1/70735 , H04B1/7083
摘要： A method slot and frame synchronization of in a wireless system, the method includes: processing samples and a pair of primary synchronization code forming sequences by a pair of serially coupled filters to provide primary results; finding, in response to the primary results, slots boundaries; processing selected samples and multiple pairs of secondary synchronization code forming sequences by at least a second filter of the pair of serially coupled filters to provide secondary results; wherein the selected samples correspond to the slots boundaries; and detecting secondary synchronization sequences included in a frame in response to the secondary results.
摘要翻译：一种在无线系统中的方法时隙和帧同步，所述方法包括：通过一对串行耦合滤波器处理样本和一对主同步码形成序列以提供主要结果; 发现，响应主要结果，插槽边界; 通过所述一对串联耦合滤波器的至少第二滤波器处理所选样本和多对次同步码形成序列，以提供次要结果; 其中所选择的样本对应于所述时隙边界; 以及响应于次要结果检测包括在帧中的次同步序列。

30. 发明申请

US20100142511A1 METHOD AND DEVICE FOR FRAME AND SLOT SYNCHRONIZATION 有权
标题翻译：用于框架和槽同步的方法和装置
公开(公告)号：US20100142511A1
公开(公告)日：2010-06-10
申请号：US12331835
申请日：2008-12-10
申请人： Shlomo Beer-Gingold , Alexander Sverdlov , Michael Zarubinsky
发明人： Shlomo Beer-Gingold , Alexander Sverdlov , Michael Zarubinsky
IPC分类号： H04J3/06
CPC分类号： H04B1/70735 , H04B1/7083
摘要： A method slot and frame synchronization of in a wireless system, the method includes: processing samples and a pair of primary synchronization code forming sequences by a pair of serially coupled filters to provide primary results; finding, in response to the primary results, slots boundaries; processing selected samples and multiple pairs of secondary synchronization code forming sequences by at least a second filter of the pair of serially coupled filters to provide secondary results; wherein the selected samples correspond to the slots boundaries; and detecting secondary synchronization sequences included in a frame in response to the secondary results.
摘要翻译：一种在无线系统中的方法时隙和帧同步，所述方法包括：通过一对串行耦合滤波器处理样本和一对主同步码形成序列以提供主要结果; 发现，响应主要结果，插槽边界; 通过所述一对串联耦合滤波器的至少第二滤波器处理所选样本和多对次同步码形成序列，以提供次要结果; 其中所选择的样本对应于所述时隙边界; 以及响应于次要结果检测包括在帧中的次同步序列。

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