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21. 发明授权

US08665575B2 Solar module with overheat protection 有权
标题翻译：太阳能组件具有过热保护功能
公开(公告)号：US08665575B2
公开(公告)日：2014-03-04
申请号：US13166842
申请日：2011-06-23
申请人： Lawrence A. Clevenger , Harold J. Hovel , Rainer Krause , Zhengwen Li , Kevin S. Petrarca , Gerd Pfeiffer , Kevin Prettyman , Carl J. Radens , Brian C. Sapp
发明人： Lawrence A. Clevenger , Harold J. Hovel , Rainer Krause , Zhengwen Li , Kevin S. Petrarca , Gerd Pfeiffer , Kevin Prettyman , Carl J. Radens , Brian C. Sapp
IPC分类号： H02H5/04
CPC分类号： H02H7/20 , H01L31/02021 , H02H5/047 , Y02E10/50
摘要： A photovoltaic module (10) with a plurality of solar cells (20) interconnected in serial and/or parallel arrangement within the module (10) is equipped with an overheat protection system (30) for suppressing damages of the photovoltaic module (10) due to defects of the solar cells (20). The overheat protection system (30) comprises a heat sensor (32) which is thermally coupled to a solar cell (20). The heat sensor (32) is physically integrated into an electrical switch (34, 36, 38) which is electrically connected to said solar cell (20).
摘要翻译：具有在模块（10）内以串联和/或并联布置互连的多个太阳能电池（20）的光伏模块（10）装备有过热保护系统（30），用于抑制光伏模块（10）的损坏涉及太阳能电池的缺陷（20）。过热保护系统（30）包括热耦合到太阳能电池（20）的热传感器（32）。热传感器（32）物理地集成在电连接到所述太阳能电池（20）的电开关（34,36,38）中。

22. 发明授权

US08232148B2 Structure and method to make replacement metal gate and contact metal 有权
标题翻译：用于替换金属栅极和接触金属的结构和方法
公开(公告)号：US08232148B2
公开(公告)日：2012-07-31
申请号：US12717398
申请日：2010-03-04
申请人： Zhengwen Li , Michael P. Chudzik , Unoh Kwon , Filippos Papadatos , Andrew H. Simon , Keith Kwong Hon Wong
发明人： Zhengwen Li , Michael P. Chudzik , Unoh Kwon , Filippos Papadatos , Andrew H. Simon , Keith Kwong Hon Wong
IPC分类号： H01L21/00
CPC分类号： H01L23/485 , H01L21/28088 , H01L21/28202 , H01L21/76283 , H01L21/76877 , H01L21/823842 , H01L21/823871 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66545 , H01L29/6659 , H01L29/7848 , H01L2924/0002 , H01L2924/00
摘要： An electrical device is provided with a p-type semiconductor device having a first gate structure that includes a gate dielectric on top of a semiconductor substrate, a p-type work function metal layer, a metal layer composed of titanium and aluminum, and a metal fill composed of aluminum. An n-type semiconductor device is also present on the semiconductor substrate that includes a second gate structure that includes a gate dielectric, a metal layer composed of titanium and aluminum, and a metal fill composed of aluminum. An interlevel dielectric is present over the semiconductor substrate. The interlevel dielectric includes interconnects to the source and drain regions of the p-type and n-type semiconductor devices. The interconnects are composed of a metal layer composed of titanium and aluminum, and a metal fill composed of aluminum. The present disclosure also provides a method of forming the aforementioned structure.
摘要翻译：电气装置设置有具有第一栅极结构的p型半导体器件，其包括在半导体衬底的顶部上的栅极电介质，p型功函数金属层，由钛和铝构成的金属层，以及金属填充铝。 n型半导体器件也存在于半导体衬底上，该半导体衬底包括第二栅极结构，其包括栅极电介质，由钛和铝构成的金属层以及由铝组成的金属填充物。层间电介质存在于半导体衬底上。层间电介质包括到p型和n型半导体器件的源区和漏区的互连。互连由钛和铝构成的金属层和由铝组成的金属填充物构成。本公开还提供了形成上述结构的方法。

23. 发明授权

US08138068B2 Method to form nanopore array 有权
标题翻译：形成纳米孔阵列的方法
公开(公告)号：US08138068B2
公开(公告)日：2012-03-20
申请号：US12854192
申请日：2010-08-11
申请人： Zhengwen Li , Chengwen Pei , Frank Yang
发明人： Zhengwen Li , Chengwen Pei , Frank Yang
IPC分类号： H01L21/20 , H01L21/36 , H01L21/4763
CPC分类号： G01N33/48721 , B81B2201/0214 , B81C1/00087 , B82Y30/00
摘要： A method of forming nanopore is provided that includes forming a first structure on a substrate, and forming a second structure overlying the first structure. An intersecting portion of the first and the second structures is etched to provide an opening of nanopore dimensions. The substrate may be etched with a backside substrate etch to expose the nanopore opening.
摘要翻译：提供一种形成纳米孔的方法，包括在基底上形成第一结构，并形成覆盖第一结构的第二结构。蚀刻第一和第二结构的相交部分以提供纳米孔尺寸的开口。可以用背面基板蚀刻蚀刻衬底以暴露纳米孔开口。

24. 发明申请

US20110067620A1 DYNAMOELETRIC CONCEALED OBVIOUS WARNING BOARD FOR CAR 有权
标题翻译： DYNAMOELETRIC CONCEALED OBVIOUS警告板为汽车
公开(公告)号：US20110067620A1
公开(公告)日：2011-03-24
申请号：US12736793
申请日：2009-04-29
申请人： Zhengwen Li
发明人： Zhengwen Li
IPC分类号： G09F13/16
CPC分类号： B60Q7/00 , B60Q1/52 , B60Q7/02 , G09F13/16 , G09F13/22
摘要： A warning device for mounting on a vehicle having a rear bumper includes a storage housing, a warning frame and a driving unit. The storage housing is concealedly mounted within the rear bumper of the vehicle. The warning frame is selectively received in the storage housing. The driving unit connecting the storage housing and the warning frame to drive the warning frame to operate between a extended mode and a storage mode, wherein in the storage mode, the warning frame is selectively concealed within the storage housing, wherein in the extended mode, the warning frame is selectively driven by the driving unit to extend out of the storage housing to form a triangular structure for providing a warning signal to incoming traffic.
摘要翻译：用于安装在具有后保险杠的车辆上的警告装置包括存储壳体，警告框架和驱动单元。存储壳体被隐藏地安装在车辆的后保险杠内。警告框选择性地被接收在存储壳体中。所述驱动单元连接所述存储壳体和所述警告框架，以驱动所述警告框架在扩展模式和存储模式之间操作，其中在所述存储模式中，所述警告框被选择性地隐藏在所述存储壳体内，其中在所述扩展模式中，警告框架由驱动单元有选择地驱动以延伸出存储壳体，以形成用于向输入通信量提供警告信号的三角结构。

25. 发明申请

US20140000712A1 NIOBIUM THIN FILM STRESS RELIEVING LAYER FOR THIN-FILM SOLAR CELLS 有权
标题翻译：用于薄膜太阳能电池的氮化硅薄膜应力层
公开(公告)号：US20140000712A1
公开(公告)日：2014-01-02
申请号：US13534519
申请日：2012-06-27
申请人： Qing Cao , Zhengwen Li , Fei Liu , Zhen Zhang
发明人： Qing Cao , Zhengwen Li , Fei Liu , Zhen Zhang
IPC分类号： H01L31/0264 , H01L31/18
CPC分类号： H01L31/02167 , H01L31/022425 , H01L31/022441 , H01L31/022475 , H01L31/0296 , H01L31/0322 , H01L31/0326 , H01L31/0749 , Y02E10/541 , Y02P70/521
摘要： A method of forming a photovoltaic device includes forming a thermal stress relieving layer on top of a substrate and forming a sacrificial back electrode metal layer on the thermal stress relieving layer. A semiconductor photon absorber layer is formed on the sacrificial back electrode metal layer, and the absorber layer is reacted with substantially an entire thickness of the sacrificial back electrode metal layer, thereby forming a back ohmic contact comprising a metallic compound of the sacrificial back electrode metal layer and the absorber layer, in combination with the thermal stress relieving layer.
摘要翻译：形成光伏器件的方法包括在衬底的顶部形成热应力消除层，并在热应力消除层上形成牺牲背电极金属层。在牺牲背电极金属层上形成半导体光子吸收层，吸收层与牺牲背极金属层的大致整个厚度反应，形成包含牺牲背电极金属的金属化合物的反欧姆接触层和吸收层，与热应力消除层组合。

26. 发明授权

US08552502B2 Structure and method to make replacement metal gate and contact metal 有权
标题翻译：用于替换金属栅极和接触金属的结构和方法
公开(公告)号：US08552502B2
公开(公告)日：2013-10-08
申请号：US13427963
申请日：2012-03-23
申请人： Zhengwen Li , Michael P. Chudzik , Unoh Kwon , Filippos Papadatos , Andrew H. Simon , Keith Kwong Hon Wong
发明人： Zhengwen Li , Michael P. Chudzik , Unoh Kwon , Filippos Papadatos , Andrew H. Simon , Keith Kwong Hon Wong
IPC分类号： H01L27/12
CPC分类号： H01L23/485 , H01L21/28088 , H01L21/28202 , H01L21/76283 , H01L21/76877 , H01L21/823842 , H01L21/823871 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66545 , H01L29/6659 , H01L29/7848 , H01L2924/0002 , H01L2924/00
摘要： An electrical device is provided that in one embodiment includes a p-type semiconductor device having a first gate structure that includes a gate dielectric that is present on the semiconductor substrate, a p-type work function metal layer, a metal layer composed of titanium and aluminum, and a metal fill composed of aluminum. An n-type semiconductor device is also present on the semiconductor substrate that includes a second gate structure that includes a gate dielectric, a metal layer composed of titanium and aluminum, and a metal fill composed of aluminum. An interlevel dielectric is present over the semiconductor substrate. The interlevel dielectric includes interconnects to the source and drain regions of the p-type and n-type semiconductor devices. The interconnects are composed of a metal layer composed of titanium and aluminum, and a metal fill composed of aluminum. The present disclosure also provides a method of forming the aforementioned structure.
摘要翻译：提供了一种电气装置，其在一个实施例中包括具有第一栅极结构的p型半导体器件，该第一栅极结构包括存在于半导体衬底上的栅极电介质，p型功函数金属层，由钛构成的金属层和铝和由铝构成的金属填充物。 n型半导体器件也存在于半导体衬底上，该半导体衬底包括第二栅极结构，其包括栅极电介质，由钛和铝构成的金属层以及由铝组成的金属填充物。层间电介质存在于半导体衬底上。层间电介质包括到p型和n型半导体器件的源区和漏区的互连。互连由钛和铝构成的金属层和由铝组成的金属填充物构成。本公开还提供了形成上述结构的方法。

27. 发明申请

US20130115732A1 Method to Fabricate Multicrystal Solar Cell with Light Trapping Surface Using Nanopore Copolymer 有权
标题翻译：使用纳米孔共聚物制造具有光捕获表面的多晶太阳能电池的方法
公开(公告)号：US20130115732A1
公开(公告)日：2013-05-09
申请号：US13289324
申请日：2011-11-04
申请人： Dechao Guo , Zhengwen Li , Kejia Wang , Zhen Zhang
发明人： Dechao Guo , Zhengwen Li , Kejia Wang , Zhen Zhang
IPC分类号： H01L31/18 , B32B33/00 , C23F1/04
CPC分类号： H01L31/02363 , Y02E10/50
摘要： Multi-crystalline silicon processing techniques are provided. In one aspect, a method for roughening a multi-crystalline silicon surface is provided. The method includes the following steps. The multi-crystalline silicon surface is coated with a diblock copolymer. The diblock copolymer is annealed to form nanopores therein. The multi-crystalline silicon surface is etched through the nanopores in the diblock copolymer to roughen the multi-crystalline silicon surface. The diblock copolymer is removed. A multi-crystalline silicon substrate with a roughened surface having a plurality of peaks and troughs is also provided, wherein a distance from one peak to an adjacent peak on the roughened surface is from about 20 nm to about 400 nm.
摘要翻译：提供多晶硅加工技术。一方面，提供了一种使多晶硅表面粗糙化的方法。该方法包括以下步骤。多晶硅表面涂有二嵌段共聚物。将二嵌段共聚物退火以在其中形成纳米孔。通过二嵌段共聚物中的纳米孔蚀刻多晶硅表面以粗糙化多晶硅表面。除去二嵌段共聚物。还提供了具有多个峰和谷的具有粗糙表面的多晶硅衬底，其中粗糙表面上的一个峰到相邻峰的距离为约20nm至约400nm。

28. 发明申请

US20120261804A1 VERTICAL SUBSTRATE DIODE, METHOD OF MANUFACTURE AND DESIGN STRUCTURE 审中-公开
标题翻译：垂直基板二极管，制造方法和设计结构
公开(公告)号：US20120261804A1
公开(公告)日：2012-10-18
申请号：US13087915
申请日：2011-04-15
申请人： Junjun Li , Zhengwen Li , Chengwen Pei , Jian Yu
发明人： Junjun Li , Zhengwen Li , Chengwen Pei , Jian Yu
IPC分类号： H01L29/06 , H01L21/22 , B82Y99/00
CPC分类号： H01L29/861 , H01L21/76256 , H01L27/0255
摘要： A diode structure, formed under a buried dielectric layer of a silicon on insulator (SOI), method of manufacturing the same and design structure thereof are provided. In an embodiment the p-n junction of the diode structure can be advantageously arranged in a vertical orientation. The cathode comprises an N+ epitaxial layer formed upon a P-type substrate. The anode comprises an active region of the P-substrate. Contacts to the cathode and anode are formed through the buried dielectric layer. Contact to the anode is accomplished via a deep trench filled with a conductive plug. The deep trench also provides electrical isolation for the cathode (as well as p-n junction). Advantageously, embodiments of the present invention may be formed during formation of other structures which also include trenches (for example, deep trench capacitors) in order to reduce process steps required to form the diode structure under the buried dielectric layer of the SOI substrate.
摘要翻译：提供了一种二极管结构，其形成在绝缘体上的绝缘体（SOI）的埋置介质层下，其制造方法及其设计结构。在一个实施例中，二极管结构的p-n结可以有利地以垂直取向布置。阴极包括在P型衬底上形成的N +外延层。阳极包括P基底的有源区。通过埋入介电层形成与阴极和阳极的接触。通过填充有导电插塞的深沟槽实现与阳极的接触。深沟槽还为阴极（以及p-n结）提供电隔离。有利地，本发明的实施例可以在形成其它结构的过程中形成，这些结构还包括沟槽（例如，深沟槽电容器），以便减少在SOI衬底的埋置介质层下形成二极管结构所需的工艺步骤。

29. 发明申请

US20120187460A1 METHOD FOR FORMING METAL SEMICONDUCTOR ALLOYS IN CONTACT HOLES AND TRENCHES 有权
标题翻译：金属半导体合金在接触孔和高岭土中的形成方法
公开(公告)号：US20120187460A1
公开(公告)日：2012-07-26
申请号：US13013081
申请日：2011-01-25
申请人： Christian Lavoie , Zhengwen Li , Ahmet S. Ozcan , Filippos Papadatos , Chengwen Pei , Jian Yu
发明人： Christian Lavoie , Zhengwen Li , Ahmet S. Ozcan , Filippos Papadatos , Chengwen Pei , Jian Yu
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7833 , H01L21/0217 , H01L21/02211 , H01L21/02274 , H01L21/28518 , H01L21/31116 , H01L21/32053 , H01L21/321 , H01L21/32133 , H01L21/76802 , H01L21/76805 , H01L21/76829 , H01L23/535 , H01L29/1054 , H01L29/45 , H01L29/456 , H01L29/458 , H01L29/4975 , H01L29/665 , H01L29/66545 , H01L29/6659 , H01L29/7843 , H01L29/7845 , H01L29/7849
摘要： A method of forming a semiconductor device is provided that includes forming a first metal semiconductor alloy on a semiconductor containing surface, forming a dielectric layer over the first metal semiconductor alloy, forming an opening in the dielectric layer to provide an exposed surface the first metal semiconductor alloy, and forming a second metal semiconductor alloy on the exposed surface of the first metal semiconductor alloy. In another embodiment, the method includes forming a gate structure on a channel region of a semiconductor substrate, forming a dielectric layer over at least a source region and a drain region, forming an opening in the dielectric layer to provide an exposed surface the semiconductor substrate, forming a first metal semiconductor alloy on the exposed surface of the semiconductor substrate, and forming a second metal semiconductor alloy on the first metal semiconductor alloy.
摘要翻译：提供一种形成半导体器件的方法，包括在半导体容纳表面上形成第一金属半导体合金，在第一金属半导体合金上形成电介质层，在电介质层中形成开口以提供第一金属半导体合金，并且在第一金属半导体合金的暴露表面上形成第二金属半导体合金。在另一个实施例中，该方法包括在半导体衬底的沟道区上形成栅极结构，在至少源极区和漏极区上形成电介质层，在电介质层中形成开口以提供暴露表面，半导体衬底在所述半导体衬底的暴露表面上形成第一金属半导体合金，并在所述第一金属半导体合金上形成第二金属半导体合金。

30. 发明申请

US20120040512A1 METHOD TO FORM NANOPORE ARRAY 有权
标题翻译：形成纳米阵列的方法
公开(公告)号：US20120040512A1
公开(公告)日：2012-02-16
申请号：US12854192
申请日：2010-08-11
申请人： Zhengwen Li , Chengwen Pei , Frank Yang
发明人： Zhengwen Li , Chengwen Pei , Frank Yang
IPC分类号： H01L21/20 , H01L21/302
CPC分类号： G01N33/48721 , B81B2201/0214 , B81C1/00087 , B82Y30/00
摘要： A method of forming nanopore is provided that includes forming a first structure on a substrate, and forming a second structure overlying the first structure. An intersecting portion of the first and the second structures is etched to provide an opening of nanopore dimensions. The substrate may be etched with a backside substrate etch to expose the nanopore opening.
摘要翻译：提供一种形成纳米孔的方法，包括在基底上形成第一结构，并形成覆盖第一结构的第二结构。蚀刻第一和第二结构的相交部分以提供纳米孔尺寸的开口。可以用背面基板蚀刻蚀刻衬底以暴露纳米孔开口。

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