专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US07728394B2 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07728394B2
公开(公告)日：2010-06-01
申请号：US12232079
申请日：2008-09-10
申请人： Masato Koyama , Reika Ichihara , Yoshinori Tsuchiya , Yuuichi Kamimuta , Akira Nishiyama
发明人： Masato Koyama , Reika Ichihara , Yoshinori Tsuchiya , Yuuichi Kamimuta , Akira Nishiyama
IPC分类号： H00L29/79
CPC分类号： H01L21/823842
摘要： A semiconductor device includes a substrate, a p-channel MIS transistor formed on an n-type well on the substrate, having a first gate dielectric and a first gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 80% or more, and an n-channel MIS transistor formed on a p-type well on the substrate, having a second gate dielectric and a second gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 60% or less.
摘要翻译：半导体器件包括衬底，形成在衬底上的n型阱上的p沟道MIS晶体管，具有形成在其上并由Ta-C合金形成的第一栅极电介质和第一栅电极，其中晶体取向比例膜厚方向[TaC（111）面/ {TaC（111）面+ TaC（200）面}]的TaC（111）面为80％以上，n型沟道MIS晶体管形成在p- 在基板上良好地形成具有形成在其上的第二栅极电介质和第二栅电极，并且由TaC（111）在膜厚度方向[TaC（111）面/ {TaC（111）面+ TaC（200）面}]为60％以下。

22. 发明授权

US07632728B2 Method of forming TaC gate electrodes with crystal orientation ratio defining the work function 有权
标题翻译：形成具有定义功函数的晶体取向比的TaC栅电极的方法
公开(公告)号：US07632728B2
公开(公告)日：2009-12-15
申请号：US12232080
申请日：2008-09-10
申请人： Masato Koyama , Reika Ichihara , Yoshinori Tsuchiya , Yuuichi Kamimuta , Akira Nishiyama
发明人： Masato Koyama , Reika Ichihara , Yoshinori Tsuchiya , Yuuichi Kamimuta , Akira Nishiyama
IPC分类号： H01L29/78 , H01L29/04 , H01L21/8234 , H01L21/8238
CPC分类号： H01L21/823842
摘要： A semiconductor device includes a substrate, a p-channel MIS transistor formed on an n-type well on the substrate, having a first gate dielectric and a first gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 80% or more, and an n-channel MIS transistor formed on a p-type well on the substrate, having a second gate dielectric and a second gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 60% or less.
摘要翻译：半导体器件包括衬底，形成在衬底上的n型阱上的p沟道MIS晶体管，具有形成在其上并由Ta-C合金形成的第一栅极电介质和第一栅电极，其中晶体取向比例膜厚方向[TaC（111）面/ {TaC（111）面+ TaC（200）面}]的TaC（111）面为80％以上，n型沟道MIS晶体管形成在p- 在基板上良好地形成具有形成在其上的第二栅极电介质和第二栅电极，并且由TaC（111）在膜厚度方向[TaC（111）面/ {TaC（111）面+ TaC（200）面}]为60％以下。

23. 发明申请

US20090075464A1 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090075464A1
公开(公告)日：2009-03-19
申请号：US12232080
申请日：2008-09-10
申请人： Masato Koyama , Reika Ichihara , Yoshinori Tsuchiya , Yuuichi Kamimuta , Akira Nishiyama
发明人： Masato Koyama , Reika Ichihara , Yoshinori Tsuchiya , Yuuichi Kamimuta , Akira Nishiyama
IPC分类号： H01L21/28
CPC分类号： H01L21/823842
摘要： A semiconductor device includes a substrate, a p-channel MIS transistor formed on an n-type well on the substrate, having a first gate dielectric and a first gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 80% or more, and an n-channel MIS transistor formed on a p-type well on the substrate, having a second gate dielectric and a second gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 60% or less.
摘要翻译：半导体器件包括衬底，形成在衬底上的n型阱上的p沟道MIS晶体管，具有形成在其上并由Ta-C合金形成的第一栅极电介质和第一栅电极，其中晶体取向比例膜厚方向[TaC（111）面/ {TaC（111）面+ TaC（200）面}]的TaC（111）面为80％以上，n型沟道MIS晶体管形成在p- 在基板上良好地形成具有形成在其上的第二栅极电介质和第二栅电极，并且由TaC（111）在膜厚度方向[TaC（111）面/ {TaC（111）面+ TaC（200）面}]为60％以下。

24. 发明申请

US20090072330A1 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US20090072330A1
公开(公告)日：2009-03-19
申请号：US12232078
申请日：2008-09-10
申请人： Masato Koyama , Reika Ichihara , Yoshinori Tsuchiya , Yuuichi Kamimuta , Akira Nishiyama
发明人： Masato Koyama , Reika Ichihara , Yoshinori Tsuchiya , Yuuichi Kamimuta , Akira Nishiyama
IPC分类号： H01L29/78
CPC分类号： H01L21/823842
摘要： A semiconductor device includes a substrate, a p-channel MIS transistor formed on an n-type well on the substrate, having a first gate dielectric and a first gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 80% or more, and an n-channel MIS transistor formed on a p-type well on the substrate, having a second gate dielectric and a second gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 60% or less.

25. 发明授权

US07432570B2 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07432570B2
公开(公告)日：2008-10-07
申请号：US11635040
申请日：2006-12-07
申请人： Masato Koyama , Reika Ichihara , Yoshinori Tsuchiya , Yuuichi Kamimuta , Akira Nishiyama
发明人： Masato Koyama , Reika Ichihara , Yoshinori Tsuchiya , Yuuichi Kamimuta , Akira Nishiyama
IPC分类号： H01L29/78 , H01L29/04 , H01L21/8234 , H01L21/8238
CPC分类号： H01L21/823842
摘要： A semiconductor device includes a substrate, a p-channel MIS transistor formed on an n-type well on the substrate, having a first gate dielectric and a first gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 80% or more, and an n-channel MIS transistor formed on a p-type well on the substrate, having a second gate dielectric and a second gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 60% or less.
摘要翻译：半导体器件包括衬底，形成在衬底上的n型阱上的p沟道MIS晶体管，具有形成在其上并由Ta-C合金形成的第一栅极电介质和第一栅电极，其中晶体取向比例膜厚方向[TaC（111）面/ {TaC（111）面+ TaC（200）面}]的TaC（111）面为80％以上，n型沟道MIS晶体管形成在p- 在基板上良好地形成具有形成在其上的第二栅极电介质和第二栅电极，并且由TaC（111）在膜厚度方向[TaC（111）面/ {TaC（111）面+ TaC（200）面}]为60％以下。

26. 发明申请

US20080258230A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
公开(公告)号：US20080258230A1
公开(公告)日：2008-10-23
申请号：US12133583
申请日：2008-06-05
申请人： Masato KOYAMA , Akira Nishiyama , Yoshinori Tsuchiya , Reika Ichihara
发明人： Masato KOYAMA , Akira Nishiyama , Yoshinori Tsuchiya , Reika Ichihara
IPC分类号： H01L27/092
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28088 , H01L29/495 , H01L29/4966 , H01L29/517
摘要： There is disclosed a semiconductor device comprising a P-channel MIS transistor which includes an N-type semiconductor layer, a first gate insulating layer formed on the N-type semiconductor layer and containing a carbon compound of a metal, and an N-channel MIS transistor which includes a P-type semiconductor layer, a second gate insulating layer formed on the P-type semiconductor layer, and a second gate electrode formed on the second gate insulating layer.

27. 发明申请

US20080254581A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080254581A1
公开(公告)日：2008-10-16
申请号：US12133605
申请日：2008-06-05
申请人： Masato KOYAMA , Akira Nishiyama , Yoshinori Tsuchiya , Reika Ichihara
发明人： Masato KOYAMA , Akira Nishiyama , Yoshinori Tsuchiya , Reika Ichihara
IPC分类号： H01L21/8238
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28088 , H01L29/495 , H01L29/4966 , H01L29/517
摘要： There is disclosed a semiconductor device comprising a P-channel MIS transistor which includes an N-type semiconductor layer, a first gate insulating layer formed on the N-type semiconductor layer and containing a carbon compound of a metal, and an N-channel MIS transistor which includes a P-type semiconductor layer, a second gate insulating layer formed on the P-type semiconductor layer, and a second gate electrode formed on the second gate insulating layer.
摘要翻译：公开了一种包括P沟道MIS晶体管的半导体器件，其包括N型半导体层，形成在N型半导体层上并含有金属的碳化合物的第一栅极绝缘层和N沟道MIS 晶体管，其包括P型半导体层，形成在P型半导体层上的第二栅极绝缘层和形成在第二栅极绝缘层上的第二栅电极。

28. 发明授权

US07410855B2 Semiconductor device 有权
公开(公告)号：US07410855B2
公开(公告)日：2008-08-12
申请号：US11841841
申请日：2007-08-20
申请人： Reika Ichihara , Yoshinori Tsuchiya , Masato Koyama , Akira Nishiyama
发明人： Reika Ichihara , Yoshinori Tsuchiya , Masato Koyama , Akira Nishiyama
IPC分类号： H01L21/8238
CPC分类号： H01L21/823857 , H01L21/823462
摘要： A semiconductor device includes a semiconductor substrate, an nMISFET formed on the substrate, the nMISFET including a first dielectric formed on the substrate and a first metal gate electrode formed on the first dielectric and formed of one metal element selected from Ti, Zr, Hf, Ta, Sc, Y, a lanthanoide and actinide series and of one selected from boride, silicide and germanide compounds of the one metal element, and a pMISFET formed on the substrate, the pMISFET including a second dielectric formed on the substrate and a second metal gate electrode formed on the second dielectric and made of the same material as that of the first metal gate electrode, at least a portion of the second dielectric facing the second metal gate electrode being made of an insulating material different from that of at least a portion of the first dielectric facing the first metal gate electrode.

29. 发明授权

US07391085B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07391085B2
公开(公告)日：2008-06-24
申请号：US11299773
申请日：2005-12-13
申请人： Reika Ichihara , Yoshinori Tsuchiya , Masato Koyama , Akira Nishiyama
发明人： Reika Ichihara , Yoshinori Tsuchiya , Masato Koyama , Akira Nishiyama
IPC分类号： H01L27/092
CPC分类号： H01L21/823857 , H01L21/823462
摘要： A semiconductor device includes a semiconductor substrate, an nMISFET formed on the substrate, the nMISFET including a first dielectric formed on the substrate and a first metal gate electrode formed on the first dielectric and formed of one metal element selected from Ti, Zr, Hf, Ta, Sc, Y, a lanthanoide and actinide series and of one selected from boride, silicide and germanide compounds of the one metal element, and a pMISFET formed on the substrate, the pMISFET including a second dielectric formed on the substrate and a second metal gate electrode formed on the second dielectric and made of the same material as that of the first metal gate electrode, at least a portion of the second dielectric facing the second metal gate electrode being made of an insulating material different from that of at least a portion of the first dielectric facing the first metal gate electrode.
摘要翻译：半导体器件包括半导体衬底，形成在衬底上的nMISFET，nMISFET包括形成在衬底上的第一电介质和形成在第一电介质上的第一金属栅极，并由选自Ti，Zr，Hf， Ta，Sc，Y，镧系元素和锕系和选自所述一种金属元素的硼化物，硅化物和锗化合物的一种，以及形成在所述衬底上的pMISFET，所述pMISFET包括形成在所述衬底上的第二电介质和第二金属栅电极形成在第二电介质上并由与第一金属栅电极相同的材料制成，第二电介质面向第二金属栅电极的至少一部分由绝缘材料制成，绝缘材料与至少一部分的第一电介质面向第一金属栅电极。

30. 发明申请

US20070145493A1 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20070145493A1
公开(公告)日：2007-06-28
申请号：US11635040
申请日：2006-12-07
申请人： Masato Koyama , Reika Ichihara , Yoshinori Tsuchiya , Yuuichi Kamimuta , Akira Nishiyama
发明人： Masato Koyama , Reika Ichihara , Yoshinori Tsuchiya , Yuuichi Kamimuta , Akira Nishiyama
IPC分类号： H01L29/76
CPC分类号： H01L21/823842
摘要： A semiconductor device includes a substrate, a p-channel MIS transistor formed on an n-type well on the substrate, having a first gate dielectric and a first gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 80% or more, and an n-channel MIS transistor formed on a p-type well on the substrate, having a second gate dielectric and a second gate electrode formed thereon and formed of a Ta—C alloy wherein a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 60% or less.
摘要翻译：半导体器件包括衬底，形成在衬底上的n型阱上的p沟道MIS晶体管，具有形成在其上并由Ta-C合金形成的第一栅极电介质和第一栅电极，其中晶体取向比例膜厚方向[TaC（111）面/ {TaC（111）面+ TaC（200）面}]的TaC（111）面为80％以上，n型沟道MIS晶体管形成在p- 在基板上良好地形成具有形成在其上的第二栅极电介质和第二栅电极，并且由TaC（111）在膜厚度方向[TaC（111）面/ {TaC（111）面+ TaC（200）面}]为60％以下。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式