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    • 21. 发明申请
    • Display device and glass substrate therefor
    • 显示装置及其玻璃基板
    • US20050200797A1
    • 2005-09-15
    • US11079146
    • 2005-03-14
    • Motoji ShiotaTohru Arima
    • Motoji ShiotaTohru Arima
    • G02F1/1345G02F1/1368G09F9/00
    • G02F1/13452
    • First to fourth gate driver ICs G1 to G4 to be connected to a gate line 18 of a drive element 21 are arranged along a side of a liquid crystal display 2. Along a side of the first to four gate driver ICs G1 to G4, a FPC 5 for receiving signals is arranged. A first bus line 15 that branches between the first and second gate driver ICs G1 and G2 connects gate-low terminals 11b and 11a of the first and second gate driver ICs G1 and G2, respectively, to the FPC 5. A second bus line 16 that branches between the third and fourth gate driver ICs G3 and G4 connects gate-low terminals 11b and 11a of the third and fourth gate driver ICs G3 and G4, respectively, to the FPC 5. Gate-high terminals 10b and 10a, logic terminals 12b and 12a, and signal terminals 13 of the second and third gate driver ICs G2 and G3 are connected to the FPC 5. Gate-high terminals 10a and 10b, logic terminals 12a and 12b, and signal terminals 13 of the first and fourth gate driver ICs G1 and G4 are connected to corresponding terminals of the second and third gate driver ICs G2 and G3.
    • 连接到驱动元件21的栅极线18的第一至第四栅极驱动器IC G 1至G 4沿着液晶显示器2的一侧布置。沿着第一至第四栅极驱动器IC G 1至 G 4,布置了用于接收信号的FPC5。 在第一和第二栅极驱动器IC G 1和G 2之间分支的第一总线15分别将第一和第二栅极驱动器IC G 1和G 2的低电极端子11b和11a分别连接到FPC 5 。 分支在第三和第四栅极驱动器IC G 3和G 4之间的第二总线16分别将第三和第四栅极驱动器IC G 3和G 4的低电极端子11b和11a分别连接到FPC 5 。 门极高端子10b和10a,逻辑端子12b和12a以及第二和第三栅极驱动器IC G 2和G 3的信号端子13连接到FPC 5.栅极 - 高端子10a和10 b,逻辑端子12a和12b以及第一和第四栅极驱动器ICG 1和G 4的信号端子13连接到第二和第三栅极驱动器IC G 2和G 3的相应端子。
    • 23. 发明授权
    • Wiring board and liquid crystal display device
    • 接线板和液晶显示装置
    • US08310645B2
    • 2012-11-13
    • US12995578
    • 2009-04-10
    • Takashi MatsuiMotoji Shiota
    • Takashi MatsuiMotoji Shiota
    • G02F1/1343G02F1/1345
    • H05K1/111G02F1/13452H01L2224/05553H05K2201/09409H05K2201/09672H05K2201/10674Y02P70/611
    • A wiring board of the present invention has pads disposed in a plurality of rows including: first row pads each being connected to a respective one of the connection wires that is long in length; and second row pads (30b) each being connected to a respective one of the connection wires that is shorter in length than that of first connection wires (10a) connected to the first row pads, each of the first connection wires (10a) being provided not in a region between adjacent ones of the second row pads (30b) but in a lower layer region of the second row pads (30b), in such a manner that at least a first insulating layer (20a) is sandwiched between the second row pads (30b) and the first connection wires (10a), and 0.8≦W1/W2≦1, where W1 is a line width of the first connection wires (10a) in the lower layer region of the second row pads (30b), and W2 is a width of the second row pads (30b).
    • 本发明的布线基板具有排列成多行的焊盘,包括:第一行焊盘,各自连接到长度相等的连接线; 和第二排焊盘(30b)分别连接到长度比连接到第一行焊盘的第一连接线(10a)短的连接线中的每个连接线,每个第一连接线(10a)被设置 不是在相邻的第二列焊盘(30b)之间的区域中,而是在第二行焊盘(30b)的下层区域中,使得至少第一绝缘层(20a)夹在第二行 焊盘(30b)和第一连接线(10a),以及0.8< W1; W1 / W2≦̸ 1,其中W1是第二行焊盘(30b)的下层区域中的第一连接线(10a)的线宽, ,W2是第二排焊盘(30b)的宽度。
    • 30. 发明申请
    • DISPLAY PANEL
    • 显示面板
    • US20110169792A1
    • 2011-07-14
    • US13119967
    • 2009-06-15
    • Yukio ShimizuGen NagaokaIchiro UmekawaMotoji ShiotaYasuhiro Hida
    • Yukio ShimizuGen NagaokaIchiro UmekawaMotoji ShiotaYasuhiro Hida
    • G06F3/038G09G3/36
    • G02F1/1345G02F1/1309G09G3/006G09G3/3611G09G2300/0426G09G2330/06H05K1/0215H05K1/0268H05K1/147H05K2201/10363H05K2201/10636Y02P70/611
    • The present invention provides a display panel in which, without providing connection terminals, the number of which corresponds to the number of test terminals of a liquid crystal panel, on a circuit board such as an FPC board, miniaturization is obtained while reducing costs such as the mounting cost and material cost of the circuit board, and stable operation is performed. A liquid crystal panel (10) has a configuration in which jumper resistors (60a) to (60f) are provided in an overhanging portion (20a) of a glass substrate (20) to ground test terminals, which eliminates the need to ground the test terminals on an FPC board (50). Thus, wiring lines and connection terminals which are connected to the test terminals, respectively, and the numbers of which are equal to the number of the test terminals do not need to be provided on the FPC board (50), reducing the width of the FPC board (50). Thus, the material cost of the FPC board (50) is reduced, and a process performed when mounting the FPC board (50) on the glass substrate (20) is simplified, reducing mounting cost.
    • 本发明提供一种显示面板,其中,在不设置与液晶面板的测试端子的数量相对应的连接端子的情况下,在诸如FPC基板的电路板上获得小型化,同时降低诸如 执行电路板的安装成本和材料成本,并且执行稳定的操作。 液晶面板(10)具有将玻璃基板(20)的突出部(20a)中的跳线电阻(60a〜60f)设置为接地试验端子的结构,无需将测试 FPC基板(50)上的端子。 因此,不需要在FPC基板(50)上设置与测试端子分别连接的数量等于测试端子的数量的布线和连接端子,从而减小 FPC板(50)。 因此,FPC板(50)的材料成本降低,并且将FPC基板(50)安装在玻璃基板(20)上时的处理简化,降低了安装成本。