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21. 发明授权

US09671637B2 Touch screen substrate and method of manufacturing the same 有权
公开(公告)号：US09671637B2
公开(公告)日：2017-06-06
申请号：US12903688
申请日：2010-10-13
申请人： Yun-Jong Yeo , Hong-Kee Chin
发明人： Yun-Jong Yeo , Hong-Kee Chin
IPC分类号： G06F3/042 , G02F1/1333 , G06F3/041 , H01L27/12
CPC分类号： G02F1/13338 , G06F3/0412 , G06F3/042 , H01L27/12 , H01L27/1214 , Y10T29/49105
摘要： In a touch screen substrate and a method of manufacturing the same, the touch screen substrate includes a base substrate, a light blocking pattern, a first sensing element and a first switching element. The light blocking pattern includes an inorganic layer formed on the base substrate and a light blocking layer formed on the inorganic layer, the light blocking layer transmitting an infrared light and absorbing a visible light. The first sensing element is formed on the light blocking pattern and senses the infrared light. The first switching element is electrically connected to the first sensing element. Thus, an undercut may be prevented from being formed at a lower portion of the light blocking pattern, and an adhesive strength between the light blocking pattern and the base substrate may be enhanced.

22. 发明授权

US08608971B2 Method of manufacturing a display substrate 失效
标题翻译：制造显示基板的方法
公开(公告)号：US08608971B2
公开(公告)日：2013-12-17
申请号：US12862580
申请日：2010-08-24
申请人： Hong-Kee Chin , Sang-Gab Kim , Min-Seok Oh
发明人： Hong-Kee Chin , Sang-Gab Kim , Min-Seok Oh
IPC分类号： B29D11/00 , C30B33/00
CPC分类号： H01L27/1288 , G02F1/136204 , H01L27/1244
摘要： A method of manufacturing a display substrate includes forming a first metallic pattern including gate and storage conductors and a gate electrode of a switching device on a base substrate, forming a gate insulation layer, forming a second metallic pattern and a channel portion including a source line, source and drain electrodes of the switching device, forming a passivation layer and a photoresist film on the second metallic pattern, patterning the photoresist film to form a first pattern portion corresponding to the gate and source conductors and the switching device, and a second pattern portion formed on the storage line, etching the passivation layer and the gate insulation layer, and forming a pixel electrode using the first pattern portion. Therefore, excessive etching of the stepped portion may be prevented, so that a short-circuit defect between a metallic pattern and a pixel electrode may be prevented
摘要翻译：一种制造显示基板的方法包括在基底基板上形成包括栅极和存储导体的第一金属图案和开关器件的栅电极，形成栅极绝缘层，形成第二金属图案和包括源极线的沟道部分开关器件的源极和漏极，在第二金属图案上形成钝化层和光致抗蚀剂膜，图案化光致抗蚀剂膜以形成对应于栅极和源极导体和开关器件的第一图案部分，以及第二图案形成在存储线上的部分，蚀刻钝化层和栅极绝缘层，以及使用第一图案部分形成像素电极。因此，可以防止阶梯部分的过度蚀刻，从而可以防止金属图案和像素电极之间的短路缺陷

23. 发明申请

US20110234536A1 TOUCH SCREEN SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：触摸屏幕基板及其制造方法
公开(公告)号：US20110234536A1
公开(公告)日：2011-09-29
申请号：US12903688
申请日：2010-10-13
申请人： Yun-Jong Yeo , Hong-Kee Chin
发明人： Yun-Jong Yeo , Hong-Kee Chin
IPC分类号： G06F3/042 , H01H11/00
CPC分类号： G02F1/13338 , G06F3/0412 , G06F3/042 , H01L27/12 , H01L27/1214 , Y10T29/49105
摘要： In a touch screen substrate and a method of manufacturing the same, the touch screen substrate includes a base substrate, a light blocking pattern, a first sensing element and a first switching element. The light blocking pattern includes an inorganic layer formed on the base substrate and a light blocking layer formed on the inorganic layer, the light blocking layer transmitting an infrared light and absorbing a visible light. The first sensing element is formed on the light blocking pattern and senses the infrared light. The first switching element is electrically connected to the first sensing element. Thus, an undercut may be prevented from being formed at a lower portion of the light blocking pattern, and an adhesive strength between the light blocking pattern and the base substrate may be enhanced.
摘要翻译：在触摸屏基板及其制造方法中，触摸屏基板包括基底基板，遮光图案，第一感测元件和第一开关元件。遮光图案包括形成在基底基板上的无机层和形成在无机层上的遮光层，遮光层透射红外光并吸收可见光。第一感测元件形成在遮光图案上并感测红外光。第一开关元件电连接到第一感测元件。因此，可以防止在遮光图案的下部形成底切，并且可以提高遮光图案和基底基板之间的粘合强度。

24. 发明授权

US07982223B2 Display apparatus and method of manufacturing the same 有权
标题翻译：显示装置及其制造方法
公开(公告)号：US07982223B2
公开(公告)日：2011-07-19
申请号：US12372212
申请日：2009-02-17
申请人： Seung-Ha Choi , Min-Seok Oh , Sang-Gab Kim , Hong-Kee Chin , Yu-Gwang Jeong
发明人： Seung-Ha Choi , Min-Seok Oh , Sang-Gab Kim , Hong-Kee Chin , Yu-Gwang Jeong
IPC分类号： H01L29/04 , H01L29/10
CPC分类号： H01L27/124 , G02F1/136286 , G02F2001/136222 , G02F2001/136295 , H01L27/1248 , H01L27/1288
摘要： In a display apparatus and a method of manufacturing the display apparatus, a first insulating layer having a trench and a second insulating layer having a via hole corresponding to the trench are formed on an array substrate. After forming a seed layer in the trench, a conductive layer is formed on the seed layer through a plating process, thereby forming the gate line, the gate electrode and the storage line accommodated in the trench and the via hole.
摘要翻译：在显示装置和显示装置的制造方法中，在阵列基板上形成具有沟槽的第一绝缘层和具有与沟槽对应的通路孔的第二绝缘层。在沟槽中形成晶种层之后，通过电镀工艺在晶种层上形成导电层，从而形成栅极线，栅极电极和容纳在沟槽和通孔中的存储线。

25. 发明申请

US20100203715A1 THIN FILM TRANSISTOR ARRAY PANEL AND FABRICATION 有权
标题翻译：薄膜晶体管阵列和制造
公开(公告)号：US20100203715A1
公开(公告)日：2010-08-12
申请号：US12765698
申请日：2010-04-22
申请人： Sang-Gab KIM , Woo-Geun Lee , Shi-Yul Kim , Jin-Ho Ju , Jang-Soo Kim , Sang-Woo Whangbo , Min-Seok Oh , Hye-Young Ryu , Hong-Kee Chin
发明人： Sang-Gab KIM , Woo-Geun Lee , Shi-Yul Kim , Jin-Ho Ju , Jang-Soo Kim , Sang-Woo Whangbo , Min-Seok Oh , Hye-Young Ryu , Hong-Kee Chin
IPC分类号： H01L21/28
CPC分类号： H01L27/124 , G02F2001/13629 , H01L29/458
摘要： The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.
摘要翻译：本发明提供一种薄膜晶体管阵列面板的制造方法，其包括在基板上形成栅极线; 在栅极线上形成栅极绝缘层，半导体层和欧姆接触; 形成包括Mo的第一导电膜，包括Al的第二导电膜和在欧姆接触上包含Mo的第三导电膜; 在所述第三导电膜上形成第一光致抗蚀剂图案; 使用第一光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜，欧姆接触和半导体层; 将第一光致抗蚀剂图案去除预定厚度以形成第二光致抗蚀剂图案; 使用第二光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜以暴露欧姆接触的一部分; 并使用含Cl气体和含F气体蚀刻暴露的欧姆接触。

26. 发明授权

US07405425B2 Thin film transistor, method of manufacturing the same, display apparatus having the same and method of manufacturing the display apparatus 有权
标题翻译：薄膜晶体管，其制造方法，具有该薄膜晶体管的显示装置和制造该显示装置的方法
公开(公告)号：US07405425B2
公开(公告)日：2008-07-29
申请号：US11232306
申请日：2005-09-20
申请人： Sang-Gab Kim , Shi-Yul Kim , Hong-Sick Park , Hee-Hwan Choe , Hong-Kee Chin , Min-Seok Oh
发明人： Sang-Gab Kim , Shi-Yul Kim , Hong-Sick Park , Hee-Hwan Choe , Hong-Kee Chin , Min-Seok Oh
IPC分类号： H01L29/04
CPC分类号： H01L29/66765 , G02F1/1368 , H01L27/12 , H01L27/124 , H01L29/458
摘要： A thin film transistor includes a gate electrode on a substrate, a gate insulating layer on the substrate, a channel pattern, a source electrode and a drain electrode. The channel pattern includes a semiconductor pattern formed on the gate electrode and overlaying the gate electrode as well as first and second conductive adhesive patterns formed on the semiconductor pattern and spaced apart from each other. The source electrode includes a first barrier pattern, a source pattern and a first capping pattern sequentially formed on the first conductive adhesive pattern. The drain electrode includes a second barrier pattern, a drain pattern and a second capping pattern sequentially formed on the second conductive adhesive pattern. Etched portions of the first and second conductive adhesive patterns have a substantially vertical profile to prevent the exposure of the source and drain electrodes, thereby improving the characteristics of the thin film transistor.
摘要翻译：薄膜晶体管包括衬底上的栅电极，衬底上的栅极绝缘层，沟道图案，源电极和漏电极。沟道图案包括形成在栅电极上并覆盖栅电极的半导体图案以及形成在半导体图案上并彼此间隔开的第一和第二导电粘合剂图案。源电极包括顺序地形成在第一导电粘合剂图案上的第一阻挡图案，源图案和第一封盖图案。漏电极包括顺序地形成在第二导电粘合剂图案上的第二阻挡图案，漏极图案和第二封盖图案。第一和第二导电粘合剂图案的蚀刻部分具有基本垂直的轮廓，以防止源极和漏极的暴露，从而改善薄膜晶体管的特性。

27. 发明申请

US20080017884A1 DISPLAY SUBSTRATE, DISPLAY APPARATUS HAVING THE DISPLAY SUBSTRATE AND METHOD FOR MANUFACTURING THE DISPLAY APPARATUS 审中-公开
标题翻译：显示基板，具有显示基板的显示装置及制造显示装置的方法
公开(公告)号：US20080017884A1
公开(公告)日：2008-01-24
申请号：US11766329
申请日：2007-06-21
申请人： Chang-Oh Jeong , Sang-Gab Kim , Jun-Hyung Souk , Hong-Gyun Kim , In-Sun Hwang , Min-Seok Oh , Hong-Kee Chin , Yu-Gwang Jeong , Seung-Ha Choi , Hi-Kuk Lee , Shi-Yul Kim
发明人： Chang-Oh Jeong , Sang-Gab Kim , Jun-Hyung Souk , Hong-Gyun Kim , In-Sun Hwang , Min-Seok Oh , Hong-Kee Chin , Yu-Gwang Jeong , Seung-Ha Choi , Hi-Kuk Lee , Shi-Yul Kim
IPC分类号： H01L27/13 , H01L21/3205 , H01L23/48
CPC分类号： G02F1/133528 , G02F1/134336 , G02F2001/133548 , H01L27/12
摘要： A display apparatus includes a first substrate, a gate line formed on the first substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, a data line formed on the semiconductor layer and including a source electrode, a drain electrode facing the source electrode, a first electrode electrically connected to the drain electrode, in a second substrate facing the first substrate, a second electrode formed on the second substrate, and a liquid crystal layer disposed between the first electrode and the second electrode. At least one of the first and second electrodes includes a plurality of line patterns to polarize incident light.
摘要翻译：显示装置包括第一基板，形成在第一基板上的栅极线，形成在栅极线上的栅极绝缘层，形成在栅极绝缘层上的半导体层，形成在半导体层上的数据线，并且包括源极面对源电极的漏电极，与漏电极电连接的第一电极，与第一衬底相对的第二衬底，形成在第二衬底上的第二电极，以及设置在第一电极和第二电极之间的液晶层电极。第一和第二电极中的至少一个包括使入射光偏振的多个线图案。

28. 发明授权

US08476633B2 Thin film transistor array substrate for a display panel and a method for manufacturing a thin film transistor array substrate for a display panel 有权
标题翻译：用于显示面板的薄膜晶体管阵列基板和用于制造用于显示面板的薄膜晶体管阵列基板的方法
公开(公告)号：US08476633B2
公开(公告)日：2013-07-02
申请号：US12560652
申请日：2009-09-16
申请人： Hyeong-Suk Yoo , Ho-Jun Lee , Sung-ryul Kim , O-Sung Seo , Hong-Kee Chin
发明人： Hyeong-Suk Yoo , Ho-Jun Lee , Sung-ryul Kim , O-Sung Seo , Hong-Kee Chin
IPC分类号： H01L29/786
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/124 , H01L27/1248
摘要： A method of manufacturing a thin film transistor capable of simplifying a substrate structure and a manufacturing process is disclosed. The method of manufacturing a thin film transistor array substrate comprising a three mask process. The 3 mask process comprising, forming a gate pattern on a substrate, forming a gate insulating film on the substrate, forming a source/drain pattern and a semiconductor pattern on the substrate, forming a first, second, and third passivation film successively on the substrate. Over the above multi-layers of the passivation film forming a first photoresist pattern comprising a first portion formed on part of the drain electrode and on the pixel region, and a second portion wherein, the second portion thicker than the first portion, and then patterning the third passivation film using the first photoresist pattern, forming a second photoresist pattern by removing the first portion of the first photoresist pattern, forming a transparent electrode film on the substrate, removing the second photoresist pattern and the transparent electrode film disposed on the second photoresist pattern; and forming a transparent electrode pattern on the second passivation layer.
摘要翻译：公开了一种能够简化衬底结构和制造工艺的制造薄膜晶体管的方法。制造包括三掩模工艺的薄膜晶体管阵列基板的方法。 3掩模工艺包括：在衬底上形成栅极图案，在衬底上形成栅极绝缘膜，在衬底上形成源极/漏极图案和半导体图案，在第一，第二和第三钝化膜上依次形成第一，第二和第三钝化膜基质。在上述多层钝化膜上形成第一光致抗蚀剂图案，该第一光致抗蚀剂图案包括形成在漏电极的一部分上和在像素区域上的第一部分，以及第二部分，其中第二部分比第一部分厚，使用第一光致抗蚀剂图案的第三钝化膜，通过去除第一光致抗蚀剂图案的第一部分形成第二光致抗蚀剂图案，在基板上形成透明电极膜，去除第二光致抗蚀剂图案和设置在第二光致抗蚀剂上的透明电极膜模式; 以及在所述第二钝化层上形成透明电极图案。

29. 发明授权

US08305507B2 Thin film transistor array panel having improved storage capacitance and manufacturing method thereof 有权
标题翻译：具有改善的存储电容的薄膜晶体管阵列面板及其制造方法
公开(公告)号：US08305507B2
公开(公告)日：2012-11-06
申请号：US11356853
申请日：2006-02-17
申请人： Hye-Young Ryu , Jang-Soo Kim , Sang-Gab Kim , Hong-Kee Chin , Min-Seok Oh , Hee-Hwan Choe , Shi-Yul Kim
发明人： Hye-Young Ryu , Jang-Soo Kim , Sang-Gab Kim , Hong-Kee Chin , Min-Seok Oh , Hee-Hwan Choe , Shi-Yul Kim
IPC分类号： G02F1/1343
CPC分类号： G02F1/136286 , G02F1/133345 , G02F1/1362 , G02F2001/136222 , G02F2202/02
摘要： A thin film transistor array panel is provided, which includes a gate line, a data line intersecting the gate line, a storage electrode apart from the gate and data lines, a thin film transistor connected to the gate and data lines and having a drain electrode, a pixel electrode connected to the drain electrode, a first insulating layer over the thin film transistor and disposed under the pixel electrode, and a second insulating layer disposed on the first insulating layer and having an opening exposing the first insulating layer on the storage electrode.
摘要翻译：提供薄膜晶体管阵列面板，其包括栅极线，与栅极线相交的数据线，与栅极和数据线分开的存储电极，连接到栅极和数据线并具有漏极的薄膜晶体管连接到漏电极的像素电极，薄膜晶体管上的第一绝缘层，并且设置在像素电极下方;第二绝缘层，设置在第一绝缘层上，并且具有使存储电极上的第一绝缘层露出的开口。

30. 发明授权

US08173493B2 Thin film transistor array panel and fabrication 有权
标题翻译：薄膜晶体管阵列和制造
公开(公告)号：US08173493B2
公开(公告)日：2012-05-08
申请号：US12765698
申请日：2010-04-22
申请人： Sang-Gab Kim , Woo-Geun Lee , Shi-Yul Kim , Jin-Ho Ju , Jang-Soo Kim , Sang-Woo Whangbo , Min-Seok Oh , Hye-Young Ryu , Hong-Kee Chin
发明人： Sang-Gab Kim , Woo-Geun Lee , Shi-Yul Kim , Jin-Ho Ju , Jang-Soo Kim , Sang-Woo Whangbo , Min-Seok Oh , Hye-Young Ryu , Hong-Kee Chin
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L27/124 , G02F2001/13629 , H01L29/458
摘要： The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.
摘要翻译：本发明提供一种薄膜晶体管阵列面板的制造方法，其包括在基板上形成栅极线; 在栅极线上形成栅极绝缘层，半导体层和欧姆接触; 形成包括Mo的第一导电膜，包括Al的第二导电膜和在欧姆接触上包含Mo的第三导电膜; 在所述第三导电膜上形成第一光致抗蚀剂图案; 使用第一光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜，欧姆接触和半导体层; 将第一光致抗蚀剂图案去除预定厚度以形成第二光致抗蚀剂图案; 使用第二光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜以暴露欧姆接触的一部分; 并使用含Cl气体和含F气体蚀刻暴露的欧姆接触。

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