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21. 发明授权

US06379252B2 Game program supply system and program rewrite system 失效
标题翻译：游戏程序供应系统和程序重写系统
公开(公告)号：US06379252B2
公开(公告)日：2002-04-30
申请号：US08952512
申请日：1997-11-28
申请人： Akira Takata , Takahiro Masuda , Toshihiro Satou , Tetsuji Kajitani , Masashi Kuramoto
发明人： Akira Takata , Takahiro Masuda , Toshihiro Satou , Tetsuji Kajitani , Masashi Kuramoto
IPC分类号： A63F1312
CPC分类号： A63F13/77 , A63F13/12 , A63F13/95 , A63F2300/206 , A63F2300/552 , G06F9/445
摘要： The present invention relates to a game program rewrite system for supplying data of a game program of a plurality of terminal stations from a host station and writing the data in portable information storage media applied to game execution units in the terminal stations in response to requests, and a program rewrite system suitable for this game program supply system, and aims at enabling construction of a game-on-demand system including a number of terminal stations with no excess of requirement to equipment of a network or the data throughput of the host station. In order to attain the above object, a host station (1) supplies data of a game program to a terminal station (2) online through a communication network. The data of the game program is supplied to the terminal station (2) offline too. The data of the game program preserved in the terminal station (2) is written in a game execution storage medium (20) in response to a request of a user.
摘要翻译：本发明涉及一种用于从主机站提供多个终端站的游戏程序的数据的游戏程序重写系统，并且响应于请求将数据写入应用于终端站中的游戏执行单元的便携式信息存储介质中，以及适用于该游戏程序供给系统的程序重写系统，其目的在于，能够构建包括不需要网络设备或者主机的数据吞吐量的多个终端站的游戏点播系统为了实现上述目的，主站（1）通过通信网络在线地向终端站（2）提供游戏程序的数据。游戏程序的数据也被提供给终端站（2）。响应于用户的请求，将保存在终端站（2）中的游戏程序的数据写入游戏执行存储介质（20）。

22. 发明授权

US06225668B1 Semiconductor device having a single crystal gate electrode and insulation 失效
标题翻译：具有单晶栅电极和绝缘的半导体器件
公开(公告)号：US06225668B1
公开(公告)日：2001-05-01
申请号：US08917268
申请日：1997-08-25
申请人： Masahiro Shindo , Daisuke Kosaka , Tetsuo Hikawa , Akira Takata , Yukihiro Ukai , Takashi Sawada , Toshifumi Asakawa
发明人： Masahiro Shindo , Daisuke Kosaka , Tetsuo Hikawa , Akira Takata , Yukihiro Ukai , Takashi Sawada , Toshifumi Asakawa
IPC分类号： H01L2336
CPC分类号： H01J37/32678 , B81B2203/0109 , B81B2203/0118 , B81B2203/0127 , B81C1/0038 , B81C2201/0109 , C23C16/48 , C23C16/486 , C23C16/511 , C23C16/56 , G01L9/0042 , G01P15/0802 , G02F2001/136281 , H01H59/0009 , H01L27/12 , H01L27/1203 , H01L31/03762 , H01L31/0693 , H01L31/0725 , H01L31/073 , H01L31/078 , H01L31/1804 , H01L31/1828 , H01L31/186 , H02N1/002 , Y02E10/543 , Y02E10/544 , Y02E10/547 , Y02E10/548 , Y02P70/521
摘要： In order to easily and accurately manufacture a micromachine comprising a member which is made of a single-crystalline material and having a complicated structure, an uppermost layer (1104) of a single-crystalline Si substrate (1102) whose (100) plane is upwardly directed is irradiated with Ne atom currents from a plurality of prescribed directions, so that the crystal orientation of the uppermost layer (1104) is converted to such orientation that the (111) plane is upwardly directed. A masking member (106) is employed as a shielding member to anisotropically etch the substrate (1102) from its bottom surface, thereby forming a V-shaped groove (1112). At this time, the uppermost layer (1104) serves as an etching stopper. Thus, it is possible to easily manufacture a micromachine having a single-crystalline diaphragm having a uniform thickness. A micromachine having a complicated member such as a diagram which is made of a single-crystalline material can be easily manufactured through no junction.
摘要翻译：为了容易且精确地制造包括由单晶材料制成且具有复杂结构的构件的微加工机构，（100）面向上的单晶Si衬底（1102）的最上层（1104）从多个规定方向对Ne原子电流进行照射，使得最上层（1104）的晶体取向被转换为（111）面向上方向的取向。采用掩模构件（106）作为屏蔽构件，从其底面各向异性地蚀刻衬底（1102），从而形成V形槽（1112）。此时，最上层（1104）用作蚀刻停止器。因此，可以容易地制造具有均匀厚度的单晶隔膜的微加工机。具有复合构件的微机械，例如由单晶材料制成的图可以容易地通过无接合制造。

23. 发明授权

US5563844A Architecture for accessing very high density memory device 失效
标题翻译：用于访问非常高密度的存储设备的架构
公开(公告)号：US5563844A
公开(公告)日：1996-10-08
申请号：US411983
申请日：1995-03-28
申请人： Akira Takata , Tetsuo Hikawa , Takashi Sawada , Tom Dang-hsing Yiu , Ful-Long Ni
发明人： Akira Takata , Tetsuo Hikawa , Takashi Sawada , Tom Dang-hsing Yiu , Ful-Long Ni
IPC分类号： H01L27/10 , G11C8/04 , G11C17/00 , G11C17/10 , G11C8/00
CPC分类号： G11C17/10 , G11C8/04
摘要： In order to improve area efficiency of a mask ROM, a head address is inputted from a common pad (204) only in an initial access, so that addresses are thereafter changed by an internal counter (212). Data output is carried out through the common pad (204). Wires are employed for address input and data output in common, thereby remarkably reducing the number of wires.
摘要翻译：为了提高掩模ROM的面积效率，仅在初始访问中从公共焊盘（204）输入头地址，于是之后通过内部计数器（212）改变地址。数据输出通过公共焊盘（204）进行。电线用于地址输入和数据输出，从而显着减少了电线数量。

24. 发明授权

US4992679A Programming logic device with multiple independent feedbacks per input/output terminal 失效
标题翻译：编程逻辑器件，每个输入/输出端子具有多个独立反馈
公开(公告)号：US4992679A
公开(公告)日：1991-02-12
申请号：US555364
申请日：1990-07-16
申请人： Akira Takata , Koichi Fujii
发明人： Akira Takata , Koichi Fujii
IPC分类号： A23G9/04 , A23G9/20 , A47J43/046 , F25C5/12 , G01R31/3185 , H03K19/177
CPC分类号： A23G9/045 , A23G9/20 , F25C5/12 , G01R31/318516 , H03K19/17712
摘要： A programmable logic device includes an AND plane and an OR plane associated with the AND plane. At least one of the AND and OR planes includes an array of programmable memory elements which can be selectively programmed to define a desired logic function. In one form, a function cell designed for providing one of a predetermined functions, such as a counter or shift register function, selectively is provided. In another form, a driver circuit connected to a pair of input lines has a first state in which one of the paired input lines serves as an inverting input line and the other as a non-inverting input line and a second state in which both of the paired input lines are set at low level. In a further form, two pairs of input lines of the AND plane are connected to an input or input/output terminal of the device. In a still further form, the AND plane further includes a plurality of test input lines each associated with the corresponding one of the product term lines of the AND plane, and an three-state output buffer is connected between the OR plane and a device output terminal, whereby the output buffer is enabled by a logical sum between a selected product term from the AND plane and an internally supplied test mode signal.
摘要翻译：可编程逻辑器件包括AND平面和与AND平面相关联的OR平面。 AND和OR平面中的至少一个包括可编程存储器元件的阵列，其可以被选择性地编程以定义期望的逻辑功能。在一种形式中，提供了用于选择性地提供诸如计数器或移位寄存器功能之类的预定功能之一的功能单元。在另一种形式中，连接到一对输入线的驱动器电路具有第一状态，其中一对输入线中的一个用作反相输入线，而另一个用作非反相输入线，而第二状态成对的输入线设置为低电平。在另一种形式中，AND平面的两对输入线连接到设备的输入或输入/输出端子。在另一种形式中，AND平面还包括多个测试输入线，每条测试输入线与AND平面的相应一个乘积项相关联，三态输出缓冲器连接在OR平面和器件输出终端，由此通过来自AND平面的所选择的产品项和内部提供的测试模式信号之间的逻辑和启用输出缓冲器。

25. 发明授权

US4857773A Programming logic device with test-signal enabled output 失效
标题翻译：具有测试信号使能输出的编程逻辑器件
公开(公告)号：US4857773A
公开(公告)日：1989-08-15
申请号：US199122
申请日：1988-08-01
申请人： Akira Takata , Koichi Fujii
发明人： Akira Takata , Koichi Fujii
IPC分类号： A23G9/04 , A23G9/20 , A47J43/046 , F25C5/12 , G01R31/3185 , H03K19/177
CPC分类号： A23G9/045 , A23G9/20 , F25C5/12 , G01R31/318516 , H03K19/17712
摘要： A programmable logic device includes an AND plane and an OR plane associated with the AND plane. At least one of the AND and OR planes includes an array of programmable memory elements which can be selectively programmed to define a desired logic function. In one form, a function cell designed for providing one of a predetermined functions, such as a counter or shift register function, selectively is provided. In another form, a driver circuit connected to a pair of input lines has a first state in which one of the paired input lines serves as an inverting input line and the other as a non-inverting input line and a second state in which both of the paired input lines are set at low level. In a further form, two pairs of input lines of the AND plane are connected to an input or input/output terminal of the device. In a still further form, the AND plane further includes a plurality of test input lines each associated with the corresponding one of the product term lines of the AND plane, and an three-state output buffer is connected between the OR plane and a device output terminal, whereby the output buffer is enabled by a logical sum between a selected product term from the AND plane and an internally supplied test mode signal.
摘要翻译：可编程逻辑器件包括AND平面和与AND平面相关联的OR平面。 AND和OR平面中的至少一个包括可编程存储器元件的阵列，其可以被选择性地编程以定义期望的逻辑功能。在一种形式中，提供了用于选择性地提供诸如计数器或移位寄存器功能之类的预定功能之一的功能单元。在另一种形式中，连接到一对输入线的驱动器电路具有第一状态，其中一对输入线中的一个用作反相输入线，而另一个用作非反相输入线，而第二状态成对的输入线设置为低电平。在另一种形式中，AND平面的两对输入线连接到设备的输入或输入/输出端子。在另一种形式中，AND平面还包括多个测试输入线，每条测试输入线与AND平面的相应一个乘积项相关联，三态输出缓冲器连接在OR平面和器件输出终端，由此通过来自AND平面的所选择的产品项和内部提供的测试模式信号之间的逻辑和启用输出缓冲器。

26. 发明授权

US4626704A Voltage level converting circuit 失效
标题翻译：电压电平转换电路
公开(公告)号：US4626704A
公开(公告)日：1986-12-02
申请号：US724793
申请日：1985-04-19
申请人： Akira Takata , Toyofumi Takahashi
发明人： Akira Takata , Toyofumi Takahashi
IPC分类号： G11C17/00 , G11C5/14 , G11C11/409 , G11C16/06 , G11C16/12 , H01L27/10 , H03K5/02 , H03K17/22 , H03K19/00 , H03K19/0185 , H03K19/0948 , H03K5/00
CPC分类号： H03K19/09485 , G11C16/12 , G11C5/143 , G11C5/147 , H03K17/223 , H03K19/0008 , H03K19/018521 , H03K19/0948
摘要： A voltage level converting circuit for use in semiconductor devices including memory such as ROMs, PROMs and EPROMs comprises an input terminal to which an input signal is applied, a voltage level detecting circuit for detecting the voltage level of the input signal received by the input terminal and supplying an output signal of the voltage level determined in response to the level of the input signal, an inverter connected to the voltage level detecting circuit and a CMOS device having a pair of outside source/drain terminals connected between the input terminal and a first reference voltage, a gate terminal connected to the output of the inverter and the inner interconnected source/drain terminals connected to an output terminal of the circuit.
摘要翻译：一种用于包括诸如ROM，PROM和EPROM的存储器的半导体器件的电压电平转换电路包括：施加输入信号的输入端子，用于检测由输入端子接收的输入信号的电压电平的电压电平检测电路并提供响应于输入信号的电平确定的电压电平的输出信号，连接到电压电平检测电路的反相器和连接在输入端和第一端之间的一对外部源极/漏极端子的CMOS器件参考电压，连接到逆变器的输出的栅极端子和连接到电路的输出端子的内部互连的源极/漏极端子。

27. 发明授权

US4464816A Sized warp divider for a sizing machine 失效
标题翻译：用于定型机的尺寸经线分隔器
公开(公告)号：US4464816A
公开(公告)日：1984-08-14
申请号：US207995
申请日：1980-11-18
申请人： Akira Takata
发明人： Akira Takata
IPC分类号： D06B23/06 , D06B3/04
CPC分类号： D06B23/06
摘要： A sized warp divider of a rotary divider disc type is provided with a wash bath containing flow of liquid for partial immersion of the discs for removal of size dregs and fluffs, and an air jet ejector for removal of liquid drops remaining in spaces between the discs after the immersion for even sizing and drying effects on warps. Beautifully cleaned faced of the discs assures smooth and ideal contact with the running warps, thereby greatly improving the quality of the product and efficiency of the process.
摘要翻译：旋转分隔盘型尺寸的经线分配器设置有洗涤槽，其包含用于部分浸渍盘的液体流，用于去除尺寸的渣滓和绒毛;以及空气喷射喷射器，用于去除残留在盘之间的空间中的液滴浸泡后对经纱进行均匀和干燥效果。美观的盘面保证与运行的经纱的平滑和理想的接触，从而大大提高了产品的质量和过程的效率。

28. 发明授权

US4282840A Internal combustion engine with altitude compensation device 失效
标题翻译：内燃机配高空补偿装置
公开(公告)号：US4282840A
公开(公告)日：1981-08-11
申请号：US123424
申请日：1980-02-21
申请人： Kenji Yamada , Akira Takata , Akira Ii , Katsuhiko Ohiwa
发明人： Kenji Yamada , Akira Takata , Akira Ii , Katsuhiko Ohiwa
IPC分类号： F02P5/10 , F02P5/04
CPC分类号： F02P5/106
摘要： An altitude compensation device for an internal combustion engine having a vacuum-operated ignition timing advancer and a carburetor has an atmospheric pressure variation responsive valve operative to control the air bleed of the carburetor and the vacuum fed to the vacuum advancer such that, as the atmospheric air pressure is lowered due to increase of the altitude, the air flow into the advancer vacuum chamber is decreased to advance the ignition timing while the air flow into the carburetor air bleed passage is increased to increase the air-fuel ratio of the air-fuel mixture produced by the carburetor.
摘要翻译：具有真空操作的点火正时推进器和化油器的内燃机的高度补偿装置具有大气压变化响应阀，其操作用于控制化油器的排气和供给真空推进器的真空，使得作为大气空气压力由于高度的增加而降低，降低进入推进器真空室的空气流量，从而提高点火正时，同时进入化油器排气通道的空气流量增加，以增加空气燃料的空燃比由化油器生产的混合物。

29. 发明授权

US4068472A First and second air feeding means to regulate a/f ratio wherein second air feed requires two signals for actuation 失效
标题翻译：用于调节a / f比率的第一和第二空气供给装置，其中第二空气进料需要两个用于致动的信号
公开(公告)号：US4068472A
公开(公告)日：1978-01-17
申请号：US718535
申请日：1976-08-30
申请人： Akira Takata , Toshio Tanahashi , Toshio Oda
发明人： Akira Takata , Toshio Tanahashi , Toshio Oda
IPC分类号： F01N3/22 , F02D41/14 , F02B75/10 , F01N3/15 , F02M23/00
CPC分类号： F01N3/222 , F01N3/22 , F02D41/1441 , Y02T10/22 , Y10T477/79
摘要： An exhaust gas purifying device for an internal combustion engine, comprising a catalytic converter containing a three way catalyzer therein, a first oxygen sensor disposed in the exhaust passage, and an air-fuel ratio regulating means for regulating an air-fuel ratio of the mixture fed into the cylinder of the engine so as to conform it to the stoichiometric air-fuel ratio in response to an output signal of said first oxygen sensor over a larger range of running conditions of a vehicle. Said exhaust gas purifying device further comprises a second oxygen sensor located downstream of the catalytic converter, and a secondary air feeding device located upstream of the catalytic converter for regulating the feeding of a secondary air into the exhaust gas in response to an output signal of said second oxygen sensor so that the ratio of the air consisting of said secondary air and air contained in the mixture introduced into the cylinders of the engine to the fuel contained in the mixture introduced into the cylinders is made equal to the stoichiometric air-fuel ratio at the time of acceleration, deceleration and gear-shifting.
摘要翻译：一种用于内燃机的废气净化装置，包括其中包含三元催化剂的催化转化器，设置在排气通道中的第一氧传感器和用于调节混合物的空燃比的空燃比调节装置馈送到发动机的气缸中，以便在车辆的较大行驶条件下响应于所述第一氧气传感器的输出信号而使其符合理论空燃比。所述废气净化装置还包括位于催化转化器下游的第二氧传感器，以及位于催化转化器上游的二次空气供给装置，用于响应于所述废气净化装置的输出信号调节二次空气进入废气中第二氧传感器，使得由所述二次空气组成的空气和引入到发动机气缸中的混合物中所含的空气与引入到气缸中的混合物中所含的燃料的比率等于化学计量空燃比加速，减速和换档的时间。

30. 发明授权

US6025252A Semiconductor device and method of fabricating the same 失效
公开(公告)号：US6025252A
公开(公告)日：2000-02-15
申请号：US917266
申请日：1997-08-25
申请人： Masahiro Shindo , Daisuke Kosaka , Tetsuo Hikawa , Akira Takata , Yukihiro Ukai , Takashi Sawada , Toshifumi Asakawa
发明人： Masahiro Shindo , Daisuke Kosaka , Tetsuo Hikawa , Akira Takata , Yukihiro Ukai , Takashi Sawada , Toshifumi Asakawa
IPC分类号： B81B3/00 , C23C16/48 , C23C16/511 , C23C16/56 , G01L9/00 , G01P15/08 , H01H59/00 , H01J37/32 , H01L27/12 , H01L31/0376 , H01L31/078 , H01L31/18 , H02N1/00 , H01L31/06
CPC分类号： H01J37/32678 , B81C1/0038 , C23C16/48 , C23C16/486 , C23C16/511 , C23C16/56 , G01L9/0042 , G01P15/0802 , H01L27/12 , H01L27/1203 , H01L31/03762 , H01L31/0693 , H01L31/0725 , H01L31/073 , H01L31/078 , H01L31/1804 , H01L31/1828 , H01L31/186 , H02N1/002 , B81B2203/0109 , B81B2203/0118 , B81B2203/0127 , B81C2201/0109 , G02F2001/136281 , H01H59/0009 , Y02E10/543 , Y02E10/544 , Y02E10/547 , Y02E10/548 , Y02P70/521
摘要： In order to easily and accurately manufacture a micromachine comprising a member which is made of a single-crystalline material and having a complicated structure, an uppermost layer (1104) of a single-crystalline Si substrate (1102) whose (100) plane is upwardly directed is irradiated with Ne atom currents from a plurality of prescribed directions, so that the crystal orientation of the uppermost layer (1104) is converted to such orientation that the (111) plane is upwardly directed. A masking member (106) is employed as a shielding member to anisotropically etch the substrate (1102) from its bottom surface, thereby forming a V-shaped groove (1112). At this time, the uppermost layer (1104) serves as an etching stopper. Thus, it is possible to easily manufacture a micromachine having a single-crystalline diaphragm having a uniform thickness. A micromachine having a complicated member such as a diagram which is made of a single-crystalline material can be easily manufactured through no junction.

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