专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US06481616B2 Bump bonding device and bump bonding method 失效
标题翻译：凸块接合装置和凸块接合方法
公开(公告)号：US06481616B2
公开(公告)日：2002-11-19
申请号：US09978872
申请日：2001-10-17
申请人： Makoto Imanishi , Akihiro Yamamoto , Hiroyuki Otani , Shinzo Eguchi , Takahiro Yonezawa , Kazushi Higashi , Koichi Yoshida , Kouji Hirotani
发明人： Makoto Imanishi , Akihiro Yamamoto , Hiroyuki Otani , Shinzo Eguchi , Takahiro Yonezawa , Kazushi Higashi , Koichi Yoshida , Kouji Hirotani
IPC分类号： B23K3102
CPC分类号： H01L21/68 , H01L21/321 , H01L24/11 , H01L24/81 , H01L2224/13099 , H01L2224/45144 , H01L2224/81205 , H01L2224/81801 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01033 , H01L2924/01039 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/00
摘要： To eliminate breakage of electronic parts or defective bonding, and enhance reliability of electronic parts, in regulation of electronic parts in bump bonding device. A bump bonding device comprising a stage 1 for mounting and heating an electronic part, and a position regulating device including a rotatable regulating plate 2 having a side for positioning the electronic part, a plate 4 having a side for positioning the electronic part in collaboration with the regulating plate, and a regulating spring 5 for applying a regulating force to the regulating plate in order to press the electronic part to the plate 4.
摘要翻译：为了消除电子零件的破损或接合不良，提高电子零件的可靠性，在凸块焊接装置中调节电子部件。一种凸块接合装置，包括用于安装和加热电子部件的台架1和包括具有用于定位电子部件的侧面的可旋转调节板2的位置调节装置，具有用于与电子部件配合的侧面的板4 调节板和用于向调节板施加调节力以便将电子部件按压到板4的调节弹簧5。

22. 发明授权

US06193136B1 Component mounting method and apparatus 有权
标题翻译：组件安装方法和装置
公开(公告)号：US06193136B1
公开(公告)日：2001-02-27
申请号：US09373957
申请日：1999-08-13
申请人： Kazushi Higashi , Hiroyuki Otani , Shozo Minamitani , Shinji Kanayama , Kenji Takahashi
发明人： Kazushi Higashi , Hiroyuki Otani , Shozo Minamitani , Shinji Kanayama , Kenji Takahashi
IPC分类号： B23K106
CPC分类号： H01L21/563 , B23K20/10 , B23K2101/40 , H01L21/67126 , H01L24/27 , H01L24/29 , H01L24/743 , H01L24/75 , H01L24/81 , H01L24/83 , H01L2224/05568 , H01L2224/05573 , H01L2224/1134 , H01L2224/131 , H01L2224/16225 , H01L2224/32225 , H01L2224/73104 , H01L2224/73203 , H01L2224/73204 , H01L2224/75 , H01L2224/75355 , H01L2224/75743 , H01L2224/75801 , H01L2224/81121 , H01L2224/81191 , H01L2224/81193 , H01L2224/81205 , H01L2224/81801 , H01L2224/83191 , H01L2224/83192 , H01L2224/83862 , H01L2224/83874 , H01L2224/92125 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01033 , H01L2924/01039 , H01L2924/014 , H01L2924/14 , H01L2224/13099 , H01L2924/00 , H01L2224/05599
摘要： Sealant 11 is supplied in advance to one or both of the electrical bonding areas 5,6 of the component 3 and the mounting surface 4, and as the component 3 is brought in contact with the mounting surface 4, the sealant 11 is compressed and filled therebetween in a required area. At the same time ultrasonic vibration is applied to the component 3 for generating friction between the electrical bonding areas 5, 6 of the component 3 and the mounting surface 4 in tight contact with each other, so that both electrical bonding areas 5, 6 are melted and ultrasonically bonded together, and thereby the component 3 is mounted on the mounting surface 4.
摘要翻译：密封剂11预先被供给到部件3的电接合区域5,6和安装表面4中，并且当部件3与安装表面4接触时，密封剂11被压缩和填充在所需区域之间。同时，对组件3施加超声波振动，以在组件3的电接合区域5,6和安装表面4之间产生摩擦力，彼此紧密接触，使得两个电接合区域5,6被熔化并超声波接合在一起，从而将部件3安装在安装面4上。

23. 发明授权

US6055724A Method and device for sealing IC chip 失效
标题翻译：密封IC芯片的方法和装置
公开(公告)号：US6055724A
公开(公告)日：2000-05-02
申请号：US155720
申请日：1998-10-02
申请人： Kenichi Nishino , Shinji Kanayama , Hiroyuki Otani , Kohei Enchi , Hiroyuki Yoshida
发明人： Kenichi Nishino , Shinji Kanayama , Hiroyuki Otani , Kohei Enchi , Hiroyuki Yoshida
IPC分类号： H01L21/60 , H01L21/00 , H01L21/56 , H01L23/28 , H01R43/00 , B23P19/00
CPC分类号： H01L24/27 , H01L21/56 , H01L21/563 , H01L21/67126 , H01L24/28 , H01L2224/73203 , H01L2224/83102 , H01L2224/92125 , H01L2224/92225 , H01L2924/01004 , H01L2924/01006 , H01L2924/01033 , H01L2924/14 , Y10T29/4913 , Y10T29/49171 , Y10T29/53178
摘要： A method and device for sealing an IC chip are provided, by which a sealing material is surely discharged onto the upper surface of a circuit board, and the occurrence of imperfect sealing can be eliminated. A first gap (h1) is provided between an application nozzle (15) and a circuit board (13) on which an IC chip (12) is mounted before discharging the sealing material (17), after which a second gap (h2) which is greater than the first gap (h1) is provided between the application nozzle (15) and the circuit board (13) while discharging the sealing material (17), thereby accomplishing the sealing of the IC chip (12), and ensuring that the sealing operation is performed after the sealing material (17) has completely come to contact with the upper surface of the circuit board (13).
摘要翻译： PCT No.PCT / JP98 / 00447 Sec。 371日期：1998年10月2日 102（e）1998年10月2日日期PCT提交1998年2月2日PCT公布。第WO98 / 34276号公报日本1998年8月6日提供了一种用于密封IC芯片的方法和装置，通过该方法和装置可靠地将密封材料排出到电路板的上表面上，并且可以消除不完全密封的发生。在排出密封材料（17）之前，在施加喷嘴（15）和安装有IC芯片（12）的电路板（13）之间设置有第一间隙（h1），之后，将第二间隙（h2）大于在排出密封材料（17）时在施加喷嘴（15）和电路板（13）之间提供第一间隙（h1），从而实现IC芯片（12）的密封，并且确保在密封材料（17）完全与电路板（13）的上表面接触之后进行密封操作。

24. 发明申请

US20070013067A1 Electronic component mounting method and apparatus 失效
标题翻译：电子元件安装方法和装置
公开(公告)号：US20070013067A1
公开(公告)日：2007-01-18
申请号：US11527461
申请日：2006-09-27
申请人： Kazuto Nishida , Hidenobu Nishikawa , Yoshinori Wada , Hiroyuki Otani
发明人： Kazuto Nishida , Hidenobu Nishikawa , Yoshinori Wada , Hiroyuki Otani
IPC分类号： H01L23/48 , H01L21/44
CPC分类号： H01L24/27 , H01L21/563 , H01L23/295 , H01L24/29 , H01L24/31 , H01L24/81 , H01L24/83 , H01L2224/0401 , H01L2224/05568 , H01L2224/05571 , H01L2224/05624 , H01L2224/11 , H01L2224/1134 , H01L2224/13 , H01L2224/13023 , H01L2224/13099 , H01L2224/13118 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/29082 , H01L2224/29083 , H01L2224/29101 , H01L2224/2919 , H01L2224/2929 , H01L2224/293 , H01L2224/29399 , H01L2224/29499 , H01L2224/32225 , H01L2224/45 , H01L2224/45118 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48 , H01L2224/48624 , H01L2224/48824 , H01L2224/73104 , H01L2224/73204 , H01L2224/75 , H01L2224/75251 , H01L2224/75252 , H01L2224/78301 , H01L2224/81191 , H01L2224/81801 , H01L2224/83101 , H01L2224/83191 , H01L2224/83192 , H01L2224/83851 , H01L2224/83856 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/3011 , H01L2924/3511 , H05K3/323 , H01L2924/00 , H01L2224/05552 , H01L2924/00014 , H01L2924/00012
摘要： A chip is bonded on a circuit board by aligning in position bumps with board electrodes with interposition of an anisotropic conductive layer between the chip and the circuit board. The anisotropic conductive layer is a mixture of an insulating resin, conductive particles and an inorganic filler. The chip is pressed against the board with a pressure force of not smaller than 20 gf per bump by virtue of a tool, while warp of the chip and the board is connected, the bumps are compressed, and the insulating resin is hardened.
摘要翻译：芯片通过在位置凸块与板电极之间对准而在电路板上粘合，在芯片和电路板之间插入各向异性导电层。各向异性导电层是绝缘树脂，导电颗粒和无机填料的混合物。利用工具，以每个凸起不小于20gf的压力将芯片压在板上，同时连接芯片和板的翘曲，凸起被压缩，绝缘树脂硬化。

25. 发明申请

US20050278489A1 Storage device, control method for partitioning logical memory devices, and medium embodying program for partitioning logical memory devices 失效
标题翻译：存储设备，用于分区逻辑存储器设备的控制方法以及体现用于分区逻辑存储器设备的程序的介质
公开(公告)号：US20050278489A1
公开(公告)日：2005-12-15
申请号：US11122101
申请日：2005-05-05
申请人： Hiroyuki Otani
发明人： Hiroyuki Otani
IPC分类号： G06F3/06 , G06F12/00
CPC分类号： G06F3/0644 , G06F3/0614 , G06F3/0689
摘要： A storage device which limits the partition of the logical memory devices for computers in accordance with the condition of partition which was defined to the properties such as reliability and the storage device so that the logical memory devices are unable to be utilized for uses other than objectives, a control method for partitioning the logical memory devices of the storage device and a control program product for partitioning the logical memory devices of the storage device. An access control means approves an access only to the logical memory device which was partitioned referring to an access control table. An access control setting means renews the access control table so as to partition the assigned logical memory devices to the assigned computer when the assigned logical memory devices can be partitioned. A utilization condition setting means determines the partition propriety of the logical memory device based the content of the partition condition defining table including a pair of the property condition which is the origin of judging whether the logical memory device can be partitioned or not and the partition propriety information of showing the propriety of partition to the computer and the content of the property table including a pair of the logical memory device ID and the property information of the corresponding logical memory device, and renews the partition management table.
摘要翻译：根据对诸如可靠性和存储设备等属性定义的分区条件，限制用于计算机的逻辑存储设备的分区的存储设备，使得逻辑存储器设备不能用于除目标之外的用途，用于划分存储装置的逻辑存储装置的控制方法和用于划分存储装置的逻辑存储装置的控制程序产品。访问控制装置仅批准对参考访问控制表进行分区的逻辑存储设备的访问。访问控制设置装置更新访问控制表，以便当分配的逻辑存储器设备可以被分区时，将分配的逻辑存储器设备分配给分配的计算机。利用条件设置装置根据分区条件定义表的内容确定逻辑存储装置的分区合理性，该内容包括作为判断逻辑存储装置是否可分割的原点的属性条件对以及分区正确性显示分配给计算机的适当性的信息和属性表的内容，包括一对逻辑存储器设备ID和对应的逻辑存储设备的属性信息，并更新分区管理表。

26. 发明授权

US06926796B1 Electronic parts mounting method and device therefor 失效
标题翻译：电子零件安装方法及其装置
公开(公告)号：US06926796B1
公开(公告)日：2005-08-09
申请号：US09890066
申请日：2000-01-26
申请人： Kazuto Nishida , Hidenobu Nishikawa , Yoshinori Wada , Hiroyuki Otani
发明人： Kazuto Nishida , Hidenobu Nishikawa , Yoshinori Wada , Hiroyuki Otani
IPC分类号： H01L21/60 , H05K3/32
CPC分类号： H01L24/31 , H01L21/563 , H01L23/295 , H01L24/11 , H01L24/13 , H01L24/27 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/81 , H01L24/83 , H01L2224/0401 , H01L2224/05624 , H01L2224/11 , H01L2224/1134 , H01L2224/13 , H01L2224/13099 , H01L2224/13124 , H01L2224/13144 , H01L2224/16225 , H01L2224/29082 , H01L2224/29083 , H01L2224/29101 , H01L2224/2919 , H01L2224/2929 , H01L2224/29344 , H01L2224/2949 , H01L2224/29499 , H01L2224/32225 , H01L2224/45144 , H01L2224/48624 , H01L2224/73104 , H01L2224/73204 , H01L2224/75 , H01L2224/75251 , H01L2224/75252 , H01L2224/78301 , H01L2224/81048 , H01L2224/81191 , H01L2224/81801 , H01L2224/81903 , H01L2224/83048 , H01L2224/83101 , H01L2224/83191 , H01L2224/83192 , H01L2224/83194 , H01L2224/83851 , H01L2224/83856 , H01L2224/9211 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/07811 , H01L2924/09701 , H01L2924/14 , H01L2924/181 , H01L2924/3011 , H01L2924/3511 , H05K3/323 , Y10T29/4913 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A chip is bonded on a circuit board by aligning in position bumps with board electrodes with interposition of an anisotropic conductive layer between the chip and the circuit board. The anisotropic conductive layer is a mixture of an insulating resin, conductive particles and an inorganic filler. The chip is pressed against the board with a pressure force of not smaller than 20 gf per bump by virtue of a tool, while warp of the chip and the board is corrected, the bumps are compressed, and the insulating resin is hardened.
摘要翻译：芯片通过在位置凸块与板电极之间对准而在电路板上粘合，在芯片和电路板之间插入各向异性导电层。各向异性导电层是绝缘树脂，导电颗粒和无机填料的混合物。利用工具，以每个凸起不超过20gf的压力将芯片压靠在板上，同时校正芯片和板的翘曲，凸块被压缩，绝缘树脂硬化。

27. 发明授权

US06787922B2 Semiconductor chip—mounting board 失效
标题翻译：半导体芯片安装板
公开(公告)号：US06787922B2
公开(公告)日：2004-09-07
申请号：US10361605
申请日：2003-02-11
申请人： Hiroyuki Otani , Yoshihiko Yagi , Kenichi Yamamoto
发明人： Hiroyuki Otani , Yoshihiko Yagi , Kenichi Yamamoto
IPC分类号： H01L2940
CPC分类号： H01L24/16 , H01L23/49838 , H01L24/32 , H01L24/81 , H01L2224/05568 , H01L2224/05573 , H01L2224/1134 , H01L2224/13144 , H01L2224/16225 , H01L2224/27013 , H01L2224/32225 , H01L2224/73204 , H01L2224/81801 , H01L2224/83051 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/3511 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2224/05599
摘要： A strengthening land is formed on a semiconductor chip-mounting board corresponding to a non-operating electrode on a semiconductor chip. The strengthening land and the non-operating electrode are bonded with each other, thereby improving a bonding strength between the semiconductor chip and the semiconductor chip-mounting board.
摘要翻译：在与半导体芯片上的非操作电极对应的半导体芯片安装板上形成有强化焊盘。加强焊盘和非操作电极彼此接合，从而提高半导体芯片和半导体芯片安装板之间的接合强度。

28. 发明授权

US06328196B1 Bump bonding device and bump bonding method 失效
标题翻译：凸块接合装置和凸块接合方法
公开(公告)号：US06328196B1
公开(公告)日：2001-12-11
申请号：US09202567
申请日：1998-12-17
申请人： Makoto Imanishi , Akihiro Yamamoto , Hiroyuki Otani , Shinzo Eguchi , Takahiro Yonezawa , Kazushi Higashi , Koichi Yoshida , Kouji Hirotani
发明人： Makoto Imanishi , Akihiro Yamamoto , Hiroyuki Otani , Shinzo Eguchi , Takahiro Yonezawa , Kazushi Higashi , Koichi Yoshida , Kouji Hirotani
IPC分类号： B23Q900
CPC分类号： H01L21/68 , H01L21/321 , H01L24/11 , H01L24/81 , H01L2224/13099 , H01L2224/45144 , H01L2224/81205 , H01L2224/81801 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01033 , H01L2924/01039 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/00
摘要： To eliminate breakage of electronic parts or defective bonding, and enhance reliability of electronic parts, in regulation of electronic parts in bump bonding device. A bump bonding device comprising a stage 1 for mounting and heating an electronic part, and a position regulating device including a rotatable regulating plate 2 having a side for positioning the electronic part, a plate 4 having a side for positioning the electronic part in collaboration with the regulating plate, and a regulating spring 5 for applying a regulating force to the regulating plate in order to press the electronic part to the plate 4.
摘要翻译：为了消除电子零件的破损或接合不良，提高电子零件的可靠性，在凸块焊接装置中调节电子部件。一种凸块接合装置，包括用于安装和加热电子部件的台架1和包括具有用于定位电子部件的侧面的可旋转调节板2的位置调节装置，具有用于与电子部件配合的侧面的板4 调节板和用于向调节板施加调节力以便将电子部件按压到板4的调节弹簧5。

29. 发明授权

US6135024A Screen printing method and printing apparatus 失效
标题翻译：丝网印刷方法和印刷装置
公开(公告)号：US6135024A
公开(公告)日：2000-10-24
申请号：US983448
申请日：1998-03-25
申请人： Takaaki Higashida , Hiroyuki Otani , Takahiko Iwaki
发明人： Takaaki Higashida , Hiroyuki Otani , Takahiko Iwaki
IPC分类号： B23K26/00 , B23K26/38 , B41F15/08 , B41F15/40 , H05K1/03 , H05K3/00 , H05K3/12 , H05K3/34 , H05K3/40 , B41F15/42
CPC分类号： H05K3/1233 , B41F15/0818 , B41F15/40 , H05K2201/10151 , H05K2203/0139 , H05K2203/0783 , H05K2203/1105 , H05K2203/163 , H05K3/3484 , H05K3/4069
摘要： Regarding filling of a paste, a temperature gradient at a paste-pressing face is managed by a heater incorporated in a filling head. Alternatively, a nonvolatile component is applied to a printing face of a base material before the paste is filled, thereby preventing a volatile component of the paste from evaporating with time. Viscosity of the paste is thus maintained. Meanwhile, a change of the quantity of the paste is coped with by changing a moving speed of the filling head or a contact angle of the filling head to the printing face, or by supporting the filling head at the side in touch with the printing face.
摘要翻译： PCT No.PCT / JP96 / 01929 Sec。 371日期：1998年3月25日 102（e）1998年3月25日PCT PCT 1996年7月11日PCT公布。公开号WO97 / 02953 日期1997年1月30日关于糊状物的填充，通过装在灌装头中的加热器来管理糊压面的温度梯度。或者，在填充糊料之前，将非挥发性成分施加到基材的印刷面上，由此防止糊剂的挥发性成分随时间蒸发。因此保持糊状物的粘度。同时，通过改变填充头的移动速度或填充头与打印面的接触角，或者通过将填充头支撑在与印刷面接触的一侧来处理浆料的量的改变。

30. 发明授权

US6061248A Semiconductor chip-mounting board providing a high bonding strength with a semiconductor chip mounted thereon 失效
标题翻译：半导体芯片安装板与安装在其上的半导体芯片提供高的结合强度
公开(公告)号：US6061248A
公开(公告)日：2000-05-09
申请号：US897085
申请日：1997-07-18
申请人： Hiroyuki Otani , Yoshihiko Yagi , Kenichi Yamamoto
发明人： Hiroyuki Otani , Yoshihiko Yagi , Kenichi Yamamoto
IPC分类号： H05K3/34 , H01L21/44 , H01L21/48 , H01L21/50 , H01L21/60 , H01L23/498 , H05K1/18 , H05K7/02
CPC分类号： H01L24/16 , H01L23/49838 , H01L24/32 , H01L24/81 , H01L2224/05568 , H01L2224/05573 , H01L2224/1134 , H01L2224/13144 , H01L2224/16225 , H01L2224/27013 , H01L2224/32225 , H01L2224/73204 , H01L2224/81801 , H01L2224/83051 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/3511
摘要： A strengthening land is formed on a semiconductor chip-mounting board corresponding to a non-operating electrode on a semiconductor chip. The strengthening land and the non-operating electrode are bonded with each other, thereby to improving a bonding strength between the semiconductor chip and the semiconductor chip-mounting board.
摘要翻译：在与半导体芯片上的非操作电极对应的半导体芯片安装板上形成有强化焊盘。加强焊盘和非操作电极彼此接合，从而提高半导体芯片和半导体芯片安装板之间的接合强度。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式