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    • 21. 发明授权
    • Method for forming a bonded substrate containing a planar intrinsic gettering zone and substrate formed by said method
    • 用于形成包含平面本征吸气区和由所述方法形成的衬底的键合衬底的方法
    • US06255195B1
    • 2001-07-03
    • US09255231
    • 1999-02-22
    • Jack H. LinnWilliam H. SpeeceMichael G. ShleprGeorge V. Rouse
    • Jack H. LinnWilliam H. SpeeceMichael G. ShleprGeorge V. Rouse
    • H01L2130
    • H01L21/3226H01L21/2007H01L21/76251Y10S438/977
    • In a method for forming a bonded semiconductor-on-insulator substrate for the fabrication of semiconductor devices and integrated circuits, a surface of a wafer of a monocrystalline semiconductor material is implanted with ions of the semiconductor material a to a selected depth in the wafer to form, adjacent to the surface, an amorphous layer of the semiconductor material. The layer of amorphous semiconductor material extends to a substantially planar zone disposed at substantially the selected depth and comprising the monocrystalline semiconductor material damaged by lattice defects, i.e., end-of-range implant damage. Undamaged material below the selected depth comprises a first layer of the monocrystalline semiconductor material. The wafer is heated under conditions effective to convert the amorphous layer to a second layer of the monocrystalline semiconductor material and to coalesce the zone of damaged monocrystalline semiconductor material, thereby forming a substantially planar intrinsic gettering zone of substantially pure semiconductor material that includes active gettering sites disposed at substantially the selected depth. An insulating bond layer on one surface of a handle wafer is bonded to the surface of the wafer to form a bonded semiconductor-on-insulator substrate comprising a handle wafer, an insulating bond layer, and a device wafer of monocrystalline semiconductor material. The device wafer includes a substantially planar intrinsic gettering zone comprising substantially pure semiconductor material and including active gettering sites. The described bonded substrate is employed in the fabrication of semiconductor devices and integrated circuits.
    • 在用于形成用于制造半导体器件和集成电路的键合半导体绝缘体衬底的方法中,将单晶半导体材料的晶片的表面注入半导体材料a的离子至晶片中的选定深度,以 形成与表面相邻的半导体材料的非晶层。 非晶半导体材料层延伸到基本上平坦的区域,其设置在基本上选定的深度处,并且包括被晶格缺陷损坏的单晶半导体材料,即端端植入物损伤。 低于所选深度的未损坏的材料包括单晶半导体材料的第一层。 在有效地将非晶层转化为单晶半导体材料的第二层并且结合损坏的单晶半导体材料的区域的条件下加热晶片,由此形成基本上平坦的基本上纯的半导体材料的吸杂区,其包括主动吸除位点 设置在基本上选定的深度。 把手晶片的一个表面上的绝缘结合层结合到晶片的表面,以形成包含处理晶片,绝缘结合层和单晶半导体材料的器件晶片的绝缘体上绝缘体衬底。 器件晶片包括基本上平坦的本征吸气区,其包含基本上纯的半导体材料并且包括主动吸气位点。 所描述的键合衬底用于制造半导体器件和集成电路。