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21. 发明授权

US08896148B2 Use of auxiliary currents for voltage regulation 有权
标题翻译：使用辅助电流进行电压调节
公开(公告)号：US08896148B2
公开(公告)日：2014-11-25
申请号：US12820259
申请日：2010-06-22
申请人： Joerg Berthold , Peter Mahrla , Stephan Henzler , Vincent Gouin , Fan He
发明人： Joerg Berthold , Peter Mahrla , Stephan Henzler , Vincent Gouin , Fan He
IPC分类号： G05F3/02 , G05F1/46
CPC分类号： G05F1/46 , Y10T307/391 , Y10T307/658
摘要： One embodiment relates to an apparatus that includes at least one circuit block and a voltage source configured to supply a first voltage to the at least one circuit block. The apparatus also includes a power delivery unit configured to be selectively activated based on a whether a quantity of power is to be delivered from the power delivery unit to the circuit block. A control unit is configured to, upon a change in power consumption of the at least one circuit block, activate the auxiliary power delivery unit to deliver the quantity of power to the circuit block. The auxiliary power delivery unit can quickly supply large currents since it does not necessarily rely on slow control loops using voltage sensing. Rather, the auxiliary power delivery unit often delivers pre-calculated current profiles to respond to the timing characteristic of the change of power consumption and of the voltage regulator.
摘要翻译：一个实施例涉及一种装置，其包括至少一个电路块和被配置为向至少一个电路块提供第一电压的电压源。该装置还包括配置为基于是否将从电力传送单元传送到电路块的功率量来选择性地激活的电力输送单元。控制单元被配置为在所述至少一个电路块的功率消耗的变化时激活辅助功率传递单元以将功率量传递到所述电路块。辅助电力输送单元可以快速提供大电流，因为它不一定依赖于使用电压感测的慢速控制回路。相反，辅助电力输送单元通常递送预先计算的电流曲线以响应功率变化和电压调节器的定时特性。

22. 发明授权

US08830104B2 Data converter having a passive filter 有权
标题翻译：数据转换器具有无源滤波器
公开(公告)号：US08830104B2
公开(公告)日：2014-09-09
申请号：US13187975
申请日：2011-07-21
申请人： Stephan Henzler , Matthias Schoebinger , Lajos Gazsi
发明人： Stephan Henzler , Matthias Schoebinger , Lajos Gazsi
IPC分类号： H03M1/12
CPC分类号： H03M1/125 , H03M1/504
摘要： Exemplary implementations of electrical circuits and systems are disclosed, and methods for signal processing including sampling and quantizing of amplitude and band limited signals implemented through a Passive Pulse Modulation Analog to Digital Converter (PMADC).
摘要翻译：公开了电路和系统的示例性实施方式，以及用于信号处理的方法，包括通过无源脉冲调制模数转换器（PMADC）实现的振幅和频带限制信号的采样和量化。

23. 发明申请

US20130307509A1 DIGITAL EVENT GENERATOR, COMPARATOR, SWITCHED MODE ENERGY CONVERTER AND METHOD 有权
标题翻译：数字事件发生器，比较器，开关模式能量转换器和方法
公开(公告)号：US20130307509A1
公开(公告)日：2013-11-21
申请号：US13473213
申请日：2012-05-16
申请人： Stephan Henzler
发明人： Stephan Henzler
IPC分类号： G04F10/04 , H03K5/22 , G05F1/10
CPC分类号： H02M3/157 , H03K7/08
摘要： A digital event generator includes a counter configured to provide at least one count value based on a clock signal, and a comparator configured to evaluate a first portion of a first count value to detect a near occurrence of an event, in response to a detection of a near occurrence of an event, evaluate a second portion of a second count value, and provide the event signal based on the evaluation and digital event time information. A switched mode energy converter uses said digital event generator.
摘要翻译：数字事件发生器包括被配置为基于时钟信号提供至少一个计数值的计数器和被配置为响应于检测到的事件的近似出现来评估第一计数值的第一部分以检测事件的近似出现的比较器近似出现事件，评估第二计数值的第二部分，并且基于评估和数字事件时间信息提供事件信号。开关模式能量转换器使用所述数字事件发生器。

24. 发明申请

US20120303994A1 APPARATUS FOR SYNCHRONIZING A DATA HANDOVER BETWEEN A FIRST CLOCK DOMAIN AND A SECOND CLOCK DOMAIN 有权
标题翻译：用于同步第一时钟域和第二时钟域之间的数据切换的装置
公开(公告)号：US20120303994A1
公开(公告)日：2012-11-29
申请号：US13113730
申请日：2011-05-23
申请人： Thomas Bauernfeind , Stephan Henzler
发明人： Thomas Bauernfeind , Stephan Henzler
IPC分类号： G06F13/42 , H04L7/00
CPC分类号： H04L7/005 , G06F5/12 , G06F2205/061 , G06F2205/102 , H04L7/0012
摘要： Embodiments of the present invention provide an apparatus for synchronizing a data handover between a first clock domain and a second clock domain. The apparatus includes a calculator, a first-in-first-out storage, a synchronization pulse generator, a fill level information provider and a feedback path. The calculator is clocked with the clock of the first clock domain and configured to provide a synchronization pulse cycle duration information describing a temporal position of synchronization pulses at a clock of the second clock domain. The first-in-first-out storage is configured to take over an input data value in synchronization with the first clock domain and to provide an output data value in synchronization with the second clock domain and in response to a current synchronization pulse. The synchronization pulse generator is clocked with the clock of the second clock domain and configured to generate the subsequent synchronization pulse such that the subsequent synchronization pulse is located at the temporal position described by the synchronization pulse cycle duration information. The fill level information provider is configured to provide a fill level information describing a fill level of the first-in-first-out storage. The feedback path is configured for feeding back the fill level information to the calculator that is further configured to adjust the synchronization pulse cycle duration information based on the fill level information.
摘要翻译：本发明的实施例提供了一种用于在第一时钟域和第二时钟域之间同步数据切换的装置。该装置包括计算器，先进先出存储器，同步脉冲发生器，填充级信息提供器和反馈路径。计算器用第一时钟域的时钟计时，并且被配置为提供描述在第二时钟域的时钟处的同步脉冲的时间位置的同步脉冲周期持续时间信息。先入先出存储被配置为与第一时钟域同步地接收输入数据值，并且响应于当前同步脉冲提供与第二时钟域同步的输出数据值。同步脉冲发生器用第二时钟域的时钟计时，并被配置为产生后续的同步脉冲，使得随后的同步脉冲位于由同步脉冲周期持续时间信息描述的时间位置。填充级别信息提供者被配置为提供描述先进先出存储器的填充级别的填充级别信息。反馈路径被配置为将填充水平信息反馈到计算器，该计算器还被配置为基于填充水平信息来调整同步脉冲周期持续时间信息。

25. 发明授权

US08243555B2 Apparatus and system with a time delay path and method for propagating a timing event 有权
标题翻译：具有时间延迟路径的装置和系统以及用于传播定时事件的方法
公开(公告)号：US08243555B2
公开(公告)日：2012-08-14
申请号：US12187404
申请日：2008-08-07
申请人： Stephan Henzler , Siegmar Koeppe
发明人： Stephan Henzler , Siegmar Koeppe
IPC分类号： G04F8/00 , G04F10/00 , H03L7/00 , H03H11/26
CPC分类号： G04F10/00 , G04F10/005 , H03K5/133 , H03K2005/00123 , H03K2005/0013 , H03K2005/00143
摘要： Implementations are presented herein that include a time delay path.
摘要翻译：这里给出了包括时间延迟路径的实现。

26. 发明授权

US08228763B2 Method and device for measuring time intervals 有权
标题翻译：测量时间间隔的方法和装置
公开(公告)号：US08228763B2
公开(公告)日：2012-07-24
申请号：US12101814
申请日：2008-04-11
申请人： Stephan Henzler
发明人： Stephan Henzler
IPC分类号： G04F8/00 , H03H11/26
CPC分类号： G04F10/04
摘要： A device is disclosed for measuring a plurality of time intervals.
摘要翻译：公开了一种用于测量多个时间间隔的装置。

27. 发明授权

US08228219B2 Time-to-digital converter with calibration 有权
标题翻译：带校准的时间 - 数字转换器
公开(公告)号：US08228219B2
公开(公告)日：2012-07-24
申请号：US12816158
申请日：2010-06-15
申请人： Stephan Henzler , Thomas Mayer , Christian Wicpalek
发明人： Stephan Henzler , Thomas Mayer , Christian Wicpalek
IPC分类号： H03M1/10
CPC分类号： G04F10/005 , H03M1/50
摘要： Time-to-digital converter arrangements and corresponding methods as well as applications thereof are described. The time-to-digital converter in a first mode is coupled with a calibration signal generator and in a second mode is coupled with signal input.
摘要翻译：描述了时间 - 数字转换器布置及相应的方法及其应用。第一模式的时间 - 数字转换器与校准信号发生器耦合，并且在第二模式中与信号输入耦合。

28. 发明申请

US20110187433A1 On-Chip Self Calibrating Delay Monitoring Circuitry 有权
标题翻译：片上自校准延时监控电路
公开(公告)号：US20110187433A1
公开(公告)日：2011-08-04
申请号：US12696731
申请日：2010-01-29
申请人： Thomas Baumann , Christian Pacha , Stephan Henzler , Peter Huber
发明人： Thomas Baumann , Christian Pacha , Stephan Henzler , Peter Huber
IPC分类号： H03H11/26
CPC分类号： H03L7/0814 , H03K5/135 , H03K2005/00058
摘要： The present disclosure relates to on-chip self calibrating delay monitoring circuitry.
摘要翻译：本公开涉及片上自校准延迟监测电路。

29. 发明申请

US20100223520A1 Error Detection in an Integrated Circuit 有权
标题翻译：集成电路中的错误检测
公开(公告)号：US20100223520A1
公开(公告)日：2010-09-02
申请号：US12395490
申请日：2009-02-27
申请人： Stephan Henzler , Martin Wirnshofer , Dominik Lorenz
发明人： Stephan Henzler , Martin Wirnshofer , Dominik Lorenz
IPC分类号： G01R31/3177 , G06F11/25
CPC分类号： G01R31/3016
摘要： An electronic device includes an integrated circuit operating on the basis of an operating clock signal, an error detection circuit and a control circuit coupled to the error detection circuit. The control circuit is configured to increase the frequency of the operating clock signal starting from a nominal operating frequency of the integrated circuit, to evaluate a frequency increment at which an error is detected by the error detection circuit, and to reset the frequency of the operating clock signal to said nominal frequency.
摘要翻译：电子设备包括基于操作时钟信号操作的集成电路，错误检测电路和耦合到错误检测电路的控制电路。控制电路被配置为增加从集成电路的标称工作频率开始的工作时钟信号的频率，以评估错误检测电路检测到错误的频率增量，并且重置操作频率时钟信号到所述标称频率。

30. 发明授权

US07564284B2 Time delay circuit and time to digital converter 有权
标题翻译：时间延迟电路和数字转换器的时间
公开(公告)号：US07564284B2
公开(公告)日：2009-07-21
申请号：US11728442
申请日：2007-03-26
申请人： Stephan Henzler , Siegmar Köppe , Dominik Lorenz
发明人： Stephan Henzler , Siegmar Köppe , Dominik Lorenz
IPC分类号： H03H11/26
CPC分类号： H03K5/13 , G04F10/06 , H03K5/135 , H03L7/085 , H03M1/205
摘要： A time delay circuit is disclosed and includes a delay line with a first delay circuit and at least a second delay circuit connected downstream. An interpolation circuit is used to generate intermediate signals derived by delayed successive signals in the delay line.
摘要翻译：公开了一种延时电路，并且包括具有第一延迟电路和至少连接在下游的第二延迟电路的延迟线。内插电路用于产生由延迟线中延迟的连续信号导出的中间信号。

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