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21. 发明授权

US06530412B1 Surface mount technology with masked cure 失效
标题翻译：表面贴装技术，带有掩膜固化
公开(公告)号：US06530412B1
公开(公告)日：2003-03-11
申请号：US09599300
申请日：2000-06-21
申请人： John E. Cronin , Joseph D. Poole , Michael C. Weller
发明人： John E. Cronin , Joseph D. Poole , Michael C. Weller
IPC分类号： B32B3128
CPC分类号： H05K3/321 , C09J5/00 , H05K2201/10689 , H05K2203/0557 , H05K2203/1476 , H05K2203/162 , H05K2203/176 , Y10T29/4913 , Y10T29/49147
摘要： A method for temporarily attaching an electrical component to a pad, testing the component, removing and replacing the component if necessary, and making a final attachment of the component to the pad. The method provides for attachment and removal of components, to and from pads located on the substrate of a printed circuit board, wherein the method enables components to be easily removed prior to final assembly without damaging the circuit board or components mounted thereon. The method utilizes a layer of conductive, radiation-curable adhesive placed between the component's lead and the pad. Radiation is then directed through a mask onto a portion of the adhesive layer, which cures the portion while leaving a remaining area of the adhesive layer uncured. Because the portion of the adhesive layer that receives the radiation, and is consequently cured by the radiation, is only a limited portion of the whole adhesive layer, the component may be easily removed from the pad by applying a small mechanical force. Following such removal, the component or a replacement thereof may be attached to the remaining area. The final stage of the method cures the remaining area of uncured adhesive by exposing the remaining area to radiation.
摘要翻译：一种用于将电气部件临时附接到焊盘，测试部件，如果需要移除和更换部件的方法，以及将部件最终附接到焊盘。该方法提供了附接和去除位于印刷电路板的基板上的焊盘的部件，其中该方法使得能够在最终组装之前容易地移除部件，而不会损坏安装在其上的电路板或部件。该方法利用放置在部件的引线和焊盘之间的导电的可辐射固化的粘合剂层。然后将辐射通过掩模引导到粘合剂层的一部分上，其固化该部分，同时留下未固化的粘合剂层的剩余区域。由于接收辐射并因此被辐射固化的粘合剂层的部分仅仅是整个粘合剂层的有限部分，所以通过施加小的机械力可以容易地将该部件从焊盘移除。在这种移除之后，组件或其替换可以附接到剩余区域。该方法的最后阶段通过将剩余区域暴露于辐射来固化未固化的粘合剂的剩余面积。

22. 发明授权

US06279815B1 Stacked chip process carrier 失效
标题翻译：堆叠芯片加工载体
公开(公告)号：US06279815B1
公开(公告)日：2001-08-28
申请号：US09621561
申请日：2000-07-21
申请人： George C. Correia , John E. Cronin , Edmund J. Sprogis
发明人： George C. Correia , John E. Cronin , Edmund J. Sprogis
IPC分类号： B23K3102
CPC分类号： H01L21/6835 , B23K37/0408 , B23K2101/40 , H01L25/50 , H01L2221/68313 , H01L2224/05568 , H01L2224/05573 , H01L2224/056 , H01L2224/16 , H01L2924/30105 , Y10T29/53978 , H01L2924/00014
摘要： The present invention provides an apparatus and methods for holding a first semiconductor device in proper alignment to a second semiconductor device, whose size is different from the first device, while performing a C4 bond between the two devices. The apparatus for holding the two devices in proper alignment consists of a holding fixture, which includes upper and lower pocket receptacles for receiving the semiconductor devices. The semiconductor devices are placed into the respective upper and lower slots aligned to two or more edges of the holding fixture.
摘要翻译：本发明提供一种用于在与两个装置之间执行C4键的同时保持第一半导体器件与第一半导体器件的尺寸不同的第二半导体器件的正确对准的装置和方法。用于将两个装置保持正确对准的装置包括保持夹具，其包括用于接收半导体装置的上部和下部口袋容器。将半导体器件放置在与保持夹具的两个或更多个边缘对准的相应的上部和下部狭缝中。

23. 发明授权

US06040213A Polysilicon mini spacer for trench buried strap formation 失效
标题翻译：多晶硅迷你间隔件，用于沟槽埋层形成
公开(公告)号：US06040213A
公开(公告)日：2000-03-21
申请号：US8873
申请日：1998-01-20
申请人： Anthony J. Canale , John E. Cronin
发明人： Anthony J. Canale , John E. Cronin
IPC分类号： H01L27/108 , H01L21/8242
CPC分类号： H01L27/10861
摘要： A method for forming a semiconductor trench capacitor cell having a buried strap uses a substrate having a trench with a conductor separated from walls of the trench by a dielectric material. A portion of the dielectric material to a level below a top surface of the conductor is removed and at least a portion of the space thus formed is filled with a diffusible material. The buried strap is formed by annealing the conductor, the wall and the diffusible material so that conductive elements from the wall and the conductor diffuse into the diffusible material.
摘要翻译：用于形成具有掩埋带的半导体沟槽电容器单元的方法使用具有沟槽的衬底，该衬底具有通过介电材料与沟槽的壁分隔开的导体。将电介质材料的一部分去除导体顶表面以下的水平，并且由此形成的空间的至少一部分用可扩散材料填充。通过对导体，壁和可扩散材料进行退火而形成掩埋带，使得来自壁和导体的导电元件扩散到可扩散材料中。

24. 发明授权

US5926738A Interconnects using metal spacers and method for forming same 失效
标题翻译：使用金属间隔物的互连和其形成方法
公开(公告)号：US5926738A
公开(公告)日：1999-07-20
申请号：US104074
申请日：1998-06-24
申请人： John E. Cronin , Thomas J. Hartswick , Anthony K. Stamper
发明人： John E. Cronin , Thomas J. Hartswick , Anthony K. Stamper
IPC分类号： H01L21/768 , H01L23/522 , H01L23/532 , H01L23/48
CPC分类号： H01L21/76838 , H01L21/76886 , H01L23/5226 , H01L23/53223 , H01L2924/0002 , Y10S257/903
摘要： The preferred embodiment of the present invention provides increased conductivity between interlevel interconnection lines. The preferred embodiment uses sidewall spacers on the sides of the interconnection lines to increase the contact area between interconnection lines and interconnect studs. This increase in area improves connection resistance and allows further device scaling without unacceptable decreases in the conductivity of the connection, and without adding significant expense in the fabrication process.
摘要翻译：本发明的优选实施例提供了层间互连线之间增加的电导率。优选实施例在互连线的侧面上使用侧壁间隔件以增加互连线和互连柱之间的接触面积。面积的这种增加提高了连接电阻，并且允许进一步的器件定标，而不会导致连接的电导率的不可接受的降低，并且在制造过程中不增加显着的费用。

25. 发明授权

US5913713A CMP polishing pad backside modifications for advantageous polishing results 失效
标题翻译： CMP抛光垫背面修改，有利于抛光结果
公开(公告)号：US5913713A
公开(公告)日：1999-06-22
申请号：US904288
申请日：1997-07-31
申请人： Roger W. Cheek , John E. Cronin , Douglas P. Nadeau , Matthew J. Rutten , Terrance M. Wright
发明人： Roger W. Cheek , John E. Cronin , Douglas P. Nadeau , Matthew J. Rutten , Terrance M. Wright
IPC分类号： B24B37/26 , B24D13/12 , B24D13/14 , B24B1/00
CPC分类号： B24B37/26
摘要： A polishing pad and method of polishing with a chemical mechanical planarization apparatus includes providing a bulk polishing pad material having a front polishing surface side and a back side. The polishing pad further includes a polishing pad wear indicator for indicating a polishing pad wear during a life cycle of the polishing pad. The polishing pad wear indicator is formed on the back side of the bulk polishing pad material.
摘要翻译：抛光垫和用化学机械平面化装置抛光的方法包括提供具有前抛光表面侧和背面的主抛光垫材料。抛光垫还包括用于在抛光垫的寿命周期内指示抛光垫磨损的抛光垫磨损指示器。抛光垫磨损指示器形成在大量抛光垫材料的背面上。

26. 发明授权

US5903059A Microconnectors 失效
标题翻译：微型连接器
公开(公告)号：US5903059A
公开(公告)日：1999-05-11
申请号：US560257
申请日：1995-11-21
申请人： Claude Louis Bertin , John E. Cronin
发明人： Claude Louis Bertin , John E. Cronin
IPC分类号： H01L21/48 , H01L23/485 , H01L23/498 , H01L23/48 , H01L23/02 , H01L23/52
CPC分类号： H01L25/0657 , H01L21/4853 , H01L23/49811 , H01L23/544 , H01L24/11 , H01L24/12 , H01L24/16 , H01L2223/5442 , H01L2223/54473 , H01L2224/114 , H01L2224/116 , H01L2224/13099 , H01L2224/81136 , H01L2224/81193 , H01L2224/81899 , H01L2224/83141 , H01L2225/06513 , H01L2225/06551 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/10253
摘要： Microconnectors are described that can be fabricated on circuitry, the microconnectors for physically and/or electrically connecting separate structures. The microconnectors permit partitioning of a function among a plurality of chips. The microconnectors include a latching member.
摘要翻译：描述了可以在电路上制造的微型连接器，用于物理和/或电连接分离结构的微型连接器。微型连接器允许在多个芯片之间划分功能。微型连接器包括闩锁构件。

27. 发明授权

US5808364A Interconnects using metal spacers 失效
标题翻译：互连使用金属垫片
公开(公告)号：US5808364A
公开(公告)日：1998-09-15
申请号：US838371
申请日：1997-04-08
申请人： John E. Cronin , Thomas J. Hartswick , Anthony K. Stamper
发明人： John E. Cronin , Thomas J. Hartswick , Anthony K. Stamper
IPC分类号： H01L21/768 , H01L23/522 , H01L23/532 , H01L23/48 , H01L23/52 , H01L27/01 , H01L29/40
CPC分类号： H01L21/76838 , H01L21/76886 , H01L23/5226 , H01L23/53223 , H01L2924/0002 , Y10S257/903
摘要： The preferred embodiment of the present invention provides increased conductivity between interlevel interconnection lines. The preferred embodiment uses sidewall spacers on the sides of the interconnection lines to increase the contact area between interconnection lines and interconnect studs. This increase in area improves connection resistance and allows further device scaling without unacceptable decreases in the conductivity of the connection, and without adding significant expense in the fabrication process.
摘要翻译：本发明的优选实施例提供了层间互连线之间增加的电导率。优选实施例在互连线的侧面上使用侧壁间隔件以增加互连线和互连柱之间的接触面积。面积的这种增加提高了连接电阻，并且允许进一步的器件缩放，而不会导致连接的导电性的不可接受的降低，并且不会在制造过程中增加显着的费用。

28. 发明授权

US5539230A Chimney capacitor 失效
标题翻译：烟囱电容
公开(公告)号：US5539230A
公开(公告)日：1996-07-23
申请号：US405164
申请日：1995-03-16
申请人： John E. Cronin
发明人： John E. Cronin
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10852 , H01L27/10817
摘要： A chimney capacitor is formed having two plates, of which each is disposed above and contacts a corresponding electrical contact. The electrical contacts facilitate electrical access to the plates of the chimney capacitor. One of the electrical contacts may comprise part of a general wiring layer that may be used for both electrically accessing the capacitor and for general wiring within the IC chip. Formation of the chimney capacitor proceeds by first forming two electrical contacts on an integrated circuit ("IC") chip. A planar insulating layer is formed thereover, and the capacitor is formed at least partially within the planar insulating layer such that each plate is electrically connected to a corresponding electrical contact.
摘要翻译：形成具有两个板的烟囱电容器，每个板设置在相应的电触头上方并与之相接触。电触点便于电连接到烟囱电容器的板。电触点中的一个可以包括可以用于电接入电容器和IC芯片内的一般布线的一般布线层的一部分。烟囱电容器的形成首先在集成电路（“IC”）芯片上形成两个电触头。在其上形成平面绝缘层，并且电容器至少部分地形成在平面绝缘层内，使得每个板电连接到相应的电接触。

29. 发明授权

US5530262A Bidirectional field emission devices, storage structures and fabrication methods 失效
标题翻译：双向场发射装置，存储结构和制造方法
公开(公告)号：US5530262A
公开(公告)日：1996-06-25
申请号：US541763
申请日：1995-05-25
申请人： John E. Cronin , Kent E. Morrett , Michael D. Potter , Matthew J. Rutten
发明人： John E. Cronin , Kent E. Morrett , Michael D. Potter , Matthew J. Rutten
IPC分类号： H01J9/02 , H01L21/8242 , H01L27/108 , H01L29/06
CPC分类号： H01L27/10852 , H01J9/025 , H01L27/108 , H01J2201/319
摘要： Bidirectional field emission devices (FEDs) and associated fabrication methods are described. A basic device includes a first unitary field emission structure and an adjacently positioned, second unitary field emission structure. The first unitary structure has a first cathode portion and a first anode portion, while the second unitary structure has a second cathode portion and a second anode portion. The structures are positioned such that the first cathode portion opposes the second anode portion so that electrons may flow by field emission thereto and the second cathode portion opposes the first anode portion, again so that electrons may flow by field emission thereto. A control mechanism defines whether the device is active, while biasing voltages applied to the first and second unitary structures define the direction of current flow. Multiple applications exist for such a bidirectional FED. For example, an FED DRAM cell is discussed, as are methods for fabricating the various devices.
摘要翻译：描述了双向场致发射器件（FED）和相关的制造方法。基本装置包括第一单一场发射结构和相邻定位的第二单一场致发射结构。第一单一结构具有第一阴极部分和第一阳极部分，而第二整体结构具有第二阴极部分和第二阳极部分。结构被定位成使得第一阴极部分与第二阳极部分相对，使得电子可以通过场发射流动，并且第二阴极部分与第一阳极部分相反，使得电子可以通过场发射而流动。控制机构定义设备是否有效，而施加到第一和第二单一结构的偏置电压限定电流的方向。存在这种双向FED的多种应用。例如，讨论了FED DRAM单元，以及用于制造各种器件的方法。

30. 发明授权

US5466636A Method of forming borderless contacts using a removable mandrel 失效
标题翻译：使用可移动心轴形成无边界触点的方法
公开(公告)号：US5466636A
公开(公告)日：1995-11-14
申请号：US946993
申请日：1992-09-17
申请人： John E. Cronin , Carter W. Kaanta , Donald M. Kenney , Michael L. Kerbaugh , Howard S. Landis , Brian J. Machesney , Paul Parries , Rosemary A. Previti-Kelly , John F. Rembetski
发明人： John E. Cronin , Carter W. Kaanta , Donald M. Kenney , Michael L. Kerbaugh , Howard S. Landis , Brian J. Machesney , Paul Parries , Rosemary A. Previti-Kelly , John F. Rembetski
IPC分类号： H01L21/28 , H01L21/60 , H01L21/768 , H01L21/8242 , H01L29/417 , H01L21/44
CPC分类号： H01L27/10861 , H01L21/76838 , H01L21/76897 , H01L29/41766 , Y10S438/943
摘要： A semiconductor fabrication process for forming borderless contacts (130, 170, 172) using a removable mandrel (110). The process involves depositing a mandrel on an underlying barrier layer (100) designed to protect underlying structures (40) formed on a substrate (24). The mandrel is made from a material that will etch at a faster rate than the barrier layer so as to permit the formation of openings in the mandrel to be stopped on the barrier layer without penetrating such layer. After depositing a contact (130) in a first opening (120) formed in the mandrel, a second opening (140) is formed and a second contact (170) is deposited therein. Thereafter, the mandrel is removed and replaced with a layer of solid dielectric material (180).
摘要翻译：一种用于使用可移除心轴（110）形成无边界触点（130,170,172）的半导体制造工艺。该方法包括将心轴沉积在设计成保护形成在基底（24）上的下面的结构（40）的下面的阻挡层（100）上。心轴由将以比阻挡层更快的速度蚀刻的材料制成，以允许心轴中的开口形成停止在阻挡层上而不穿透该层。在将形成在心轴中的第一开口（120）中的接触（130）沉积之后，形成第二开口（140），并且在其中沉积第二接触（170）。此后，移去心轴并用一层固体电介质材料（180）代替。

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