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    • 22. 发明申请
    • On-chip voltage regulator using feedback on process/product parameters
    • 片上电压调节器,使用过程/产品参数反馈
    • US20070085558A1
    • 2007-04-19
    • US11638846
    • 2006-12-13
    • Irfan RahimPeter McElhenyJohn Costello
    • Irfan RahimPeter McElhenyJohn Costello
    • G01R31/26
    • G11C5/147H03K19/177
    • The present invention optimizes the performance of integrated circuits by adjusting the circuit operating voltage using feedback on process/product parameters. To determine a desired value for the operating voltage of an integrated circuit, a preferred embodiment provides for on-wafer probing of one or more reference circuit structures to measure at least one electrical or operational parameter of the one or more reference circuit structures; determining an adjusted value for the operating voltage based on the measured parameter; and establishing the adjusted value as the desired value for the operating voltage. The reference circuit structures may comprise process control monitor structures or structures in other integrated circuits fabricated in the same production run. In an alternative embodiment, the one or more parameters are directly measured from the integrated circuit whose operating voltage is being adjusted
    • 本发明通过使用对过程/产品参数的反馈来调节电路工作电压来优化集成电路的性能。 为了确定集成电路的工作电压的期望值,优选实施例提供一个或多个参考电路结构的片上探测,以测量一个或多个参考电路结构的至少一个电或操作参数; 基于所测量的参数确定所述工作电压的调整值; 并将调整后的值建立为工作电压的期望值。 参考电路结构可以包括在相同生产运行中制造的其它集成电路中的过程控制监视器结构或结构。 在替代实施例中,一个或多个参数是直接从其工作电压正被调整的集成电路测量的
    • 30. 发明授权
    • High voltage tolerance emulation using voltage clamp for oxide stress protection
    • 使用电压钳的高电压容差仿真用于氧化物应力保护
    • US07733159B1
    • 2010-06-08
    • US10804712
    • 2004-03-18
    • Rafael CamarotaJohn CostelloMyron Wong
    • Rafael CamarotaJohn CostelloMyron Wong
    • H03K3/10
    • H03K19/00315H03K17/08122H03K2217/0018
    • Circuits, methods, and apparatus for limiting voltages received by devices in input/output cells to less than the device's breakdown voltage. An exemplary embodiment of the present invention provides an input/output cell having one or more clamp diodes and resistors configured to limit voltages seen by the gates of the devices in the input/output cell. In one embodiment, the clamp diodes are on-chip, while the resistors are off-chip. In a specific embodiment, the clamp diode is connected between an input pad for the input output cell and a supply voltage VCC, while a resistor is off-chip and in series with the input pad. In another specific embodiment, a series of clamp diodes are coupled between ground and an input pad, while a resistor is off-chip and in series with the input pad. In another embodiment, the clamp diode or diodes may be programmably or selectively disconnected. These clamp diodes may be disabled to protect against latch-up. Integrated circuits that are consistent with the present invention may include one or more of these and the other features described.
    • 用于将输入/输出单元中的器件接收的电压限制为小于器件的击穿电压的电路,方法和装置。 本发明的一个示例性实施例提供一种输入/输出单元,其具有一个或多个钳位二极管和电阻器,其被配置为限制由输入/输出单元中的器件的栅极所看到的电压。 在一个实施例中,钳位二极管是芯片上的,而电阻器是片外的。 在具体实施例中,钳位二极管连接在用于输入输出单元的输入焊盘和电源电压VCC之间,而电阻器是片外并与输入焊盘串联的。 在另一个具体实施例中,一系列钳位二极管耦合在接地和输入焊盘之间,而电阻器是片外且与输入焊盘串联的。 在另一个实施例中,钳位二极管或二极管可以可编程地或选择性地断开。 这些钳位二极管可能被禁用以防止闭锁。 与本发明一致的集成电路可以包括所描述的这些和其他特征中的一个或多个。