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21. 发明授权

US08330916B2 Liquid crystal display and method of fabricating the same to have TFT's with pixel electrodes integrally extending from one of the source/drain electrodes 有权
标题翻译：液晶显示器及其制造方法具有TFT，其中像素电极从源/漏电极之一整体延伸
公开(公告)号：US08330916B2
公开(公告)日：2012-12-11
申请号：US12344075
申请日：2008-12-24
申请人： Je-Hun Lee , Do-Hyun Kim , Tae-Sang Kim , Kyung-Seok Son , Chang-Oh Jeong
发明人： Je-Hun Lee , Do-Hyun Kim , Tae-Sang Kim , Kyung-Seok Son , Chang-Oh Jeong
IPC分类号： G02F1/1343
CPC分类号： H01L33/0095 , G02F1/133512 , G02F1/133516 , G02F1/136209 , G02F1/1368 , G02F2001/133397 , G02F2001/136222 , G02F2001/136231 , G02F2001/13685 , H01L27/124 , H01L27/1288 , H01L29/458
摘要： A liquid crystal display (LCD) includes thin film transistors (TFTs) each having spaced apart source/drain electrodes and an oxide-type semiconductive film disposed over and between the source/drain electrodes to define an active layer. Each of the source/drain electrodes includes a portion of a subdivided transparent conductive layer where one subdivision of the transparent conductive layer continues from within its one of the source/drain electrodes to define an optically exposed pixel-electrode that is reliably connected integrally to the one source/drain electrode. Mass production costs can be reduced and production reliability increased because a fewer number of photolithographic masks can be used to form the TFTs.
摘要翻译：液晶显示器（LCD）包括薄膜晶体管（TFT），每个薄膜晶体管具有间隔开的源/漏电极和设置在源/漏电极之间和之间的氧化物型半导体膜，以限定有源层。源/漏电极中的每一个包括细分透明导电层的一部分，其中透明导电层的一个细分从其源极/漏极之一内延伸，以限定光学曝光的像素电极，其可靠地与一个源/漏电极。由于可以使用较少数量的光刻掩模来形成TFT，所以可以降低批量生产成本并提高生产可靠性。

22. 发明授权

US08077268B2 Thin film transistor substrate and method of manufacturing the same 有权
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US08077268B2
公开(公告)日：2011-12-13
申请号：US12140655
申请日：2008-06-17
申请人： Eun-Guk Lee , Chang-Oh Jeong , Je-Hun Lee , Do-Hyun Kim , Soon-Kwon Lim
发明人： Eun-Guk Lee , Chang-Oh Jeong , Je-Hun Lee , Do-Hyun Kim , Soon-Kwon Lim
IPC分类号： G02F1/13
CPC分类号： H01L27/1225 , H01L29/7869
摘要： A thin film transistor array substrate comprising a base substrate, a first wire on the base substrate, a first insulating layer on the base substrate to cover the first wire, a semiconductor layer on the first insulating layer, a second insulating layer on the first insulating layer on which the semiconductor layer is formed, and a second wire on the second insulating layer on the second insulating layer is provided, and a portion of the second wire makes contact with the semiconductor layer through the contact hole.
摘要翻译：一种薄膜晶体管阵列基板，包括基底基板，在基底基板上的第一布线，在基底基板上覆盖第一布线的第一绝缘层，第一绝缘层上的半导体层，第一绝缘层上的第二绝缘层设置有半导体层的层，第二绝缘层上的第二绝缘层上的第二布线，第二布线的一部分通过接触孔与半导体层接触。

23. 发明授权

US07863607B2 Thin film transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US07863607B2
公开(公告)日：2011-01-04
申请号：US11980871
申请日：2007-10-30
申请人： Je-Hun Lee , Do-Hyun Kim , Chang-Oh Jeong
发明人： Je-Hun Lee , Do-Hyun Kim , Chang-Oh Jeong
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L27/1225
摘要： The disclosed thin film transistor array panel includes an insulating substrate, a channel layer including an oxide formed on the insulating substrate. A gate insulating is layer formed on the channel layer and a gate electrode is formed on the gate insulating layer. An interlayer insulating layer is formed on the gate electrode and a data line formed on the interlayer insulating layer and includes a source electrode, wherein the data line is made of a first conductive layer and a second conductive layer. A drain electrode formed on the interlayer insulating layer, and includes the first conductive layer and the second conductive layer. A pixel electrode extends from the first conductive layer of the drain electrode and a passivation layer formed on the data line and the drain electrode. A spacer formed on the passivation layer.
摘要翻译：所公开的薄膜晶体管阵列面板包括绝缘基板，包括形成在绝缘基板上的氧化物的沟道层。栅极绝缘层是在沟道层上形成的层，栅电极形成在栅极绝缘层上。在栅电极上形成层间绝缘层，形成在层间绝缘层上的数据线，包括源电极，其中数据线由第一导电层和第二导电层构成。一种形成在层间绝缘层上的漏极，包括第一导电层和第二导电层。像素电极从漏电极的第一导电层和形成在数据线和漏电极上的钝化层延伸。形成在钝化层上的间隔物。

24. 发明申请

US20090184315A1 THIN FILM TRANSISTOR ARRAY SUBSTRATE HAVING IMPROVED ELECTRICAL CHARACTERISTICS AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：具有改进的电气特性的薄膜晶体管阵列基板及其制造方法
公开(公告)号：US20090184315A1
公开(公告)日：2009-07-23
申请号：US12355646
申请日：2009-01-16
申请人： Je-Hun Lee , Kap-Soo Yoon , Kyung-Seok Son , Do-Hyun Kim , Chang-Oh Jeong
发明人： Je-Hun Lee , Kap-Soo Yoon , Kyung-Seok Son , Do-Hyun Kim , Chang-Oh Jeong
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/1296 , H01L29/4908
摘要： A thin film transistor array substrate, which can have high mobility of charge and can achieve uniform electrical characteristics for wide display devices, and a method of manufacturing the thin film transistor array substrate, are provided. The thin film transistor array substrate includes an oxide semiconductor layer having a channel and formed on an insulating substrate, a gate electrode overlapping the oxide semiconductor layer, a gate insulating film disposed between the oxide semiconductor layer and the gate electrode, and a passivation film formed on the oxide semiconductor layer and the gate electrode. At least one of the gate insulating film and the passivation film contains fluorine-containing silicon.
摘要翻译：提供了可以具有高电荷迁移率并且可以实现宽显示装置的均匀电特性的薄膜晶体管阵列基板，以及制造薄膜晶体管阵列基板的方法。薄膜晶体管阵列基板包括具有通道并形成在绝缘基板上的氧化物半导体层，与氧化物半导体层重叠的栅极电极，设置在氧化物半导体层和栅电极之间的栅极绝缘膜，以及形成的钝化膜在氧化物半导体层和栅电极上。栅极绝缘膜和钝化膜中的至少一个含有含氟硅。

25. 发明申请

US20080142797A1 Thin film transistor, thin film transistor substate, and method of manufacturing the same 有权
标题翻译：薄膜晶体管，薄膜晶体管子状态及其制造方法
公开(公告)号：US20080142797A1
公开(公告)日：2008-06-19
申请号：US12001031
申请日：2007-12-06
申请人： Eun-Guk Lee , Do-Hyun Kim , Chang-Oh Jeong , Je-Hun Lee , Soon-Kwon Lim
发明人： Eun-Guk Lee , Do-Hyun Kim , Chang-Oh Jeong , Je-Hun Lee , Soon-Kwon Lim
IPC分类号： H01L29/22 , H01L21/84
CPC分类号： H01L27/124 , H01L27/1214 , H01L27/1225 , H01L27/1288 , H01L29/45 , H01L29/7869
摘要： A thin film transistor substrate and a method of manufacturing the same are disclosed. The method of manufacturing a thin film transistor substrate includes forming a first conductive pattern group including a gate line, a gate electrode, and a lower gate pad electrode on a substrate, forming a gate insulating layer on the substrate on which the first conductive pattern group is formed, forming an oxide semiconductor pattern overlapping the gate electrode on the gate insulating layer, and forming first and second conductive layers on the substrate on which the oxide semiconductor pattern is formed and patterning the first and second conductive layers to form a second conductive pattern group including a data line, a source electrode, a drain electrode, and a data pad.
摘要翻译：公开了一种薄膜晶体管基板及其制造方法。制造薄膜晶体管基板的方法包括在基板上形成包括栅极线，栅电极和下栅极焊盘电极的第一导电图案组，在基板上形成栅极绝缘层，第一导电图案组形成，在所述栅极绝缘层上形成与所述栅电极重叠的氧化物半导体图案，以及在其上形成有所述氧化物半导体图案的所述基板上形成第一和第二导电层，并且对所述第一导电层和所述第二导电层进行构图以形成第二导电图案包括数据线，源电极，漏电极和数据焊盘。

26. 发明授权

US07956947B2 Thin film transistor array substrate having improved electrical characteristics and method of manufacturing the same 有权
标题翻译：具有改进的电气特性的薄膜晶体管阵列基板及其制造方法
公开(公告)号：US07956947B2
公开(公告)日：2011-06-07
申请号：US12355646
申请日：2009-01-16
申请人： Je-Hun Lee , Kap-Soo Yoon , Kyung-Seok Son , Do-Hyun Kim , Chang-Oh Jeong
发明人： Je-Hun Lee , Kap-Soo Yoon , Kyung-Seok Son , Do-Hyun Kim , Chang-Oh Jeong
IPC分类号： G02F1/136 , G02F1/13 , H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/1296 , H01L29/4908
摘要： A thin film transistor array substrate, which can have high mobility of charge and can achieve uniform electrical characteristics for wide display devices, and a method of manufacturing the thin film transistor array substrate, are provided. The thin film transistor array substrate includes an oxide semiconductor layer having a channel and formed on an insulating substrate, a gate electrode overlapping the oxide semiconductor layer, a gate insulating film disposed between the oxide semiconductor layer and the gate electrode, and a passivation film formed on the oxide semiconductor layer and the gate electrode. At least one of the gate insulating film and the passivation film contains fluorine-containing silicon.
摘要翻译：提供了可以具有高电荷迁移率并且可以实现宽显示装置的均匀电特性的薄膜晶体管阵列基板，以及制造薄膜晶体管阵列基板的方法。薄膜晶体管阵列基板包括具有通道并形成在绝缘基板上的氧化物半导体层，与氧化物半导体层重叠的栅极电极，设置在氧化物半导体层和栅电极之间的栅极绝缘膜，以及形成的钝化膜在氧化物半导体层和栅电极上。栅极绝缘膜和钝化膜中的至少一个含有含氟硅。

27. 发明授权

US07511300B2 Array substrate, display device having the same and method of manufacturing the same 失效
标题翻译：阵列基板，具有相同的显示装置及其制造方法
公开(公告)号：US07511300B2
公开(公告)日：2009-03-31
申请号：US11779534
申请日：2007-07-18
申请人： Je-Hun Lee , Do-Hyun Kim , Eun-Guk Lee , Chang-Oh Jeong
发明人： Je-Hun Lee , Do-Hyun Kim , Eun-Guk Lee , Chang-Oh Jeong
IPC分类号： H01L33/00
CPC分类号： G02F1/136286 , G02F2001/13629 , G02F2001/136295 , H01L27/124
摘要： An array substrate includes a switching element, a signal transmission line, a passivation layer and a pixel electrode. The switching element is disposed on an insulating substrate. The signal transmission line is connected to the switching element and includes a barrier layer, a conductive line, and a copper nitride layer. The barrier layer is disposed on the insulating substrate. The conductive line is disposed on the barrier layer and includes copper or copper alloy. The copper nitride layer covers the conductive line. The passivation layer covers the switching element and the signal transmission line and has a contact hole through which a drain electrode of the switching element is partially exposed. The pixel electrode is disposed on the insulating substrate, and is connected to the drain electrode of the switching element through the contact hole.
摘要翻译：阵列基板包括开关元件，信号传输线，钝化层和像素电极。开关元件设置在绝缘基板上。信号传输线连接到开关元件，并且包括阻挡层，导电线和氮化铜层。阻挡层设置在绝缘基板上。导电线设置在阻挡层上并且包括铜或铜合金。氮化铜层覆盖导电线。钝化层覆盖开关元件和信号传输线，并且具有接触孔，开关元件的漏电极通过该接触孔部分露出。像素电极设置在绝缘基板上，并通过接触孔与开关元件的漏电极连接。

28. 发明申请

US20090026450A1 THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US20090026450A1
公开(公告)日：2009-01-29
申请号：US12140655
申请日：2008-06-17
申请人： Eun-Guk LEE , Chang-Oh Jeong , Je-Hun Lee , Do-Hyun Kim , Soon-Kwon Lim
发明人： Eun-Guk LEE , Chang-Oh Jeong , Je-Hun Lee , Do-Hyun Kim , Soon-Kwon Lim
IPC分类号： H01L23/48 , H01L29/04 , H01L21/4763
CPC分类号： H01L27/1225 , H01L29/7869
摘要： A thin film transistor array substrate comprising a base substrate, a first wire on the base substrate, a first insulating layer on the base substrate to cover the first wire, a semiconductor layer on the first insulating layer, a second insulating layer on the first insulating layer on which the semiconductor layer is formed, and a second wire on the second insulating layer on the second insulating layer is provided, and a portion of the second wire makes contact with the semiconductor layer through the contact hole.
摘要翻译：一种薄膜晶体管阵列基板，包括基底基板，在基底基板上的第一布线，在基底基板上覆盖第一布线的第一绝缘层，第一绝缘层上的半导体层，第一绝缘层上的第二绝缘层设置有半导体层的层，第二绝缘层上的第二绝缘层上的第二配线，第二配线的一部分通过接触孔与半导体层接触。

29. 发明申请

US20080308795A1 Thin film transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20080308795A1
公开(公告)日：2008-12-18
申请号：US11980871
申请日：2007-10-30
申请人： Je-Hun Lee , Do-Hyun Kim , Chang-Oh Jeong
发明人： Je-Hun Lee , Do-Hyun Kim , Chang-Oh Jeong
IPC分类号： H01L29/24 , H01L21/34
CPC分类号： H01L29/7869 , H01L27/1225
摘要： The disclosed thin film transistor array panel includes an insulating substrate, a channel layer including an oxide formed on the insulating substrate. A gate insulating is layer formed on the channel layer and a gate electrode is formed on the gate insulating layer. An interlayer insulating layer is formed on the gate electrode and a data line formed on the interlayer insulating layer and includes a source electrode, wherein the data line is made of a first conductive layer and a second conductive layer. A drain electrode formed on the interlayer insulating layer, and includes the first conductive layer and the second conductive layer. A pixel electrode extends from the first conductive layer of the drain electrode and a passivation layer formed on the data line and the drain electrode. A spacer formed on the passivation layer.
摘要翻译：所公开的薄膜晶体管阵列面板包括绝缘基板，包括形成在绝缘基板上的氧化物的沟道层。栅极绝缘层是在沟道层上形成的层，栅电极形成在栅极绝缘层上。在栅电极上形成层间绝缘层，形成在层间绝缘层上的数据线，包括源电极，其中数据线由第一导电层和第二导电层构成。一种形成在层间绝缘层上的漏极，包括第一导电层和第二导电层。像素电极从漏电极的第一导电层和形成在数据线和漏电极上的钝化层延伸。形成在钝化层上的间隔物。

30. 发明授权

US07919795B2 Wire structure, method for fabricating wire, thin film transistor substrate, and method for fabricating the thin film transistor substrate 有权
标题翻译：线结构，制造线的方法，薄膜晶体管基板以及制造薄膜晶体管基板的方法
公开(公告)号：US07919795B2
公开(公告)日：2011-04-05
申请号：US11961149
申请日：2007-12-20
申请人： Je-Hun Lee , Chang-Oh Jeong , Eun-Guk Lee , Do-Hyun Kim
发明人： Je-Hun Lee , Chang-Oh Jeong , Eun-Guk Lee , Do-Hyun Kim
IPC分类号： H01L29/76 , H01L29/40 , H01L29/43 , H01L29/49 , H01L33/00
CPC分类号： H01L29/458 , H01L27/124 , H01L29/4908
摘要： Provided are a wire structure, a method for fabricating a wire, a thin film transistor (TFT) substrate and a method for fabricating a TFT substrate. The wire structure includes a barrier layer formed on a substrate and including copper, copper solid solution layer.
摘要翻译：提供线结构，制造线的方法，薄膜晶体管（TFT）基板和制造TFT基板的方法。导线结构包括形成在基板上并包括铜，铜固溶体层的阻挡层。

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