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21. 发明申请

US20100243311A1 SUBSTRATE WITH METAL FILM AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：具有金属膜的基板及其制造方法
公开(公告)号：US20100243311A1
公开(公告)日：2010-09-30
申请号：US12607666
申请日：2009-10-28
申请人： Ayao NIKI , Atsushi Ishida , Ryojiro Tominaga
发明人： Ayao NIKI , Atsushi Ishida , Ryojiro Tominaga
IPC分类号： H01R12/04 , H01K3/10
CPC分类号： H05K3/4661 , H05K3/0035 , H05K3/387 , H05K3/422 , H05K3/4682 , H05K2201/0195 , H05K2201/0209 , H05K2201/0239 , H05K2201/09581 , H05K2201/09827 , H05K2203/1168
摘要： A method for manufacturing a substrate with a metal film includes preparing a first insulation layer having first and second surfaces, forming a first conductive circuit on the first surface of the first insulation layer, forming on the first surface of the first insulation layer and on the first conductive circuit a second insulation layer having first and second surfaces, forming in the second insulation layer a penetrating hole tapering from the first surface toward the first conductive circuit, forming on the inner wall of the penetrating hole, a composition containing a polymerization initiator and a polymerizable compound, providing a polymer on the inner wall of the penetrating hole by irradiating the composition, applying a plating catalyst on the polymer, and forming a plated-metal film on the inner wall of the penetrating hole. The first surface of the first insulation layer faces the second surface of the second insulation layer.
摘要翻译：一种用金属膜制造衬底的方法包括制备具有第一和第二表面的第一绝缘层，在第一绝缘层的第一表面上形成第一导电电路，在第一绝缘层的第一表面上形成第一绝缘层，第一导电电路，具有第一和第二表面的第二绝缘层，在所述第二绝缘层中形成从所述第一表面向所述第一导电电路渐缩的穿透孔，在所述穿透孔的内壁上形成含有聚合引发剂和聚合性化合物，通过照射该组合物，在该聚合物上涂布电镀催化剂，在该贯通孔的内壁上形成聚合物，在该贯通孔的内壁上形成电镀金属膜。第一绝缘层的第一表面面向第二绝缘层的第二表面。

22. 发明授权

US06826435B1 Tone data processing device and method 失效
标题翻译：音调数据处理装置及方法
公开(公告)号：US06826435B1
公开(公告)日：2004-11-30
申请号：US09306303
申请日：1999-05-06
申请人： Atsushi Ishida
发明人： Atsushi Ishida
IPC分类号： G10H106
CPC分类号： G10H7/004 , G10H2250/541
摘要： Tone generator LSI generates a subframe start signal to be interruptively given to a microprogram, by which the microprogram is activated to issue an interrupt signal to a device driver. In response to the interrupt signal, the device driver prepares control data for use in a next frame. The microprogram receives control data from a RAM at the beginning of each frame and calculates control data for individual samples of the frame on the basis of the received control data as well as control data generated for the last sample of an immediately preceding frame, so as to create a plurality of samples of tone data for each subframe. The thus-created tone data are temporarily written into a buffer and then read out from the buffer in accordance with predetermined clock pulses.
摘要翻译：音调发生器LSI产生中断给予微程序的子帧起始信号，通过该微程序，微程序被激活以向设备驱动器发出中断信号。响应于中断信号，设备驱动程序准备用于下一帧的控制数据。该微程序在每帧的开始处从RAM接收控制数据，并根据接收的控制数据以及为紧接在前的帧的最后一个样本生成的控制数据计算该帧的各个采样的控制数据，以便以创建用于每个子帧的多个音调数据样本。这样创建的音调数据被临时写入缓冲器，然后根据预定的时钟脉冲从缓冲器中读出。

23. 发明授权

US4911114A Device for switching valve operation modes in an internal combustion engine 失效
标题翻译：用于在内燃机中切换阀门操作模式的装置
公开(公告)号：US4911114A
公开(公告)日：1990-03-27
申请号：US349703
申请日：1989-05-10
申请人： Tsuneo Konno , Atsushi Ishida
发明人： Tsuneo Konno , Atsushi Ishida
IPC分类号： F01L1/18 , F01L1/26 , F01L13/00
CPC分类号： F01L1/267 , F01L2820/031
摘要： A device for switching valve operation modes in an internal combustion engine with a rotatable camshaft having cams integral therewith, valves disposed in intake or exhaust ports of the combustion chamber and normally urged closed by a spring, and the valves being openable by the cams through a plurality of rocker arms disposed adjacent to each other for imparting the cam lifts to the valves. A coupling mechanism selectively connects and disconnects the rocker arms by means of pistons in aligned guide holes in the rocker arms movable between positions to either extend across the adjacent sides of the rocker arms or be aligned with such sides. A solenoid is provided in one rocker arm and surrounds a piston to selectively cause movement of that piston. Springs urge the pistons to the position controlled by the solenoid.

24. 发明授权

US08879234B2 Laminated ceramic electronic component 有权
标题翻译：层压陶瓷电子元件
公开(公告)号：US08879234B2
公开(公告)日：2014-11-04
申请号：US13550630
申请日：2012-07-17
申请人： Masaki Tsukida , Atsushi Ishida
发明人： Masaki Tsukida , Atsushi Ishida
IPC分类号： H01G4/00 , H01G4/30 , H01G4/012 , H01C7/13 , H01G4/232 , H01C7/18 , H01C1/148 , H01L41/047 , H01F27/29 , H01F17/00
CPC分类号： H01C7/13 , H01C1/148 , H01C7/18 , H01F17/0013 , H01F27/292 , H01G4/012 , H01G4/232 , H01G4/30 , H01L41/0471
摘要： In a laminated ceramic electronic component, a first functional portion and a second functional portion are disposed within a ceramic element body so as to be adjacent to each other along a height direction, first and second internal electrodes face each other through a ceramic layer in the first functional portion, and third and fourth internal electrodes whose number of laminated layers is different from the number of laminated layers of the first and second internal electrodes face each other through the ceramic layer in the second functional portion. A marking internal conductor is disposed on the same plane as the first internal electrode and/or the second internal electrode, a marking external conductor is disposed on the side surface of the ceramic element body so as to link a plurality of exposed marking internal conductors such that it is possible to recognize vertical directionality.
摘要翻译：在层叠陶瓷电子部件中，第一功能部分和第二功能部分沿着高度方向设置在陶瓷元件主体内以彼此相邻，第一和第二内部电极通过陶瓷层中的陶瓷层彼此面对第一功能部分，以及第三和第四内部电极，其数量与第一和第二内部电极的叠层数不同，通过第二功能部分中的陶瓷层彼此面对。标记内部导体设置在与第一内部电极和/或第二内部电极相同的平面上，标记外部导体设置在陶瓷元件主体的侧表面上，以将多个暴露的标记内部导体可以识别垂直方向性。

25. 发明授权

US08729405B2 Wiring board and method for manufacturing the same 有权
标题翻译：接线板及其制造方法
公开(公告)号：US08729405B2
公开(公告)日：2014-05-20
申请号：US13053644
申请日：2011-03-22
申请人： Atsushi Ishida , Ryojiro Tominaga , Haruhiko Morita
发明人： Atsushi Ishida , Ryojiro Tominaga , Haruhiko Morita
IPC分类号： H05K1/11
CPC分类号： H05K1/0251 , H05K3/429 , H05K3/4602 , H05K2201/09809 , Y10T29/49165
摘要： A printed wiring board wiring board including a substrate having a first penetrating hole and multiple second penetrating holes formed around the first penetrating hole, a first conductive portion and a second conductive portion formed on one surface of the substrate, a third conductive portion and a fourth conductive portion formed on the opposite surface of the substrate, a first through-hole conductor formed in the first penetrating hole and connecting the first conductive portion and the third conductive portion, and multiple second through-hole conductors formed in the second penetrating holes and connecting the second conductive portion and the fourth conductive portion. The first through-hole conductor and the second through-hole conductors are made of conductive material filled in the first penetrating hole or the second penetrating holes.
摘要翻译：一种印刷线路板布线板，包括：具有形成在第一贯通孔周围的第一贯通孔和多个第二贯通孔的基板;形成在基板的一个面上的第一导电部和第二导电部，第三导电部和第四导电部形成在所述基板的相对表面上的导电部分，形成在所述第一贯通孔中并连接所述第一导电部和所述第三导电部的第一通孔导体，以及形成在所述第二贯通孔中的多个第二通孔导体，第二导电部分和第四导电部分。第一通孔导体和第二通孔导体由填充在第一贯通孔或第二贯通孔中的导电材料构成。

26. 发明授权

US08563873B2 Substrate with metal film and method for manufacturing the same 有权
标题翻译：金属薄膜基板及其制造方法
公开(公告)号：US08563873B2
公开(公告)日：2013-10-22
申请号：US12607666
申请日：2009-10-28
申请人： Ayao Niki , Atsushi Ishida , Ryojiro Tominaga
发明人： Ayao Niki , Atsushi Ishida , Ryojiro Tominaga
IPC分类号： H05K1/11 , C08F2/46 , C08J7/18
CPC分类号： H05K3/4661 , H05K3/0035 , H05K3/387 , H05K3/422 , H05K3/4682 , H05K2201/0195 , H05K2201/0209 , H05K2201/0239 , H05K2201/09581 , H05K2201/09827 , H05K2203/1168
摘要： A method for manufacturing a substrate with a metal film includes preparing a first insulation layer having first and second surfaces, forming a first conductive circuit on the first surface of the first insulation layer, forming on the first surface of the first insulation layer and on the first conductive circuit a second insulation layer having first and second surfaces, forming in the second insulation layer a penetrating hole tapering from the first surface toward the first conductive circuit, forming on the inner wall of the penetrating hole, a composition containing a polymerization initiator and a polymerizable compound, providing a polymer on the inner wall of the penetrating hole by irradiating the composition, applying a plating catalyst on the polymer, and forming a plated-metal film on the inner wall of the penetrating hole. The first surface of the first insulation layer faces the second surface of the second insulation layer.
摘要翻译：一种用金属膜制造衬底的方法包括制备具有第一和第二表面的第一绝缘层，在第一绝缘层的第一表面上形成第一导电电路，在第一绝缘层的第一表面上形成第一绝缘层，第一导电电路，具有第一和第二表面的第二绝缘层，在所述第二绝缘层中形成从所述第一表面向所述第一导电电路渐缩的穿透孔，在所述穿透孔的内壁上形成含有聚合引发剂和聚合性化合物，通过照射该组合物，在该聚合物上涂布电镀催化剂，在该贯通孔的内壁上形成聚合物，在该贯通孔的内壁上形成电镀金属膜。第一绝缘层的第一表面面向第二绝缘层的第二表面。

27. 发明授权

US08477476B2 Ceramic electronic component 有权
标题翻译：陶瓷电子元件
公开(公告)号：US08477476B2
公开(公告)日：2013-07-02
申请号：US13079049
申请日：2011-04-04
申请人： Atsushi Ishida , Takumi Taniguchi , Takehisa Sasabayashi , Tomoyuki Kuwano , Akihiro Motoki , Toshiyuki Iwanaga
发明人： Atsushi Ishida , Takumi Taniguchi , Takehisa Sasabayashi , Tomoyuki Kuwano , Akihiro Motoki , Toshiyuki Iwanaga
IPC分类号： H01G4/06 , H01G4/228
CPC分类号： H01G4/2325 , H01G4/232 , H01G4/30
摘要： A ceramic electronic component includes a ceramic element including opposed side surfaces, an inner electrode, and an external terminal electrode. The external terminal electrode includes a first conductive layer and a second conductive layer. The first conductive layer is formed by plating so as to be electrically coupled to an exposed section of the internal electrode exposed to the side surfaces. The second conductive layer is arranged so as to cover the first conductive layer and includes conductive resin. The value of T2/T1 is in the range of about 3.4 to about 11.3, where T1 indicates the thickness of the first conductive layer and T2 indicates the thickness of the second conductive layer.
摘要翻译：陶瓷电子部件包括：陶瓷元件，其包括相对的侧面，内部电极和外部端子电极。外部端子电极包括第一导电层和第二导电层。第一导电层通过电镀形成，以便电连接到暴露于侧表面的内部电极的暴露部分。第二导电层被布置成覆盖第一导电层并且包括导电树脂。 T2 / T1的值在约3.4至约11.3的范围内，其中T1表示第一导电层的厚度，T2表示第二导电层的厚度。

28. 发明授权

US08125764B2 Electronic component 有权
标题翻译：电子元器件
公开(公告)号：US08125764B2
公开(公告)日：2012-02-28
申请号：US12761429
申请日：2010-04-16
申请人： Atsushi Ishida , Takumi Taniguchi , Masaki Tani
发明人： Atsushi Ishida , Takumi Taniguchi , Masaki Tani
IPC分类号： H01G4/228
CPC分类号： H01G4/012 , H01G2/24 , H01G4/232 , H01G4/30
摘要： An electronic component includes a substantially rectangular parallelepiped electronic component body and first to fourth external electrodes. The first to fourth external electrodes are arranged such that a shaped defined by joining the centers of portions of the first to fourth external electrodes on a first main surface with a substantially straight line is substantially square. The first main surface is provided with a substantially linear orientation identifying mark disposed thereon. The orientation identifying mark passes through an intersection of two diagonals of the substantially square shape and extends along the longitudinal direction or the width direction.
摘要翻译：电子部件包括大致长方体的电子部件主体和第一至第四外部电极。第一至第四外部电极被布置成使得通过在第一主表面上具有基本上直线的第一至第四外部电极的部分的中心接合而限定的形状基本上为正方形。第一主表面设置有设置在其上的基本线性的取向识别标记。取向识别标记通过大致正方形的两个对角线的交点，并且沿长度方向或宽度方向延伸。

29. 发明授权

US08004819B2 Capacitor array and method for manufacturing the same 有权
标题翻译：电容阵列及其制造方法
公开(公告)号：US08004819B2
公开(公告)日：2011-08-23
申请号：US12249032
申请日：2008-10-10
申请人： Katsumori Nagamiya , Atsushi Ishida , Akihiro Motoki
发明人： Katsumori Nagamiya , Atsushi Ishida , Akihiro Motoki
IPC分类号： H01G4/005 , H01G4/06
CPC分类号： H01G4/012 , H01G4/228 , H01G4/38 , Y10T29/435
摘要： A capacitor array includes mutually opposed first and second internal electrodes having a first capacitance portion and a second capacitance portion, respectively, a first lead portion and a second lead portion, respectively, which are electrically connected to a first outer terminal electrode and a second outer terminal electrode, and a first protrusion portion and a second protrusion portion, respectively, which partially protrude toward the second outer terminal electrode and the first outer terminal electrode. The outer terminal electrodes have plating films directly connected to the internal electrodes. The plating film is formed by electrolytic plating. In the electrolytic plating, deposition of plating proceeds while being prevented from spreading in width directions of the individual side surfaces by electric fields generated from the protrusion portions toward the vicinities of exposure portions of the respective lead portions on the side surfaces.
摘要翻译：电容器阵列包括分别具有第一电容部分和第二电容部分的相互相对的第一和第二内部电极，分别与第一外部端子电极和第二外部电极电连接的第一引线部分和第二引线部分端子电极，以及分别朝向第二外部端子电极和第一外部端子电极部分地突出的第一突出部分和第二突出部分。外部端子电极具有直接连接到内部电极的电镀膜。镀膜通过电解电镀形成。在电解电镀中，通过从突出部向侧面的各引线部的曝光部附近的电场防止在各个侧面的宽度方向上扩散镀层。

30. 发明授权

US07508895B2 Oversampling apparatus, decoding LSI chip, and oversampling method 失效
标题翻译：过采样装置，解码LSI芯片和过采样方法
公开(公告)号：US07508895B2
公开(公告)日：2009-03-24
申请号：US11254655
申请日：2005-10-19
申请人： Atsushi Ishida
发明人： Atsushi Ishida
IPC分类号： H04L7/00 , H04L25/00 , H04L25/40
CPC分类号： G10L19/022 , G10L19/0017
摘要： An oversampling system (oversampling apparatus), a decoding LSI chip, and an oversampling method capable of decreasing the memory capacity of an output buffer used to oversample and output decoded data for digital audio.
摘要翻译：一种过采样系统（过采样装置），解码LSI芯片以及能够降低用于过采样和输出用于数字音频的解码数据的输出缓冲器的存储容量的过采样方法。

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