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21. 发明申请

US20090008630A1 TUNNELING TRANSISTOR WITH BARRIER 有权
标题翻译：具有障碍物的隧道式晶体管
公开(公告)号：US20090008630A1
公开(公告)日：2009-01-08
申请号：US12161571
申请日：2007-01-24
申请人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal
发明人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal
IPC分类号： H01L29/06
CPC分类号： H01L29/1054 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/068 , H01L29/47 , H01L29/66666 , H01L29/78 , H01L29/7827 , Y10S977/762 , Y10S977/938
摘要： The invention suggests a transistor (21) comprising a source (24) and a drain (29) as well as a barrier region (27) located between the source and the drain. The barrier region is separated from the source and the drain by intrinsic or lowly doped regions (26, 28) of a semiconductor material. Potential barriers are formed at the interfaces of the barrier region and the intrinsic or lowly doped regions. A gate electrode (32) is provided in the vicinity of the potential barriers such that the effective height and/or width of the potential barriers can be modulated by applying an appropriate voltage to the gate electrode.
摘要翻译：本发明提出了一种包括源极（24）和漏极（29）的晶体管（21）以及位于源极和漏极之间的阻挡区域（27）。通过半导体材料的本征或低掺杂区域（26,28）将势垒区域与源极和漏极分离。在屏障区域和本征或低掺杂区域的界面处形成势垒。栅电极（32）设置在势垒附近，使得可以通过向栅电极施加适当的电压来调制势垒的有效高度和/或宽度。

22. 发明申请

US20060202229A1 Semiconductor device and method of manufacturing such a device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060202229A1
公开(公告)日：2006-09-14
申请号：US10545736
申请日：2004-02-12
申请人： Rob Van Dalen , Prabhat Agarwal , Jan Slotboom , Gerrit Koops
发明人： Rob Van Dalen , Prabhat Agarwal , Jan Slotboom , Gerrit Koops
IPC分类号： H01L31/00
CPC分类号： H01L29/66242 , H01L29/7378
摘要： The invention relates to a semiconductor device with a substrate (11) and a semiconductor body (12) with a heterojunction bipolar, in particular npn, transistor with an emitter region (1), a base region (2) and a collector region (3), which are provided with, respectively, a first, a second and a third connection conductor (4, 5, 6), and wherein the bandgap of the base region (2) is smaller than that of the collector region (3) or of the emitter region (1), for example by the use of a silicon-germanium mixed crystal instead of pure silicon in the base region (2). Such a device is characterized by a very high speed, but its transistor shows a relatively low BVeeo. In a device (10) according to the invention the doping flux of the emitter region (1) is locally reduced by a further semiconductor region (20) of the second conductivity type which is embedded in the emitter region (1). In this way, on the one hand, a low-impedance emitter contact is ensured, while locally the Gummel number is increased without the drawbacks normally associated with such an increase. In this way, the hole current in the, npn, transistor is increased and thus the gain is decreased. The relatively high gain of a Si—Ge transistor is responsible for the low BVCeOf which is consequently avoided in a device (10) according to the invention. Preferably the further semiconductor region (20) is recessed in the emitter region (1) and said emitter region (1) preferably comprises a lower doped part that borders on the base region (2) and that is situated below the further semiconductor region (20). The invention also comprises a method of manufacturing a semiconductor device (10) according to the invention.
摘要翻译：本发明涉及具有衬底（11）和具有异质结双极性的半导体本体（12）的半导体器件，特别是具有发射极区域（1），基极区域（2）和集电极区域（3）的npn晶体管），其分别设置有第一，第二和第三连接导体（4,5,6），并且其中所述基极区域（2）的带隙小于所述集电极区域（3）的带隙或的发射极区域（1），例如通过在基极区域（2）中使用硅 - 锗混合晶体代替纯硅。这种器件的特点是非常高的速度，但其晶体管显示相对较低的BVeeo。在根据本发明的器件（10）中，发射极区域（1）的掺杂通量被嵌入在发射极区域（1）中的第二导电类型的另外的半导体区域（20）局部地减小。以这种方式，一方面，确保了低阻抗发射极接触，而局部地增加了Gummel数量，而没有通常与这种增加相关联的缺点。以这种方式，npn晶体管中的空穴电流增加，因此增益降低。 Si-Ge晶体管的相对高的增益负责在本发明的器件（10）中避免的低BVCeOf。优选地，另外的半导体区域（20）凹陷在发射极区域（1）中，并且所述发射极区域（1）优选地包括在基极区域（2）上接合并位于另外的半导体区域（20）下方的下部掺杂部分）。本发明还包括制造根据本发明的半导体器件（10）的方法。

23. 发明授权

US08134142B2 Tunneling transistor with barrier 有权
标题翻译：具有屏障的隧道晶体管
公开(公告)号：US08134142B2
公开(公告)日：2012-03-13
申请号：US12161571
申请日：2007-01-24
申请人： Godefridus Hurkx , Prabhat Agarwal
发明人： Godefridus Hurkx , Prabhat Agarwal
IPC分类号： H01L29/06 , H01L31/00
CPC分类号： H01L29/1054 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/068 , H01L29/47 , H01L29/66666 , H01L29/78 , H01L29/7827 , Y10S977/762 , Y10S977/938
摘要： The invention suggests a transistor (21) comprising a source (24) and a drain (29) as well as a barrier region (27) located between the source and the drain. The barrier region is separated from the source and the drain by intrinsic or lowly doped regions (26, 28) of a semiconductor material. Potential barriers are formed at the interfaces of the barrier region and the intrinsic or lowly doped regions. A gate electrode (32) is provided in the vicinity of the potential barriers such that the effective height and/or width of the potential barriers can be modulated by applying an appropriate voltage to the gate electrode.
摘要翻译：本发明提出了一种包括源极（24）和漏极（29）的晶体管（21）以及位于源极和漏极之间的阻挡区域（27）。通过半导体材料的本征或低掺杂区域（26,28）将势垒区域与源极和漏极分离。在屏障区域和本征或低掺杂区域的界面处形成势垒。栅电极（32）设置在势垒附近，使得可以通过向栅电极施加适当的电压来调制势垒的有效高度和/或宽度。

24. 发明授权

US07939854B2 Semiconductor device with a bipolar transistor and method of manufacturing such a device 有权
标题翻译：具有双极晶体管的半导体器件及其制造方法
公开(公告)号：US07939854B2
公开(公告)日：2011-05-10
申请号：US12088719
申请日：2006-09-22
申请人： Philippe Meunier-Beillard , Raymond James Duffy , Prabhat Agarwal , Godfridus Adrianus Maria Hurkx
发明人： Philippe Meunier-Beillard , Raymond James Duffy , Prabhat Agarwal , Godfridus Adrianus Maria Hurkx
IPC分类号： H01L29/73
CPC分类号： H01L29/7378 , H01L29/0817 , H01L29/66242
摘要： The invention relates to a semiconductor device with a substrate and a semiconductor body of silicon comprising a bipolar transistor with an emitter region, a base region and a collector region which are respectively of the N-type conductivity, the P-type conductivity and the N-type conductivity by the provision of suitable doping atoms, wherein the base region comprises a mixed crystal of silicon and germanium, the base region is separated from the emitter region by an intermediate region of silicon having a doping concentration which is lower than the doping concentration of the emitter region and with a thickness smaller than the thickness of the emitter region, and the emitter region comprises a sub-region comprising a mixed crystal of silicon and germanium which is positioned at the side of emitter region remote from the intermediate region.
摘要翻译：本发明涉及一种具有衬底和半导体本体硅的半导体器件，其包括分别具有N型导电性，P型导电性和N型导电性的发射极区，基极区和集电极区的双极晶体管通过提供合适的掺杂原子，其中基极区域包括硅和锗的混合晶体，其基极区域与掺杂浓度低于掺杂浓度的硅的中间区域与发射极区域分离的发射极区域，并且其厚度小于发射极区域的厚度，并且发射极区域包括位于远离中间区域的发射极区域侧的硅和锗的混合晶体的子区域。

25. 发明授权

US07868424B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07868424B2
公开(公告)日：2011-01-11
申请号：US11658227
申请日：2005-07-07
申请人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Erwin Hijzen , Raymond Josephus Engelbart Hueting
发明人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Erwin Hijzen , Raymond Josephus Engelbart Hueting
IPC分类号： H01L21/02
CPC分类号： H01L29/0821 , B82Y10/00 , H01L29/06 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/08 , H01L29/423 , H01L29/42304 , H01L29/66242 , H01L29/737 , H01L29/7378
摘要： The invention relates to a semiconductor device (10) with a substrate (11) and a semiconductor body (12) comprising a vertical bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of, respectively, a first conductivity type, a second conductivity type opposite to the first conductivity type and the first conductivity type, wherein the collector region (3) comprises a first sub-region (3A) bordering the base region (2) and a second sub-region (3B) bordering the first sub-region (3A) which has a lower doping concentration than the second sub-region (3B), and the transistor is provided with a gate electrode (5) which laterally borders the first sub-region (3A) and by means of which the first sub-region (3A) may be depleted. According to the invention the collector region (3) borders the surface of the semiconductor body (12), while the emitter region (1) is recessed in the semiconductor body (12), and the collector region (3) forms part of a mesa structure (6) formed at the surface of the semiconductor body (12). Such a device (10) has very favorable properties at high frequencies and high voltages and, moreover, is easy to manufacture. In a preferred embodiment the collector (3) comprises a nanowire (30) forming the mesa structure (6).
摘要翻译：本发明涉及一种具有衬底（11）和半导体本体（12）的半导体器件（10），该半导体器件包括分别具有发射极区，基极区和集电极区（1,2,3）的垂直双极晶体管，第一导电类型，与第一导电类型和第一导电类型相反的第二导电类型，其中集电极区域（3）包括与基极区域（2）接壤的第一子区域（3A）与第二子区域（3A）接合的第一子区域（3A）的区域（3B），其具有比第二子区域（3B）低的掺杂浓度，并且晶体管设置有与第一子区域横向相邻的栅电极（5） 3A），并且借助于此可以使第一子区域（3A）耗尽。根据本发明，集电极区域（3）与半导体本体（12）的表面相接触，而发射极区域（1）凹入半导体本体（12）中，并且集电极区域（3）形成台面的一部分结构（6）形成在半导体本体（12）的表面。这种装置（10）在高频和高电压下具有非常有利的特性，而且易于制造。在优选实施例中，收集器（3）包括形成台面结构（6）的纳米线（30）。

26. 发明申请

US20100127153A1 PHOTOSENSITIVE DEVICE AND A METHOD OF MANUFACTURING A PHOTOSENSITIVE DEVICE 有权
标题翻译：感光装置和制造感光装置的方法
公开(公告)号：US20100127153A1
公开(公告)日：2010-05-27
申请号：US12597263
申请日：2008-04-28
申请人： Prabhat Agarwal
发明人： Prabhat Agarwal
IPC分类号： G01J1/42 , H01L31/0352 , H01L31/18 , H01L27/144 , H01L31/08
CPC分类号： H01L31/0352 , H01L27/1446
摘要： A photosensitive device (100), the photosensitive device (100) comprising a substrate (101) and a plurality of vertically aligned nanowire diodes (102 to 105) provided on and/or in the substrate (101).
摘要翻译：一种感光装置（100），所述感光装置（100）包括衬底（101）和设置在衬底（101）上和/或衬底（101）中的多个垂直排列的纳米线二极管（102至105）。

27. 发明授权

US07667502B2 Low voltage differential signalling driver with pre-emphasis 有权
标题翻译：低压差分信号驱动器，预加重
公开(公告)号：US07667502B2
公开(公告)日：2010-02-23
申请号：US12092556
申请日：2005-11-04
申请人： Prabhat Agarwal
发明人： Prabhat Agarwal
IPC分类号： H03K3/00
CPC分类号： H04L25/026 , H03K19/018528
摘要： There is provided a LVDS driver arranged to receive an input signal which switches between two voltage levels. The driver comprises a pre-emphasis block (405) for generating a pre-emphasis signal having a first voltage level for a time period T1 after each switch of the input signal, and a second voltage level at all other times, a differential pair of outputs for generating a differential output voltage across a load resistor (RI); and a driver circuit (401) comprising two parallel branches, each branch being connected to one output and each branch being arranged to receive the pre-emphasis signal. The driver is arranged so that the total current flowing through the driver circuit is constant, and during time period T1, the total current flowing through the driver circuit flows through the load resistor, thereby producing a differential output voltage and at all other times, only some of the total current flowing through the driver circuit flows through the load resistor, thereby reducing the differential output voltage.
摘要翻译：提供了一个LVDS驱动器，其布置成接收在两个电压电平之间切换的输入信号。驱动器包括预加重块（405），用于在输入信号的每次切换之后产生具有第一电压电平的时间段T1的预加重信号，以及在所有其他时间的第二电压电平的差分对用于产生负载电阻（RI）两端的差分输出电压的输出; 以及包括两个并行分支的驱动器电路（401），每个分支连接到一个输出端，每个分支被布置成接收预加重信号。驱动器被布置成使得流过驱动器电路的总电流是恒定的，并且在时间段T1期间，流过驱动器电路的总电流流过负载电阻器，从而产生差分输出电压，并且在所有其他时间仅仅流过驱动电路的一部分总电流流过负载电阻，从而降低差分输出电压。

28. 发明申请

US20090200641A1 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090200641A1
公开(公告)日：2009-08-13
申请号：US11658228
申请日：2005-07-07
申请人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Abraham Rudolf Balkenende , Petrus Hubertus Cornelis Magnee , Melanie Maria Hubertina Wagemans , Erik Petrus Antonius Maria Bakkers , Erwin Hijzen
发明人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Abraham Rudolf Balkenende , Petrus Hubertus Cornelis Magnee , Melanie Maria Hubertina Wagemans , Erik Petrus Antonius Maria Bakkers , Erwin Hijzen
IPC分类号： H01L29/73 , H01L21/331
CPC分类号： H01L29/0804 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/0821 , H01L29/7378 , Y10S977/936
摘要： The invention relates to a semiconductor device (10) with a semiconductor body (12) comprising a bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of, respectively, a first conductivity type, a second conductivity type opposite to the first conductivity type, and the first conductivity type. One of the emitter or collector regions (1, 3) comprises a nanowire (30). The base region (2) has been formed from a layer (20) at the surface of the semiconductor body (12); the other one (3, 1) of the emitter or collector regions (1, 3) has been formed in the semiconductor body (12) below the base region (2). The emitter or collector region (1, 3) comprising the nanowire (30) has been provided on the surface of the semiconductor body (12) such that its longitudinal axis extends perpendicularly to the surface.
摘要翻译：本发明涉及具有半导体本体（12）的半导体器件（10），该半导体器件（12）包括分别具有第一导电类型的发射极区，基极区和集电极区（1,2,3）的双极晶体管，与第一导电类型相反的第二导电类型和第一导电类型。发射极或集电极区域（1,3）中的一个包括纳米线（30）。基底区域（2）由半导体本体（12）表面的层（20）形成; 发射极或集电极区域（1,3）中的另一个（3,1）已经形成在基极区域（2）下方的半导体本体（12）中。包括纳米线（30）的发射极或集电极区域（1,3）已经设置在半导体本体（12）的表面上，使得其纵向轴线垂直于该表面延伸。

29. 发明申请

US20080315361A1 Semiconductor Device and Method of Manufacturing the Same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080315361A1
公开(公告)日：2008-12-25
申请号：US11658227
申请日：2005-07-07
申请人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Erwin Hijzen , Raymond Josephus Engelbart Hueting
发明人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Erwin Hijzen , Raymond Josephus Engelbart Hueting
IPC分类号： H01L27/00 , H01L21/331
CPC分类号： H01L29/0821 , B82Y10/00 , H01L29/06 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/08 , H01L29/423 , H01L29/42304 , H01L29/66242 , H01L29/737 , H01L29/7378
摘要： The invention relates to a semiconductor device (10) with a substrate (11) and a semiconductor body (12) comprising a vertical bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of, respectively, a first conductivity type, a second conductivity type opposite to the first conductivity type and the first conductivity type, wherein the collector region (3) comprises a first sub-region (3A) bordering the base region (2) and a second sub-region (3B) bordering the first sub-region (3A) which has a lower doping concentration than the second sub-region (3B), and the transistor is provided with a gate electrode (5) which laterally borders the first sub-region (3A) and by means of which the first sub-region (3A) may be depleted. According to the invention the collector region (3) borders the surface of the semiconductor body (12), while the emitter region (1) is recessed in the semiconductor body (12), and the collector region (3) forms part of a mesa structure (6) formed at the surface of the semiconductor body (12). Such a device (10) has very favorable properties at high frequencies and high voltages and, moreover, is easy to manufacture. In a preferred embodiment the collector (3) comprises a nanowire (30) forming the mesa structure (6).
摘要翻译：本发明涉及一种具有衬底（11）和半导体本体（12）的半导体器件（10），该半导体器件包括分别具有发射极区，基极区和集电极区（1,2,3）的垂直双极晶体管，第一导电类型，与第一导电类型和第一导电类型相反的第二导电类型，其中集电极区域（3）包括与基极区域（2）接壤的第一子区域（3A）与第二子区域（3A）接合的第一子区域（3A）的区域（3B），其具有比第二子区域（3B）低的掺杂浓度，并且晶体管设置有与第一子区域横向相邻的栅电极（5） 3A），并且借助于此可以使第一子区域（3A）耗尽。根据本发明，集电极区域（3）与半导体本体（12）的表面相接触，而发射极区域（1）凹入半导体本体（12）中，并且集电极区域（3）形成台面的一部分结构（6）形成在半导体本体（12）的表面。这种装置（10）在高频和高电压下具有非常有利的特性，而且易于制造。在优选实施例中，收集器（3）包括形成台面结构（6）的纳米线（30）。

30. 发明申请

US20080237871A1 Method of Manufacturing a Semiconductor Device and Semiconductor Device Obtained With Such a Method 审中-公开
标题翻译：制造使用这种方法获得的半导体器件和半导体器件的方法
公开(公告)号：US20080237871A1
公开(公告)日：2008-10-02
申请号：US12093649
申请日：2006-10-27
申请人： Vijayaraghavan Madakasira , Prabhat Agarwal , Johannes Josephus Theodorus Marinus Donkers , Mark Van Dal
发明人： Vijayaraghavan Madakasira , Prabhat Agarwal , Johannes Josephus Theodorus Marinus Donkers , Mark Van Dal
IPC分类号： H01L21/768 , H01L21/20 , H01L23/532
CPC分类号： H01L21/76877 , H01L21/28525 , H01L21/76889 , H01L2221/1094
摘要： The invention relates to a method of manufacturing a semiconductor device (10) with a substrate (11) and a semi-conductor body (12) which is provided with at least one semiconductor element (E) and comprising a monocrystalline silicon (1) region on top of which an epitaxial silicon region (2) is formed by providing a metal silicide region (3) on the monocrystalline silicon region (1) and a low-crystallinity silicon region (4) on top of the metal silicide region (3), after which the low-crystallinity silicon region (4) is transformed by heating into the epitaxial silicon region (2) having a high-crystallinity, during which process the metal silicide region (3) is moved from the bottom of the low-crystallinity silicon region (4) to the top of the epitaxial silicon region (2). According to the invention above the level of the metal silicide region (3) an insulating layer (5) is formed which is provided with an opening (6), the low-crystallinity silicon region (4) is deposited in the opening (6) and on top of the insulating layer (5), the part (4A, 4B) of the low-crystallinity silicon region (4) on top of the insulating layer (5) is removed by a planarization process after which the epitaxial silicon region (2) is formed. In this way an epitaxial silicon region (2), preferably a nano wire (2), is simply obtained that is provided with a metal silicide contact (region) in a self-aligned manner and that can form a part of semiconductor element (E) like a transistor.
摘要翻译：本发明涉及一种制造半导体器件（10）的方法，所述半导体器件（10）具有衬底（11）和半导体本体（12），所述半导体本体（12）设置有至少一个半导体元件（E）并且包括单晶硅（1）区域通过在单晶硅区域（1）上提供金属硅化物区域（3）并且在金属硅化物区域（3）的顶部上提供低结晶度硅区域（4），在其上形成外延硅区域（2）之后，通过加热将低结晶性硅区域（4）变换为具有高结晶度的外延硅区域（2），在该过程中，金属硅化物区域（3）从低结晶度的底部移动硅区域（4）到外延硅区域（2）的顶部。根据本发明，金属硅化物区域（3）的水平形成有形成有开口（6）的绝缘层（5），低结晶度硅区域（4）沉积在开口（6）中，并且在绝缘层（5）的顶部，通过平坦化工艺除去绝缘层（5）顶部上的低结晶性硅区域（4）的部分（4A，4B），然后将外延硅形成区域（2）。以这种方式，简单地获得外延硅区域（2），优选纳米线（2），其以自对准的方式设置有金属硅化物接触（区域），并且可以形成半导体元件（E ）像晶体管。

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